Settable times

This commit is contained in:
wantong
2024-01-25 13:43:24 +08:00
parent b478a0087d
commit f5b2c8f817
113 changed files with 6352 additions and 7210 deletions

View File

@ -307,7 +307,8 @@ TIM2.Pulse-PWM\ Generation1\ CH1=50
TIM3.Channel-Input_Capture1_from_TI1=TIM_CHANNEL_1
TIM3.IPParameters=Channel-Input_Capture1_from_TI1,Prescaler
TIM3.Prescaler=24-1
USART1.IPParameters=VirtualMode-Asynchronous
USART1.BaudRate=921600
USART1.IPParameters=VirtualMode-Asynchronous,BaudRate
USART1.VirtualMode-Asynchronous=VM_ASYNC
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick