// File: STM32F100.dbgconf // Version: 1.0.0 // Note: refer to STM32F100xx Reference manual (RM0041) // STM32F100xx datasheets // <<< Use Configuration Wizard in Context Menu >>> // Debug MCU configuration register (DBGMCU_CR) // Reserved bits must be kept at reset value // DBG_TIM14_STOP TIM14 counter stopped when core is halted // DBG_TIM13_STOP TIM13 counter stopped when core is halted // DBG_TIM12_STOP TIM12 counter stopped when core is halted // DBG_TIM17_STOP TIM17 counter stopped when core is halted // DBG_TIM16_STOP TIM16 counter stopped when core is halted // DBG_TIM15_STOP TIM15 counter stopped when core is halted // DBG_TIM7_STOP TIM7 counter stopped when core is halted // DBG_TIM6_STOP TIM6 counter stopped when core is halted // DBG_TIM5_STOP TIM5 counter stopped when core is halted // DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted // DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted // DBG_TIM4_STOP TIM4 counter stopped when core is halted // DBG_TIM3_STOP TIM3 counter stopped when core is halted // DBG_TIM2_STOP TIM2 counter stopped when core is halted // DBG_TIM1_STOP TIM1 counter stopped when core is halted // DBG_WWDG_STOP Debug window watchdog stopped when core is halted // DBG_IWDG_STOP Debug independent watchdog stopped when core is halted // DBG_STANDBY Debug standby mode // DBG_STOP Debug stop mode // DBG_SLEEP Debug sleep mode // DbgMCU_CR = 0x00000007; // <<< end of configuration section >>>