From 2c58355e63a35c4f56ff5b72e0ec60b5d1915cf7 Mon Sep 17 00:00:00 2001 From: lijie Date: Wed, 24 Jan 2024 15:56:10 +0800 Subject: [PATCH] first commit --- .gitignore | 7 + APP/LED.c | 20 + APP/LED.h | 17 + APP/foc.c | 399 ++++++++++++++ APP/foc.h | 40 ++ APP/mymain.c | 55 ++ APP/mymain.h | 33 ++ APP/tle5012b.c | 214 ++++++++ APP/tle5012b.h | 21 + APP/usart_ano.c | 51 ++ APP/usart_ano.h | 15 + CMakeLists.txt | 73 +++ Core/Inc/gpio.h | 49 ++ Core/Inc/main.h | 68 +++ Core/Inc/spi.h | 52 ++ Core/Inc/stm32h7xx_hal_conf.h | 510 ++++++++++++++++++ Core/Inc/stm32h7xx_it.h | 66 +++ Core/Inc/tim.h | 60 +++ Core/Inc/usart.h | 52 ++ Core/Src/gpio.c | 51 ++ Core/Src/main.c | 207 ++++++++ Core/Src/spi.c | 140 +++++ Core/Src/stm32h7xx_hal_msp.c | 80 +++ Core/Src/stm32h7xx_it.c | 203 ++++++++ Core/Src/syscalls.c | 155 ++++++ Core/Src/sysmem.c | 79 +++ Core/Src/system_stm32h7xx.c | 450 ++++++++++++++++ Core/Src/tim.c | 325 ++++++++++++ Core/Src/usart.c | 159 ++++++ Core/Startup/startup_stm32h750vbtx.s | 752 +++++++++++++++++++++++++++ IMU/alldata.h | 25 + IMU/icm42688.c | 443 ++++++++++++++++ IMU/icm42688.h | 204 ++++++++ IMU/imu.c | 135 +++++ IMU/imu.h | 16 + IMU/kalman.c | 12 + IMU/kalman.h | 18 + config.cfg | 8 + foc_n.ioc | 234 +++++++++ keilkilll.bat | 26 + 40 files changed, 5524 insertions(+) create mode 100644 .gitignore create mode 100644 APP/LED.c create mode 100644 APP/LED.h create mode 100644 APP/foc.c create mode 100644 APP/foc.h create mode 100644 APP/mymain.c create mode 100644 APP/mymain.h create mode 100644 APP/tle5012b.c create mode 100644 APP/tle5012b.h create mode 100644 APP/usart_ano.c create mode 100644 APP/usart_ano.h create mode 100644 CMakeLists.txt create mode 100644 Core/Inc/gpio.h create mode 100644 Core/Inc/main.h create mode 100644 Core/Inc/spi.h create mode 100644 Core/Inc/stm32h7xx_hal_conf.h create mode 100644 Core/Inc/stm32h7xx_it.h create mode 100644 Core/Inc/tim.h create mode 100644 Core/Inc/usart.h create mode 100644 Core/Src/gpio.c create mode 100644 Core/Src/main.c create mode 100644 Core/Src/spi.c create mode 100644 Core/Src/stm32h7xx_hal_msp.c create mode 100644 Core/Src/stm32h7xx_it.c create mode 100644 Core/Src/syscalls.c create mode 100644 Core/Src/sysmem.c create mode 100644 Core/Src/system_stm32h7xx.c create mode 100644 Core/Src/tim.c create mode 100644 Core/Src/usart.c create mode 100644 Core/Startup/startup_stm32h750vbtx.s create mode 100644 IMU/alldata.h create mode 100644 IMU/icm42688.c create mode 100644 IMU/icm42688.h create mode 100644 IMU/imu.c create mode 100644 IMU/imu.h create mode 100644 IMU/kalman.c create mode 100644 IMU/kalman.h create mode 100644 config.cfg create mode 100644 foc_n.ioc create mode 100644 keilkilll.bat diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..525667b --- /dev/null +++ b/.gitignore @@ -0,0 +1,7 @@ +/cmake-build-debug/ +/Drivers/ +/.cproject +/.mxproject +/.project +/STM32H750VBTX_FLASH.ld +/STM32H750VBTX_RAM.ld diff --git a/APP/LED.c b/APP/LED.c new file mode 100644 index 0000000..a57f578 --- /dev/null +++ b/APP/LED.c @@ -0,0 +1,20 @@ +// +// Created by hu123456 on 2024/1/24. +// + +#include "LED.h" + +void led_init() +{ + // ³õʼ»¯TLE5012B´«¸ÐÆ÷ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + __HAL_RCC_GPIOE_CLK_ENABLE(); + + GPIO_InitStruct.Pin = GPIO_PIN_8; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); + +} + diff --git a/APP/LED.h b/APP/LED.h new file mode 100644 index 0000000..4442201 --- /dev/null +++ b/APP/LED.h @@ -0,0 +1,17 @@ +// +// Created by hu123456 on 2024/1/24. +// + +#ifndef FOC_N_LED_H +#define FOC_N_LED_H + +#include "mymain.h" + + +#define LED_ON HAL_GPIO_WritePin(GPIOE, GPIO_PIN_8, 1) +#define LED_OFF HAL_GPIO_WritePin(GPIOE, GPIO_PIN_8, 0) + +void led_init(); + + +#endif //FOC_N_LED_H diff --git a/APP/foc.c b/APP/foc.c new file mode 100644 index 0000000..cd33013 --- /dev/null +++ b/APP/foc.c @@ -0,0 +1,399 @@ +// +// Created by hu123456 on 2024/1/16. +// +#include "foc.h" +#define _constrain(amt,low,high) ((amt)<(low)?(low):((amt)>(high)?(high):(amt))) + + +float Voltage_PowerSupply = 12; +float Pole_Pairs = 14; +float Voltage_Limit = 6.9; +float Velocity_Limit = 100; +float V_Acc_Limit = 100; +float dir = 1; + +FOCTypeDef FOCStruct_X={0,0,0,0,0,0,0,0,0,0,0,0,0,0}; +FOCTypeDef FOCStruct_Y={0,0,0,0,0,0,0,0,0,0,0,0,0,0}; + +void PID_Iint(void) +{ + FOCStruct_X.ZT_KP = 2; + FOCStruct_X.ZT_KI = 0; + FOCStruct_X.ZT_KD = 0.2; + + FOCStruct_X.V_KP = 0.1; + FOCStruct_X.V_KI = 1.5; + FOCStruct_X.V_KD = 0; +//2024/1/2 YÖáЧ¹û²»´í + FOCStruct_Y.ZT_KP = 2; + FOCStruct_Y.ZT_KI = 0; + FOCStruct_Y.ZT_KD = 0.5; + + FOCStruct_Y.V_KP = 0.1; + FOCStruct_Y.V_KI = 1; + FOCStruct_Y.V_KD = 0; + + +////2024/1/23 xYÖáЧ¹û²»´í +// FOCStruct_X.ZT_KP = 2; +// FOCStruct_X.ZT_KI = 0; +// FOCStruct_X.ZT_KD = 0.2; +// +// FOCStruct_X.V_KP = 0.1; +// FOCStruct_X.V_KI = 1; +// FOCStruct_X.V_KD = 0; +////2024/1/22 YÖáЧ¹û²»´í +// FOCStruct_Y.ZT_KP = 2; +// FOCStruct_Y.ZT_KI = 0; +// FOCStruct_Y.ZT_KD = 0.5; +// +// FOCStruct_Y.V_KP = 0.1; +// FOCStruct_Y.V_KI = 1; +// FOCStruct_Y.V_KD = 0; + +} +void setPhaseVoltage(unsigned char motor,float Uq, float Ud, double angle_el) +{ + float Uout; + unsigned int sector; + float T0,T1,T2; + float Ta,Tb,Tc; + + if(Ud) // only if Ud and Uq set + { + Uout = sqrt(Ud*Ud + Uq*Uq) / Voltage_PowerSupply; + // angle normalisation in between 0 and 2pi + // only necessary if using _sin and _cos - approximation functions + angle_el = _normalizeAngle(angle_el + atan2(Uq, Ud)); + } + else + {// only Uq available - no need for atan2 and sqrt + Uout = Uq / Voltage_PowerSupply; + // angle normalisation in between 0 and 2pi + // only necessary if using _sin and _cos - approximation functions + angle_el = _normalizeAngle(angle_el + _PI_2); + } + if(Uout> 0.577)Uout= 0.577; + if(Uout<-0.577)Uout=-0.577; + + sector = (angle_el / _PI_3) + 1; + T1 = sqrt(3)*sin(sector*_PI_3 - angle_el) * Uout; + T2 = sqrt(3)*sin(angle_el - (sector-1.0)*_PI_3) * Uout; + T0 = 1 - T1 - T2; + + // calculate the duty cycles(times) + switch(sector) + { + case 1: + Ta = T1 + T2 + T0/2; + Tb = T2 + T0/2; + Tc = T0/2; + break; + case 2: + Ta = T1 + T0/2; + Tb = T1 + T2 + T0/2; + Tc = T0/2; + break; + case 3: + Ta = T0/2; + Tb = T1 + T2 + T0/2; + Tc = T2 + T0/2; + break; + case 4: + Ta = T0/2; + Tb = T1+ T0/2; + Tc = T1 + T2 + T0/2; + break; + case 5: + Ta = T2 + T0/2; + Tb = T0/2; + Tc = T1 + T2 + T0/2; + break; + case 6: + Ta = T1 + T2 + T0/2; + Tb = T0/2; + Tc = T1 + T0/2; + break; + default: // possible error state + Ta = 0; + Tb = 0; + Tc = 0; + } + if (motor == motory) + { + __HAL_TIM_SetCompare(&htim2,TIM_CHANNEL_1,Ta*4800); + __HAL_TIM_SetCompare(&htim2,TIM_CHANNEL_2,Tb*4800); + __HAL_TIM_SetCompare(&htim2,TIM_CHANNEL_3,Tc*4800); + + } + else if (motor == motorx) + { + __HAL_TIM_SetCompare(&htim3,TIM_CHANNEL_1,Ta*4800); + __HAL_TIM_SetCompare(&htim3,TIM_CHANNEL_2,Tb*4800); + __HAL_TIM_SetCompare(&htim3,TIM_CHANNEL_3,Tc*4800); + } +} + +void speed_closed_loop(unsigned motor,FOCTypeDef *FOCStruct,float V_Target) +{ + float Uq,Ud; + double electrical_angle; + unsigned long Time_Now; + double Ts; + + Time_Now = __HAL_TIM_GET_COUNTER(&htim5); //100ns + if(Time_Now > FOCStruct->Time_Prev)Ts = (float)(Time_Now - FOCStruct->Time_Prev)*1e-7f; + else + Ts = (float)(0xFFFFFFFF - FOCStruct->Time_Prev + Time_Now)*1e-7f; + FOCStruct->Time_Prev = Time_Now; + if(Ts == 0 || Ts > 400) Ts = 1e-3f; + + //»ñÈ¡½Ç¶ÈÇó³öV_Now + double Angle_Now=getAngle(motor); + + double V_Now = (Angle_Now - FOCStruct->Angle_Prev)/Ts; + FOCStruct->Angle_Prev = Angle_Now; + V_Now = dir*LPF_velocity(V_Now,FOCStruct); + double V_Error = V_Target - V_Now; + + float V_Pid_P = FOCStruct->V_KP * V_Error; + float V_Pid_I = FOCStruct->V_Pid_IPrev + FOCStruct->V_KI*Ts*0.5*(V_Error + FOCStruct->V_Error_Prev); + V_Pid_I = _constrain(V_Pid_I, -Voltage_Limit, Voltage_Limit); + + float V_Out = V_Pid_P+V_Pid_I; + V_Out = _constrain(V_Out, -Voltage_Limit, Voltage_Limit); + + float V_Acc_Now = (V_Out - FOCStruct->V_Out_Prev)/Ts; + if(V_Acc_Now > V_Acc_Limit) V_Out = FOCStruct->V_Out_Prev + V_Acc_Limit*Ts; + else if(V_Acc_Now < -V_Acc_Limit) V_Out = FOCStruct->V_Out_Prev - V_Acc_Limit*Ts; + + FOCStruct->V_Pid_IPrev = V_Pid_I; + FOCStruct->V_Out_Prev = V_Out; + FOCStruct->V_Error_Prev = V_Error; + + Uq = V_Out; + Ud = 0; + + +// double shaft_angle = dir*Angle_Now; + double shaft_angle = dir*Angle_Now; + +// electrical_angle = _normalizeAngle((shaft_angle ) * Pole_Pairs); + electrical_angle = _normalizeAngle((shaft_angle ) * Pole_Pairs - FOCStruct->zero_electric_angle); + setPhaseVoltage(motor,Uq,Ud,electrical_angle); +} + +void Zitai_closed_loop(unsigned motor,FOCTypeDef *FOCStruct,float ZT_Error) +{ + float Uq,Ud; + double electrical_angle; + unsigned long Time_Now; + double Ts; + + Time_Now = __HAL_TIM_GET_COUNTER(&htim5); //100ns + if(Time_Now > FOCStruct->Time_Prev)Ts = (float)(Time_Now - FOCStruct->Time_Prev)*1e-7f; + else + Ts = (float)(0xFFFFFFFF - FOCStruct->Time_Prev + Time_Now)*1e-7f; + FOCStruct->Time_Prev = Time_Now; + if(Ts == 0 || Ts > 400) Ts = 1e-3f; + + //×Ë̬»· + float V_Target = FOCStruct->ZT_KP * ZT_Error + FOCStruct->ZT_KD * (ZT_Error - FOCStruct->ZT_ErrorPrev) / Ts; + V_Target = _constrain(V_Target, -Velocity_Limit, Velocity_Limit); + FOCStruct->ZT_ErrorPrev = ZT_Error; + + //ËٶȻ· + //»ñÈ¡½Ç¶ÈÇó³öV_Now + double Angle_Now=getAngle(motor); + + double V_Now = (Angle_Now - FOCStruct->Angle_Prev)/Ts; + FOCStruct->Angle_Prev = Angle_Now; + V_Now = dir*LPF_velocity(V_Now,FOCStruct); + double V_Error = V_Target - V_Now; + + float V_Pid_P = FOCStruct->V_KP * V_Error; + float V_Pid_I = FOCStruct->V_Pid_IPrev + FOCStruct->V_KI*Ts*0.5*(V_Error + FOCStruct->V_Error_Prev); + V_Pid_I = _constrain(V_Pid_I, -Voltage_Limit, Voltage_Limit); + + float V_Out = V_Pid_P+V_Pid_I; + V_Out = _constrain(V_Out, -Voltage_Limit, Voltage_Limit); + + float V_Acc_Now = (V_Out - FOCStruct->V_Out_Prev)/Ts; + if(V_Acc_Now > V_Acc_Limit) V_Out = FOCStruct->V_Out_Prev + V_Acc_Limit*Ts; + else if(V_Acc_Now < -V_Acc_Limit) V_Out = FOCStruct->V_Out_Prev - V_Acc_Limit*Ts; + + FOCStruct->V_Pid_IPrev = V_Pid_I; + FOCStruct->V_Out_Prev = V_Out; + FOCStruct->V_Error_Prev = V_Error; + + Uq = V_Out; + Ud = 0; + + +// double shaft_angle = dir*Angle_Now; + double shaft_angle = dir*Angle_Now; + +// electrical_angle = _normalizeAngle((shaft_angle ) * Pole_Pairs); + electrical_angle = _normalizeAngle((shaft_angle ) * Pole_Pairs - FOCStruct->zero_electric_angle); + setPhaseVoltage(motor,Uq,Ud,electrical_angle); +} + +void Angel_closed_loop(unsigned motor,FOCTypeDef *FOCStruct,float Angle_target) +{ + float Uq,Ud; + double electrical_angle; + unsigned long Time_Now; + double Ts; + + Time_Now = __HAL_TIM_GET_COUNTER(&htim5); //100ns + if(Time_Now > FOCStruct->Time_Prev)Ts = (float)(Time_Now - FOCStruct->Time_Prev)*1e-7f; + else + Ts = (float)(0xFFFFFFFF - FOCStruct->Time_Prev + Time_Now)*1e-7f; + FOCStruct->Time_Prev = Time_Now; + if(Ts == 0 || Ts > 400) Ts = 1e-3f; + + //½Ç¶È»· + double Angle_Now=getAngle(motor); + + float error = Angle_target - Angle_Now; + Uq = 20 * error; + Uq = _constrain(Uq, -Voltage_Limit, Voltage_Limit); + + double shaft_angle = dir*Angle_Now; + electrical_angle = _normalizeAngle((shaft_angle ) * Pole_Pairs - FOCStruct->zero_electric_angle); + setPhaseVoltage(motor,Uq,Ud,electrical_angle); +} + +double LPF_velocity(double x,FOCTypeDef *FOCStruct) +{ + float y = 0.9*(FOCStruct->V_Prev)+ 0.1*x; + FOCStruct->V_Prev=y; + return y; +} + +// normalizing radian angle to [0,2PI] +double _normalizeAngle(float angle) +{ + float a = fmod(angle, _2PI); + return a >= 0 ? a : (a + _2PI); +} + + +void PWM_Start() +{ + HAL_TIM_Base_Start(&htim2); //Æô¶¯¶¨Ê±Æ÷ + HAL_TIM_PWM_Start(&htim2,TIM_CHANNEL_1); + HAL_TIM_PWM_Start(&htim2,TIM_CHANNEL_2); + HAL_TIM_PWM_Start(&htim2,TIM_CHANNEL_3); + + + HAL_TIM_Base_Start(&htim3); //Æô¶¯¶¨Ê±Æ÷ + HAL_TIM_PWM_Start(&htim3,TIM_CHANNEL_1); + HAL_TIM_PWM_Start(&htim3,TIM_CHANNEL_2); + HAL_TIM_PWM_Start(&htim3,TIM_CHANNEL_3); +} + +void moto_Init() +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + + GPIO_InitStruct.Pin = GPIO_PIN_0; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + + GPIO_InitStruct.Pin = GPIO_PIN_9; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_0,1); + HAL_GPIO_WritePin(GPIOC,GPIO_PIN_9,1); + + PWM_Start(); + + HAL_Delay(1000); + alignSensor(motory,&FOCStruct_Y); + alignSensor(motorx,&FOCStruct_X); + HAL_Delay(50); +} + +int alignSensor(unsigned char moto,FOCTypeDef * FOCStruct) +{ + long i; + float angle; + float mid_angle = 0,end_angle = 0; + float moved; + float q = 3.5; + printf("MOT: Align sensor.\r\n"); + + // find natural direction + // move one electrical revolution forward + HAL_Delay(100); + for(i=0; i<=500; i++) + { + angle = _3PI_2 + _2PI * i / 500.0; + setPhaseVoltage(moto,q, 0, angle); + HAL_Delay(2); + } + mid_angle=getAngle(moto); + for(i=500; i>=0; i--) + { + angle = _3PI_2 + _2PI * i / 500.0 ; + setPhaseVoltage(moto,q, 0, angle); + HAL_Delay(2); + } + end_angle=getAngle(moto); + setPhaseVoltage(moto,0, 0, 0); + HAL_Delay(200); + + printf("mid_angle=%.4f\r\n",mid_angle); + printf("end_angle=%.4f\r\n",end_angle); + + moved = fabs(mid_angle - end_angle); + if((mid_angle == end_angle)||(moved < 0.02)) //ÏàµÈ»òÕß¼¸ºõûÓж¯ + { + printf("MOT: Failed to notice movement loop222.\r\n"); +// M1_Disable; //µç»ú¼ì²â²»Õý³££¬¹Ø±ÕÇý¶¯ + return 0; + } + else if(mid_angle < end_angle) + { + printf("MOT: sensor_direction==CCW\r\n"); +// dir = -1; + } + else + { + printf("MOT: sensor_direction==CW\r\n"); +// dir = 1; + } + printf("MOT: PP check: \n"); //¼ÆËãPole_Pairs + int pp; + if( fabs(moved*Pole_Pairs - _2PI) > 0.5 ) // 0.5 is arbitrary number it can be lower or higher! + { + printf("fail - estimated pp\n"); + pp = _2PI/moved+0.5; //¸¡µãÊýתÕûÐΣ¬ËÄÉáÎåÈë + printf("pp=%d\r\n",pp); + } + else + printf("OK!\r\n"); + setPhaseVoltage(moto,q,0,_3PI_2); //¼ÆËãÁãµãÆ«ÒÆ½Ç¶È + HAL_Delay(700); + FOCStruct->zero_electric_angle = _normalizeAngle(dir*getAngle(moto) * Pole_Pairs); +// delay_ms(20); +// printf("MOT: Zero elec. angle:"); +// printf("%.4f\r\n",zero_electric_angle); + + setPhaseVoltage(moto,0, 0, 0); + HAL_Delay(50); + + return 1; +} + + diff --git a/APP/foc.h b/APP/foc.h new file mode 100644 index 0000000..b7b07c7 --- /dev/null +++ b/APP/foc.h @@ -0,0 +1,40 @@ +// +// Created by hu123456 on 2024/1/16. +// + +#ifndef FOC_N_FOC_H +#define FOC_N_FOC_H + +#include "mymain.h" + +typedef struct +{ + float ZT_KP; + float ZT_KI; + float ZT_KD; + float V_KP; + float V_KI; + float V_KD; + float ZT_ErrorPrev; + float V_Prev; + float V_Pid_IPrev; + float V_Error_Prev; + float V_Out_Prev; + float zero_electric_angle; + double Angle_Prev; + unsigned long Time_Prev; +}FOCTypeDef; +extern FOCTypeDef FOCStruct_X; +extern FOCTypeDef FOCStruct_Y; + +int alignSensor(unsigned char moto,FOCTypeDef * FOCStruct); +void PID_Iint(void); +double _normalizeAngle(float angle); +double LPF_velocity(double x,FOCTypeDef *FOCStruct); +void speed_closed_loop(unsigned motor,FOCTypeDef *FOCStruct,float V_Target); +void Zitai_closed_loop(unsigned motor,FOCTypeDef *FOCStruct,float ZT_Error); +void Angel_closed_loop(unsigned motor,FOCTypeDef *FOCStruct,float Angle_target); + +void PWM_Start(); +void moto_Init(); +#endif //FOC_N_FOC_H diff --git a/APP/mymain.c b/APP/mymain.c new file mode 100644 index 0000000..c99bf0e --- /dev/null +++ b/APP/mymain.c @@ -0,0 +1,55 @@ +// +// Created by hu123456 on 2024/1/16. +// + +#include "mymain.h" + +void mymain() +{ + HAL_Delay(2000); + led_init(); + tle5012b_init(); + Init_ICM42688(); + imu_rest(); + moto_Init(); + PID_Iint(); + setvbuf(stdout, NULL, _IONBF, 0); //½â¾öprintfûÓÐ\n²»·¢ËÍÎÊÌâ + float x = 0,y=0; + unsigned int i =0; + HAL_TIM_Base_Start(&htim5); //Æô¶¯¶¨Ê±Æ÷ + while(i<3300*3) + { + Angel_closed_loop(motorx,&FOCStruct_X,-0.2); + Angel_closed_loop(motory,&FOCStruct_Y,0.7); + i++; + } + LED_ON; + + + while(1) + { + MpuGetData();// + + + + GetAngle(&ICM42688,&Angle); + x = Angle.pitch; + y = Angle.roll ; +// Zitai_closed_loop(motorx,&FOCStruct_X,x); +// Zitai_closed_loop(motory,&FOCStruct_Y,-y); +// x = getAngle(motorx); +// y = getAngle(motory); +// printf("%fY%f\n",x,y); +// speed_closed_loop(motorx,&FOCStruct_X,_2PI*5); +// speed_closed_loop(motory,&FOCStruct_Y,_2PI*2); +// printf("b%d\n",b); +// if(i%3000 ==0) +// { +// printf("%d\n",i); +// } +// i++; +// + Data_send(x,y,0,0); +// HAL_Delay(3); + } +} \ No newline at end of file diff --git a/APP/mymain.h b/APP/mymain.h new file mode 100644 index 0000000..35c55ef --- /dev/null +++ b/APP/mymain.h @@ -0,0 +1,33 @@ +// +// Created by hu123456 on 2024/1/16. +// + +#ifndef FOC_N_MYMAIN_H +#define FOC_N_MYMAIN_H +#define motory 0x01 +#define motorx 0x02 +#define _PI 3.14159265359 +#define _PI_2 1.57079632679 +#define _PI_3 1.0471975512 +#define _2PI 6.28318530718 +#define _3PI_2 4.71238898038 +#define _PI_6 0.52359877559 + + +#include "main.h" +#include "tim.h" +#include "usart.h" +#include "gpio.h" +#include "tle5012b.h" +#include "stdio.h" +#include "math.h" +#include "foc.h" +#include "spi.h" +#include "imu.h" +#include "icm42688.h" +#include "alldata.h" +#include "usart_ano.h" +#include "LED.h" +void mymain(); + +#endif //FOC_N_MYMAIN_H diff --git a/APP/tle5012b.c b/APP/tle5012b.c new file mode 100644 index 0000000..0407d28 --- /dev/null +++ b/APP/tle5012b.c @@ -0,0 +1,214 @@ +// +// Created by hu123456 on 2024/1/16. +// + +#include "tle5012b.h" +long cpr =32767; +float motory_full_rotation_offset=0,motorx_full_rotation_offset=0; +long motory_angle_data_prev =0,motorx_angle_data_prev = 0; + + +//void tle5012b_init(void) +//{ +// // ³õʼ»¯TLE5012B´«¸ÐÆ÷ +// GPIO_InitTypeDef GPIO_InitStruct = {0}; +// __HAL_RCC_GPIOA_CLK_ENABLE(); +// +// GPIO_InitStruct.Pin = GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5; +// GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +// GPIO_InitStruct.Pull = GPIO_NOPULL; +// GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +// HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +// HAL_GPIO_WritePin(GPIOA, GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5, GPIO_PIN_RESET); +// +// HAL_Delay(10); +// getAngle(motory); +// getAngle(motorx); +//} +// +//void mosi() +//{ +// GPIO_InitTypeDef GPIO_InitStruct = {0}; +// __HAL_RCC_GPIOA_CLK_ENABLE(); +// +// GPIO_InitStruct.Pin = GPIO_PIN_7; +// GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +// GPIO_InitStruct.Pull = GPIO_NOPULL; +// GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +// HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +// +// /*Configure GPIO pins : PBPin PB14 */ +// GPIO_InitStruct.Pin = GPIO_PIN_6; +// GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +// GPIO_InitStruct.Pull = GPIO_NOPULL; +// HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +//} +// +//void miso() +//{ +// GPIO_InitTypeDef GPIO_InitStruct = {0}; +// __HAL_RCC_GPIOA_CLK_ENABLE(); +// +// GPIO_InitStruct.Pin = GPIO_PIN_6 | GPIO_PIN_7; +// GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +// GPIO_InitStruct.Pull = GPIO_NOPULL; +// HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +//} +// +//static void Write_16bit(unsigned short dat) +//{ +// mosi(); +// for(uint8_t i = 0; i < 16; i++) +// { +// HAL_GPIO_WritePin(GPIOA,GPIO_PIN_5,1); +// +// if(dat&0x8000) HAL_GPIO_WritePin(GPIOA,GPIO_PIN_7,1); +// else HAL_GPIO_WritePin(GPIOA,GPIO_PIN_7,0); +// HAL_GPIO_WritePin(GPIOA,GPIO_PIN_5,0); +// dat <<= 1; +// } +//} +// +//static void Read_16bit(unsigned short *dat) +//{ +// miso(); +// *dat = 0; +// for(uint8_t i = 0; i < 16; i++) { +// HAL_GPIO_WritePin(GPIOA,GPIO_PIN_5,1); +// *dat <<= 1; +// HAL_GPIO_WritePin(GPIOA,GPIO_PIN_5,0); +// *dat |= HAL_GPIO_ReadPin(GPIOA,GPIO_PIN_6) ? 1 : 0; +// } +//} +// +//uint16_t ReadTLE5012B_1(uint16_t u16RegValue) +//{ +// uint16_t u16Data; +// Write_16bit(u16RegValue); +// Read_16bit(&u16Data); +// return u16Data; +//} +// +//double getAngle(unsigned char motor) +//{ +// float angle_data,d_angle; +// if(motor == motory) +// { +// TLE_CS1_ENABLE; +// angle_data = ReadTLE5012B_1(READ_ANGLE_VALUE)&0x7FFF; +// d_angle = angle_data - motory_angle_data_prev; +// if(fabs(d_angle) > (0.8*cpr) ) motory_full_rotation_offset += d_angle > 0 ? -_2PI : _2PI; +// motory_angle_data_prev = angle_data; +// TLE_CS1_DISABLE; +// return (motory_full_rotation_offset + ( angle_data / (float)cpr) * _2PI) ; +// } +// else +// { +// TLE_CS2_ENABLE; +// angle_data = ReadTLE5012B_1(READ_ANGLE_VALUE)&0x7FFF; +// d_angle = angle_data - motorx_angle_data_prev; +// if(fabs(d_angle) > (0.8*cpr) ) motorx_full_rotation_offset += d_angle > 0 ? -_2PI : _2PI; +// motorx_angle_data_prev = angle_data; +// TLE_CS2_DISABLE; +// return (motorx_full_rotation_offset + ( angle_data / (float)cpr) * _2PI) ; +// } +//} +/******************************************************************************/ + + + +///////Ó²¼þ + + +void tle5012b_init(void) +{ + // ³õʼ»¯TLE5012B´«¸ÐÆ÷ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + __HAL_RCC_GPIOA_CLK_ENABLE(); + + GPIO_InitStruct.Pin = GPIO_PIN_3 | GPIO_PIN_4; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_3 | GPIO_PIN_4, GPIO_PIN_RESET); + + HAL_Delay(10); + getAngle(motory); + getAngle(motorx); + FOCStruct_X.Angle_Prev = getAngle(motorx); + FOCStruct_Y.Angle_Prev = getAngle(motory); +} + +void SPI2_TX_OFF() +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + __HAL_RCC_GPIOA_CLK_ENABLE(); +/**SPI1 GPIO Configuration +PA5 ------> SPI1_SCK +PA6 ------> SPI1_MISO +PA7 ------> SPI1_MOSI +*/ + GPIO_InitStruct.Pin = GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +} + +void SPI2_TX_ON() +{ + GPIO_InitTypeDef GPIO_InitStruct = {0}; + __HAL_RCC_GPIOA_CLK_ENABLE(); + GPIO_InitStruct.Pin = GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +} + + +double getAngle(unsigned char motor) +{ + long angle_data,d_angle; + if(motor == motory) + { + TLE_CS1_ENABLE; + angle_data = ReadTLE5012B_1(READ_ANGLE_VALUE); + d_angle = angle_data - motory_angle_data_prev; + if(fabs(d_angle) > (0.8*cpr) ) motory_full_rotation_offset += d_angle > 0 ? -_2PI : _2PI; + motory_angle_data_prev = angle_data; + TLE_CS1_DISABLE; + return (motory_full_rotation_offset + ( angle_data / (float)cpr) * _2PI) ; + } + else + { + TLE_CS2_ENABLE; + angle_data = ReadTLE5012B_1(READ_ANGLE_VALUE); + d_angle = angle_data - motorx_angle_data_prev; + if(fabs(d_angle) > (0.8*cpr) ) motorx_full_rotation_offset += d_angle > 0 ? -_2PI : _2PI; + motorx_angle_data_prev = angle_data; + TLE_CS2_DISABLE; + return (motorx_full_rotation_offset + ( angle_data / (float)cpr) * _2PI) ; + } +} + + +uint16_t ReadTLE5012B_1(uint16_t u16RegValue) +{ + uint16_t u16Data; + HAL_SPI_Transmit( &hspi1, (uint8_t *)(&u16RegValue), sizeof(u16RegValue)/sizeof(uint16_t), 0xff ); + SPI2_TX_OFF(); + HAL_SPI_Receive( &hspi1,(uint8_t *)(&u16Data), sizeof(u16Data)/sizeof(uint16_t), 0xff ); + SPI2_TX_ON(); + return (u16Data & 0x7FFF); +} + + + + + +//uint16_t ReadSpeed(void) +//{ +// return ReadTLE5012B_1(READ_SPEED_VALUE); +//} diff --git a/APP/tle5012b.h b/APP/tle5012b.h new file mode 100644 index 0000000..73f76bb --- /dev/null +++ b/APP/tle5012b.h @@ -0,0 +1,21 @@ +// +// Created by hu123456 on 2024/1/16. +// + +#ifndef FOC_N_TLE5012B_H +#define FOC_N_TLE5012B_H +#include "mymain.h" + +#define READ_ANGLE_VALUE 0x8020 //8021 // 20: NO CRC +#define READ_SPEED_VALUE 0x8030 //8031 // 30: NO CRC +#define TLE_CS1_ENABLE HAL_GPIO_WritePin( GPIOA, GPIO_PIN_3, 0 ) +#define TLE_CS1_DISABLE HAL_GPIO_WritePin( GPIOA, GPIO_PIN_3, 1 ) +#define TLE_CS2_ENABLE HAL_GPIO_WritePin( GPIOA, GPIO_PIN_4, 0 ) +#define TLE_CS2_DISABLE HAL_GPIO_WritePin( GPIOA, GPIO_PIN_4, 1 ) + + + +void tle5012b_init(void); +double getAngle(unsigned char motor); +uint16_t ReadTLE5012B_1(uint16_t u16RegValue); +#endif //FOC_N_TLE5012B_H diff --git a/APP/usart_ano.c b/APP/usart_ano.c new file mode 100644 index 0000000..4d3b6a9 --- /dev/null +++ b/APP/usart_ano.c @@ -0,0 +1,51 @@ +// +// Created by hu123456 on 2024/1/22. +// + +#include "usart_ano.h" +unsigned char Data_Buff[32] ={0XAA,0XFF,0XF1}; +//AA FF F1 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 AA 37 +void Data_send(int32_t _a,int32_t _b,int32_t _c,int32_t _d) +{ + unsigned char i,cnt=4; + unsigned char sc=0,ac=0; + + Data_Buff[cnt++] = BYTE0(_a); + Data_Buff[cnt++] = BYTE1(_a); + Data_Buff[cnt++] = BYTE2(_a); + Data_Buff[cnt++] = BYTE3(_a); + + Data_Buff[cnt++] = BYTE0(_b); + Data_Buff[cnt++] = BYTE1(_b); + Data_Buff[cnt++] = BYTE2(_b); + Data_Buff[cnt++] = BYTE3(_b); + + Data_Buff[cnt++] = BYTE0(_c); + Data_Buff[cnt++] = BYTE1(_c); + Data_Buff[cnt++] = BYTE2(_c); + Data_Buff[cnt++] = BYTE3(_c); + + Data_Buff[cnt++] = BYTE0(_d); + Data_Buff[cnt++] = BYTE1(_d); + Data_Buff[cnt++] = BYTE2(_d); + Data_Buff[cnt++] = BYTE3(_d); + + + Data_Buff[3]=cnt-4; + + for(i=0;iTDR = Data_Buff[i]; + while((USART1->ISR & USART_ISR_TC) == 0) + {} + } +} diff --git a/APP/usart_ano.h b/APP/usart_ano.h new file mode 100644 index 0000000..86251dd --- /dev/null +++ b/APP/usart_ano.h @@ -0,0 +1,15 @@ +// +// Created by hu123456 on 2024/1/22. +// + +#ifndef FOC_N_USART_ANO_H +#define FOC_N_USART_ANO_H +#include "mymain.h" +#define BYTE0(dwTemp) ( *( (char *)(&dwTemp) + 0) ) +#define BYTE1(dwTemp) ( *( (char *)(&dwTemp) + 1) ) +#define BYTE2(dwTemp) ( *( (char *)(&dwTemp) + 2) ) +#define BYTE3(dwTemp) ( *( (char *)(&dwTemp) + 3) ) + + +void Data_send(int32_t _a,int32_t _b,int32_t _c,int32_t _d); +#endif //FOC_N_USART_ANO_H diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 0000000..05a677c --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,73 @@ +#´ËÎļþ´ÓÄ£°å×Ô¶¯Éú³É! ÇëÎð¸ü¸Ä! +set(CMAKE_SYSTEM_NAME Generic) +set(CMAKE_SYSTEM_VERSION 1) +cmake_minimum_required(VERSION 3.27) + +# specify cross-compilers and tools +set(CMAKE_C_COMPILER arm-none-eabi-gcc) +set(CMAKE_CXX_COMPILER arm-none-eabi-g++) +set(CMAKE_ASM_COMPILER arm-none-eabi-gcc) +set(CMAKE_AR arm-none-eabi-ar) +set(CMAKE_OBJCOPY arm-none-eabi-objcopy) +set(CMAKE_OBJDUMP arm-none-eabi-objdump) +set(SIZE arm-none-eabi-size) +set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY) + +# project settings +project(foc_n C CXX ASM) +set(CMAKE_CXX_STANDARD 17) +set(CMAKE_C_STANDARD 11) + +#Uncomment for hardware floating point +#add_compile_definitions(ARM_MATH_CM4;ARM_MATH_MATRIX_CHECK;ARM_MATH_ROUNDING) +#add_compile_options(-mfloat-abi=hard -mfpu=fpv4-sp-d16) +#add_link_options(-mfloat-abi=hard -mfpu=fpv4-sp-d16) + +#Uncomment for software floating point +#add_compile_options(-mfloat-abi=soft) + +add_compile_options(-mcpu=cortex-m7 -mthumb -mthumb-interwork) +add_compile_options(-ffunction-sections -fdata-sections -fno-common -fmessage-length=0) + +# uncomment to mitigate c++17 absolute addresses warnings +#set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -Wno-register") + +# Enable assembler files preprocessing +add_compile_options($<$:-x$assembler-with-cpp>) + +if ("${CMAKE_BUILD_TYPE}" STREQUAL "Release") + message(STATUS "Maximum optimization for speed") + add_compile_options(-Ofast) +elseif ("${CMAKE_BUILD_TYPE}" STREQUAL "RelWithDebInfo") + message(STATUS "Maximum optimization for speed, debug info included") + add_compile_options(-Ofast -g) +elseif ("${CMAKE_BUILD_TYPE}" STREQUAL "MinSizeRel") + message(STATUS "Maximum optimization for size") + add_compile_options(-Os) +else () + message(STATUS "Minimal optimization, debug info included") + add_compile_options(-Og -g) +endif () + +include_directories(Core/Inc Drivers/STM32H7xx_HAL_Driver/Inc Drivers/STM32H7xx_HAL_Driver/Inc/Legacy Drivers/CMSIS/Device/ST/STM32H7xx/Include Drivers/CMSIS/Include) +include_directories(APP IMU) +add_definitions(-DDEBUG -DUSE_HAL_DRIVER -DSTM32H750xx) + +file(GLOB_RECURSE SOURCES "Core/*.*" "Drivers/*.*" "APP/*.*" "IMU/*.*") + +set(LINKER_SCRIPT ${CMAKE_SOURCE_DIR}/STM32H750VBTX_FLASH.ld) + +add_link_options(-Wl,-gc-sections,--print-memory-usage,-Map=${PROJECT_BINARY_DIR}/${PROJECT_NAME}.map) +add_link_options(-mcpu=cortex-m7 -mthumb -mthumb-interwork) +add_link_options(-T ${LINKER_SCRIPT}) + +add_executable(${PROJECT_NAME}.elf ${SOURCES} ${LINKER_SCRIPT}) + +set(HEX_FILE ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.hex) +set(BIN_FILE ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.bin) + +add_custom_command(TARGET ${PROJECT_NAME}.elf POST_BUILD + COMMAND ${CMAKE_OBJCOPY} -Oihex $ ${HEX_FILE} + COMMAND ${CMAKE_OBJCOPY} -Obinary $ ${BIN_FILE} + COMMENT "Building ${HEX_FILE} +Building ${BIN_FILE}") diff --git a/Core/Inc/gpio.h b/Core/Inc/gpio.h new file mode 100644 index 0000000..708bac7 --- /dev/null +++ b/Core/Inc/gpio.h @@ -0,0 +1,49 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file gpio.h + * @brief This file contains all the function prototypes for + * the gpio.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __GPIO_H__ +#define __GPIO_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_GPIO_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif +#endif /*__ GPIO_H__ */ + diff --git a/Core/Inc/main.h b/Core/Inc/main.h new file mode 100644 index 0000000..b84f3e8 --- /dev/null +++ b/Core/Inc/main.h @@ -0,0 +1,68 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H +#define __MAIN_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32h7xx_hal.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void Error_Handler(void); + +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +/* Private defines -----------------------------------------------------------*/ +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H */ diff --git a/Core/Inc/spi.h b/Core/Inc/spi.h new file mode 100644 index 0000000..6a5279d --- /dev/null +++ b/Core/Inc/spi.h @@ -0,0 +1,52 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file spi.h + * @brief This file contains all the function prototypes for + * the spi.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __SPI_H__ +#define __SPI_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern SPI_HandleTypeDef hspi1; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_SPI1_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __SPI_H__ */ + diff --git a/Core/Inc/stm32h7xx_hal_conf.h b/Core/Inc/stm32h7xx_hal_conf.h new file mode 100644 index 0000000..ffafaa9 --- /dev/null +++ b/Core/Inc/stm32h7xx_hal_conf.h @@ -0,0 +1,510 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32h7xx_hal_conf.h + * @author MCD Application Team + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef STM32H7xx_HAL_CONF_H +#define STM32H7xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ +#define HAL_MODULE_ENABLED + + /* #define HAL_ADC_MODULE_ENABLED */ +/* #define HAL_FDCAN_MODULE_ENABLED */ +/* #define HAL_FMAC_MODULE_ENABLED */ +/* #define HAL_CEC_MODULE_ENABLED */ +/* #define HAL_COMP_MODULE_ENABLED */ +/* #define HAL_CORDIC_MODULE_ENABLED */ +/* #define HAL_CRC_MODULE_ENABLED */ +/* #define HAL_CRYP_MODULE_ENABLED */ +/* #define HAL_DAC_MODULE_ENABLED */ +/* #define HAL_DCMI_MODULE_ENABLED */ +/* #define HAL_DMA2D_MODULE_ENABLED */ +/* #define HAL_ETH_MODULE_ENABLED */ +/* #define HAL_NAND_MODULE_ENABLED */ +/* #define HAL_NOR_MODULE_ENABLED */ +/* #define HAL_OTFDEC_MODULE_ENABLED */ +/* #define HAL_SRAM_MODULE_ENABLED */ +/* #define HAL_SDRAM_MODULE_ENABLED */ +/* #define HAL_HASH_MODULE_ENABLED */ +/* #define HAL_HRTIM_MODULE_ENABLED */ +/* #define HAL_HSEM_MODULE_ENABLED */ +/* #define HAL_GFXMMU_MODULE_ENABLED */ +/* #define HAL_JPEG_MODULE_ENABLED */ +/* #define HAL_OPAMP_MODULE_ENABLED */ +/* #define HAL_OSPI_MODULE_ENABLED */ +/* #define HAL_OSPI_MODULE_ENABLED */ +/* #define HAL_I2S_MODULE_ENABLED */ +/* #define HAL_SMBUS_MODULE_ENABLED */ +/* #define HAL_IWDG_MODULE_ENABLED */ +/* #define HAL_LPTIM_MODULE_ENABLED */ +/* #define HAL_LTDC_MODULE_ENABLED */ +/* #define HAL_QSPI_MODULE_ENABLED */ +/* #define HAL_RAMECC_MODULE_ENABLED */ +/* #define HAL_RNG_MODULE_ENABLED */ +/* #define HAL_RTC_MODULE_ENABLED */ +/* #define HAL_SAI_MODULE_ENABLED */ +/* #define HAL_SD_MODULE_ENABLED */ +/* #define HAL_MMC_MODULE_ENABLED */ +/* #define HAL_SPDIFRX_MODULE_ENABLED */ +#define HAL_SPI_MODULE_ENABLED +/* #define HAL_SWPMI_MODULE_ENABLED */ +#define HAL_TIM_MODULE_ENABLED +#define HAL_UART_MODULE_ENABLED +/* #define HAL_USART_MODULE_ENABLED */ +/* #define HAL_IRDA_MODULE_ENABLED */ +/* #define HAL_SMARTCARD_MODULE_ENABLED */ +/* #define HAL_WWDG_MODULE_ENABLED */ +/* #define HAL_PCD_MODULE_ENABLED */ +/* #define HAL_HCD_MODULE_ENABLED */ +/* #define HAL_DFSDM_MODULE_ENABLED */ +/* #define HAL_DSI_MODULE_ENABLED */ +/* #define HAL_JPEG_MODULE_ENABLED */ +/* #define HAL_MDIOS_MODULE_ENABLED */ +/* #define HAL_PSSI_MODULE_ENABLED */ +/* #define HAL_DTS_MODULE_ENABLED */ +#define HAL_GPIO_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_MDMA_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_EXTI_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_I2C_MODULE_ENABLED +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_HSEM_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) +#define HSE_VALUE (25000000UL) /*!< Value of the External oscillator in Hz : FPGA case fixed to 60MHZ */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT (100UL) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal oscillator (CSI) default value. + * This value is the default CSI value after Reset. + */ +#if !defined (CSI_VALUE) + #define CSI_VALUE (4000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* CSI_VALUE */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE (64000000UL) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE (32768UL) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +#if !defined (LSI_VALUE) + #define LSI_VALUE (32000UL) /*!< LSI Typical Value in Hz*/ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature.*/ + +/** + * @brief External clock source for I2S peripheral + * This value is used by the I2S HAL module to compute the I2S clock source + * frequency, this source is inserted directly through I2S_CKIN pad. + */ +#if !defined (EXTERNAL_CLOCK_VALUE) + #define EXTERNAL_CLOCK_VALUE 12288000UL /*!< Value of the External clock in Hz*/ +#endif /* EXTERNAL_CLOCK_VALUE */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE (3300UL) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY (15UL) /*!< tick interrupt priority */ +#define USE_RTOS 0 +#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */ +#define USE_SPI_CRC 0U /*!< use CRC in SPI */ + +#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */ +#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */ +#define USE_HAL_COMP_REGISTER_CALLBACKS 0U /* COMP register callback disabled */ +#define USE_HAL_CORDIC_REGISTER_CALLBACKS 0U /* CORDIC register callback disabled */ +#define USE_HAL_CRYP_REGISTER_CALLBACKS 0U /* CRYP register callback disabled */ +#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */ +#define USE_HAL_DCMI_REGISTER_CALLBACKS 0U /* DCMI register callback disabled */ +#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ +#define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U /* DMA2D register callback disabled */ +#define USE_HAL_DSI_REGISTER_CALLBACKS 0U /* DSI register callback disabled */ +#define USE_HAL_DTS_REGISTER_CALLBACKS 0U /* DTS register callback disabled */ +#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */ +#define USE_HAL_FDCAN_REGISTER_CALLBACKS 0U /* FDCAN register callback disabled */ +#define USE_HAL_FMAC_REGISTER_CALLBACKS 0U /* FMAC register callback disabled */ +#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */ +#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */ +#define USE_HAL_SDRAM_REGISTER_CALLBACKS 0U /* SDRAM register callback disabled */ +#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */ +#define USE_HAL_HASH_REGISTER_CALLBACKS 0U /* HASH register callback disabled */ +#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */ +#define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U /* GFXMMU register callback disabled */ +#define USE_HAL_HRTIM_REGISTER_CALLBACKS 0U /* HRTIM register callback disabled */ +#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */ +#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */ +#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */ +#define USE_HAL_JPEG_REGISTER_CALLBACKS 0U /* JPEG register callback disabled */ +#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U /* LPTIM register callback disabled */ +#define USE_HAL_LTDC_REGISTER_CALLBACKS 0U /* LTDC register callback disabled */ +#define USE_HAL_MDIOS_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */ +#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */ +#define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U /* MDIO register callback disabled */ +#define USE_HAL_OSPI_REGISTER_CALLBACKS 0U /* OSPI register callback disabled */ +#define USE_HAL_OTFDEC_REGISTER_CALLBACKS 0U /* OTFDEC register callback disabled */ +#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */ +#define USE_HAL_QSPI_REGISTER_CALLBACKS 0U /* QSPI register callback disabled */ +#define USE_HAL_RNG_REGISTER_CALLBACKS 0U /* RNG register callback disabled */ +#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */ +#define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ +#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */ +#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */ +#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */ +#define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U /* SMBUS register callback disabled */ +#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */ +#define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U /* SWPMI register callback disabled */ +#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */ +#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */ +#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */ +#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */ + +/* ########################### Ethernet Configuration ######################### */ +#define ETH_TX_DESC_CNT 4 /* number of Ethernet Tx DMA descriptors */ +#define ETH_RX_DESC_CNT 4 /* number of Ethernet Rx DMA descriptors */ + +#define ETH_MAC_ADDR0 (0x02UL) +#define ETH_MAC_ADDR1 (0x00UL) +#define ETH_MAC_ADDR2 (0x00UL) +#define ETH_MAC_ADDR3 (0x00UL) +#define ETH_MAC_ADDR4 (0x00UL) +#define ETH_MAC_ADDR5 (0x00UL) + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32h7xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32h7xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32h7xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_MDMA_MODULE_ENABLED + #include "stm32h7xx_hal_mdma.h" +#endif /* HAL_MDMA_MODULE_ENABLED */ + +#ifdef HAL_HASH_MODULE_ENABLED + #include "stm32h7xx_hal_hash.h" +#endif /* HAL_HASH_MODULE_ENABLED */ + +#ifdef HAL_DCMI_MODULE_ENABLED + #include "stm32h7xx_hal_dcmi.h" +#endif /* HAL_DCMI_MODULE_ENABLED */ + +#ifdef HAL_DMA2D_MODULE_ENABLED + #include "stm32h7xx_hal_dma2d.h" +#endif /* HAL_DMA2D_MODULE_ENABLED */ + +#ifdef HAL_DSI_MODULE_ENABLED + #include "stm32h7xx_hal_dsi.h" +#endif /* HAL_DSI_MODULE_ENABLED */ + +#ifdef HAL_DFSDM_MODULE_ENABLED + #include "stm32h7xx_hal_dfsdm.h" +#endif /* HAL_DFSDM_MODULE_ENABLED */ + +#ifdef HAL_DTS_MODULE_ENABLED + #include "stm32h7xx_hal_dts.h" +#endif /* HAL_DTS_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32h7xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_EXTI_MODULE_ENABLED + #include "stm32h7xx_hal_exti.h" +#endif /* HAL_EXTI_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32h7xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32h7xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_FDCAN_MODULE_ENABLED + #include "stm32h7xx_hal_fdcan.h" +#endif /* HAL_FDCAN_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32h7xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_COMP_MODULE_ENABLED + #include "stm32h7xx_hal_comp.h" +#endif /* HAL_COMP_MODULE_ENABLED */ + +#ifdef HAL_CORDIC_MODULE_ENABLED + #include "stm32h7xx_hal_cordic.h" +#endif /* HAL_CORDIC_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32h7xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_CRYP_MODULE_ENABLED + #include "stm32h7xx_hal_cryp.h" +#endif /* HAL_CRYP_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32h7xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32h7xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_GFXMMU_MODULE_ENABLED + #include "stm32h7xx_hal_gfxmmu.h" +#endif /* HAL_GFXMMU_MODULE_ENABLED */ + +#ifdef HAL_FMAC_MODULE_ENABLED + #include "stm32h7xx_hal_fmac.h" +#endif /* HAL_FMAC_MODULE_ENABLED */ + +#ifdef HAL_HRTIM_MODULE_ENABLED + #include "stm32h7xx_hal_hrtim.h" +#endif /* HAL_HRTIM_MODULE_ENABLED */ + +#ifdef HAL_HSEM_MODULE_ENABLED + #include "stm32h7xx_hal_hsem.h" +#endif /* HAL_HSEM_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32h7xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32h7xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32h7xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32h7xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32h7xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32h7xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_JPEG_MODULE_ENABLED + #include "stm32h7xx_hal_jpeg.h" +#endif /* HAL_JPEG_MODULE_ENABLED */ + +#ifdef HAL_MDIOS_MODULE_ENABLED + #include "stm32h7xx_hal_mdios.h" +#endif /* HAL_MDIOS_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32h7xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_LPTIM_MODULE_ENABLED +#include "stm32h7xx_hal_lptim.h" +#endif /* HAL_LPTIM_MODULE_ENABLED */ + +#ifdef HAL_LTDC_MODULE_ENABLED +#include "stm32h7xx_hal_ltdc.h" +#endif /* HAL_LTDC_MODULE_ENABLED */ + +#ifdef HAL_OPAMP_MODULE_ENABLED +#include "stm32h7xx_hal_opamp.h" +#endif /* HAL_OPAMP_MODULE_ENABLED */ + +#ifdef HAL_OSPI_MODULE_ENABLED + #include "stm32h7xx_hal_ospi.h" +#endif /* HAL_OSPI_MODULE_ENABLED */ + +#ifdef HAL_OTFDEC_MODULE_ENABLED +#include "stm32h7xx_hal_otfdec.h" +#endif /* HAL_OTFDEC_MODULE_ENABLED */ + +#ifdef HAL_PSSI_MODULE_ENABLED + #include "stm32h7xx_hal_pssi.h" +#endif /* HAL_PSSI_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32h7xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_QSPI_MODULE_ENABLED + #include "stm32h7xx_hal_qspi.h" +#endif /* HAL_QSPI_MODULE_ENABLED */ + +#ifdef HAL_RAMECC_MODULE_ENABLED + #include "stm32h7xx_hal_ramecc.h" +#endif /* HAL_RAMECC_MODULE_ENABLED */ + +#ifdef HAL_RNG_MODULE_ENABLED + #include "stm32h7xx_hal_rng.h" +#endif /* HAL_RNG_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32h7xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_SAI_MODULE_ENABLED + #include "stm32h7xx_hal_sai.h" +#endif /* HAL_SAI_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32h7xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_SDRAM_MODULE_ENABLED + #include "stm32h7xx_hal_sdram.h" +#endif /* HAL_SDRAM_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32h7xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_SPDIFRX_MODULE_ENABLED + #include "stm32h7xx_hal_spdifrx.h" +#endif /* HAL_SPDIFRX_MODULE_ENABLED */ + +#ifdef HAL_SWPMI_MODULE_ENABLED + #include "stm32h7xx_hal_swpmi.h" +#endif /* HAL_SWPMI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32h7xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32h7xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32h7xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32h7xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32h7xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_SMBUS_MODULE_ENABLED + #include "stm32h7xx_hal_smbus.h" +#endif /* HAL_SMBUS_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32h7xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32h7xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32h7xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t *file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* STM32H7xx_HAL_CONF_H */ diff --git a/Core/Inc/stm32h7xx_it.h b/Core/Inc/stm32h7xx_it.h new file mode 100644 index 0000000..7fcda7d --- /dev/null +++ b/Core/Inc/stm32h7xx_it.h @@ -0,0 +1,66 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32h7xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32H7xx_IT_H +#define __STM32H7xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Exported types ------------------------------------------------------------*/ +/* USER CODE BEGIN ET */ + +/* USER CODE END ET */ + +/* Exported constants --------------------------------------------------------*/ +/* USER CODE BEGIN EC */ + +/* USER CODE END EC */ + +/* Exported macro ------------------------------------------------------------*/ +/* USER CODE BEGIN EM */ + +/* USER CODE END EM */ + +/* Exported functions prototypes ---------------------------------------------*/ +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +/* USER CODE BEGIN EFP */ + +/* USER CODE END EFP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32H7xx_IT_H */ diff --git a/Core/Inc/tim.h b/Core/Inc/tim.h new file mode 100644 index 0000000..82cd2e8 --- /dev/null +++ b/Core/Inc/tim.h @@ -0,0 +1,60 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file tim.h + * @brief This file contains all the function prototypes for + * the tim.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __TIM_H__ +#define __TIM_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern TIM_HandleTypeDef htim2; + +extern TIM_HandleTypeDef htim3; + +extern TIM_HandleTypeDef htim5; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_TIM2_Init(void); +void MX_TIM3_Init(void); +void MX_TIM5_Init(void); + +void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __TIM_H__ */ + diff --git a/Core/Inc/usart.h b/Core/Inc/usart.h new file mode 100644 index 0000000..b8f18ef --- /dev/null +++ b/Core/Inc/usart.h @@ -0,0 +1,52 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file usart.h + * @brief This file contains all the function prototypes for + * the usart.c file + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USART_H__ +#define __USART_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +extern UART_HandleTypeDef huart1; + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +void MX_USART1_UART_Init(void); + +/* USER CODE BEGIN Prototypes */ + +/* USER CODE END Prototypes */ + +#ifdef __cplusplus +} +#endif + +#endif /* __USART_H__ */ + diff --git a/Core/Src/gpio.c b/Core/Src/gpio.c new file mode 100644 index 0000000..0c995c2 --- /dev/null +++ b/Core/Src/gpio.c @@ -0,0 +1,51 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file gpio.c + * @brief This file provides code for the configuration + * of all used GPIO pins. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "gpio.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/*----------------------------------------------------------------------------*/ +/* Configure GPIO */ +/*----------------------------------------------------------------------------*/ +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/** Configure pins + PH0-OSC_IN (PH0) ------> RCC_OSC_IN + PH1-OSC_OUT (PH1) ------> RCC_OSC_OUT +*/ +void MX_GPIO_Init(void) +{ + + /* GPIO Ports Clock Enable */ + __HAL_RCC_GPIOH_CLK_ENABLE(); + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + +} + +/* USER CODE BEGIN 2 */ + +/* USER CODE END 2 */ diff --git a/Core/Src/main.c b/Core/Src/main.c new file mode 100644 index 0000000..9526a98 --- /dev/null +++ b/Core/Src/main.c @@ -0,0 +1,207 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "spi.h" +#include "tim.h" +#include "usart.h" +#include "gpio.h" + +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +#include "mymain.h" +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN PTD */ + +/* USER CODE END PTD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ + +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * @retval int + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration--------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + MX_TIM2_Init(); + MX_TIM3_Init(); + MX_TIM5_Init(); + MX_USART1_UART_Init(); + MX_SPI1_Init(); + /* USER CODE BEGIN 2 */ + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + /* USER CODE END WHILE */ + mymain(); + /* USER CODE BEGIN 3 */ + } + /* USER CODE END 3 */ +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Supply configuration update enable + */ + HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); + + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); + + while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 5; + RCC_OscInitStruct.PLL.PLLN = 192; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 6; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 + |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; + RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + { + Error_Handler(); + } +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + __disable_irq(); + while (1) + { + } + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t *file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ diff --git a/Core/Src/spi.c b/Core/Src/spi.c new file mode 100644 index 0000000..a7f05b6 --- /dev/null +++ b/Core/Src/spi.c @@ -0,0 +1,140 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file spi.c + * @brief This file provides code for the configuration + * of the SPI instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "spi.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +SPI_HandleTypeDef hspi1; + +/* SPI1 init function */ +void MX_SPI1_Init(void) +{ + + /* USER CODE BEGIN SPI1_Init 0 */ + + /* USER CODE END SPI1_Init 0 */ + + /* USER CODE BEGIN SPI1_Init 1 */ + + /* USER CODE END SPI1_Init 1 */ + hspi1.Instance = SPI1; + hspi1.Init.Mode = SPI_MODE_MASTER; + hspi1.Init.Direction = SPI_DIRECTION_2LINES; + hspi1.Init.DataSize = SPI_DATASIZE_16BIT; + hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; + hspi1.Init.CLKPhase = SPI_PHASE_2EDGE; + hspi1.Init.NSS = SPI_NSS_SOFT; + hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; + hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi1.Init.TIMode = SPI_TIMODE_DISABLE; + hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi1.Init.CRCPolynomial = 0x0; + hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + hspi1.Init.NSSPolarity = SPI_NSS_POLARITY_LOW; + hspi1.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA; + hspi1.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; + hspi1.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; + hspi1.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE; + hspi1.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE; + hspi1.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE; + hspi1.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE; + hspi1.Init.IOSwap = SPI_IO_SWAP_DISABLE; + if (HAL_SPI_Init(&hspi1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN SPI1_Init 2 */ + + /* USER CODE END SPI1_Init 2 */ + +} + +void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + if(spiHandle->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspInit 0 */ + + /* USER CODE END SPI1_MspInit 0 */ + + /** Initializes the peripherals clock + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SPI1; + PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /* SPI1 clock enable */ + __HAL_RCC_SPI1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN SPI1_MspInit 1 */ + + /* USER CODE END SPI1_MspInit 1 */ + } +} + +void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle) +{ + + if(spiHandle->Instance==SPI1) + { + /* USER CODE BEGIN SPI1_MspDeInit 0 */ + + /* USER CODE END SPI1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_SPI1_CLK_DISABLE(); + + /**SPI1 GPIO Configuration + PA5 ------> SPI1_SCK + PA6 ------> SPI1_MISO + PA7 ------> SPI1_MOSI + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); + + /* USER CODE BEGIN SPI1_MspDeInit 1 */ + + /* USER CODE END SPI1_MspDeInit 1 */ + } +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/Core/Src/stm32h7xx_hal_msp.c b/Core/Src/stm32h7xx_hal_msp.c new file mode 100644 index 0000000..d9e7804 --- /dev/null +++ b/Core/Src/stm32h7xx_hal_msp.c @@ -0,0 +1,80 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32h7xx_hal_msp.c + * @brief This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN Define */ + +/* USER CODE END Define */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN Macro */ + +/* USER CODE END Macro */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* External functions --------------------------------------------------------*/ +/* USER CODE BEGIN ExternalFunctions */ + +/* USER CODE END ExternalFunctions */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_SYSCFG_CLK_ENABLE(); + + /* System interrupt init*/ + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/Core/Src/stm32h7xx_it.c b/Core/Src/stm32h7xx_it.c new file mode 100644 index 0000000..387c207 --- /dev/null +++ b/Core/Src/stm32h7xx_it.c @@ -0,0 +1,203 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32h7xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ + +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32h7xx_it.h" +/* Private includes ----------------------------------------------------------*/ +/* USER CODE BEGIN Includes */ +/* USER CODE END Includes */ + +/* Private typedef -----------------------------------------------------------*/ +/* USER CODE BEGIN TD */ + +/* USER CODE END TD */ + +/* Private define ------------------------------------------------------------*/ +/* USER CODE BEGIN PD */ + +/* USER CODE END PD */ + +/* Private macro -------------------------------------------------------------*/ +/* USER CODE BEGIN PM */ + +/* USER CODE END PM */ + +/* Private variables ---------------------------------------------------------*/ +/* USER CODE BEGIN PV */ + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +/* USER CODE BEGIN PFP */ + +/* USER CODE END PFP */ + +/* Private user code ---------------------------------------------------------*/ +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ + +/* USER CODE BEGIN EV */ + +/* USER CODE END EV */ + +/******************************************************************************/ +/* Cortex Processor Interruption and Exception Handlers */ +/******************************************************************************/ +/** + * @brief This function handles Non maskable interrupt. + */ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + while (1) + { + } + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** + * @brief This function handles Hard fault interrupt. + */ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Memory management fault. + */ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } +} + +/** + * @brief This function handles Pre-fetch fault, memory access fault. + */ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } +} + +/** + * @brief This function handles Undefined instruction or illegal state. + */ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } +} + +/** + * @brief This function handles System service call via SWI instruction. + */ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** + * @brief This function handles Debug monitor. + */ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** + * @brief This function handles Pendable request for system service. + */ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** + * @brief This function handles System tick timer. + */ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32H7xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32h7xx.s). */ +/******************************************************************************/ + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/Core/Src/syscalls.c b/Core/Src/syscalls.c new file mode 100644 index 0000000..fadb992 --- /dev/null +++ b/Core/Src/syscalls.c @@ -0,0 +1,155 @@ +/** + ****************************************************************************** + * @file syscalls.c + * @author Auto-generated by STM32CubeIDE + * @brief STM32CubeIDE Minimal System calls file + * + * For more information about which c-functions + * need which of these lowlevel functions + * please consult the Newlib libc-manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2022 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + + +/* Variables */ +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + + +char *__env[1] = { 0 }; +char **environ = __env; + + +/* Functions */ +void initialise_monitor_handles() +{ +} + +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + errno = EINVAL; + return -1; +} + +void _exit (int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + *ptr++ = __io_getchar(); + } + +return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) + { + __io_putchar(*ptr++); + } + return len; +} + +int _close(int file) +{ + return -1; +} + + +int _fstat(int file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + return 0; +} + +int _open(char *path, int flags, ...) +{ + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + errno = ENOENT; + return -1; +} + +int _times(struct tms *buf) +{ + return -1; +} + +int _stat(char *file, struct stat *st) +{ + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + errno = ENOMEM; + return -1; +} diff --git a/Core/Src/sysmem.c b/Core/Src/sysmem.c new file mode 100644 index 0000000..54081ac --- /dev/null +++ b/Core/Src/sysmem.c @@ -0,0 +1,79 @@ +/** + ****************************************************************************** + * @file sysmem.c + * @author Generated by STM32CubeIDE + * @brief STM32CubeIDE System Memory calls file + * + * For more information about which C functions + * need which of these lowlevel functions + * please consult the newlib libc manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2022 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include + +/** + * Pointer to the current high watermark of the heap usage + */ +static uint8_t *__sbrk_heap_end = NULL; + +/** + * @brief _sbrk() allocates memory to the newlib heap and is used by malloc + * and others from the C library + * + * @verbatim + * ############################################################################ + * # .data # .bss # newlib heap # MSP stack # + * # # # # Reserved by _Min_Stack_Size # + * ############################################################################ + * ^-- RAM start ^-- _end _estack, RAM end --^ + * @endverbatim + * + * This implementation starts allocating at the '_end' linker symbol + * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack + * The implementation considers '_estack' linker symbol to be RAM end + * NOTE: If the MSP stack, at any point during execution, grows larger than the + * reserved size, please increase the '_Min_Stack_Size'. + * + * @param incr Memory size + * @return Pointer to allocated memory + */ +void *_sbrk(ptrdiff_t incr) +{ + extern uint8_t _end; /* Symbol defined in the linker script */ + extern uint8_t _estack; /* Symbol defined in the linker script */ + extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ + const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + const uint8_t *max_heap = (uint8_t *)stack_limit; + uint8_t *prev_heap_end; + + /* Initialize heap end at first call */ + if (NULL == __sbrk_heap_end) + { + __sbrk_heap_end = &_end; + } + + /* Protect heap from growing into the reserved MSP stack */ + if (__sbrk_heap_end + incr > max_heap) + { + errno = ENOMEM; + return (void *)-1; + } + + prev_heap_end = __sbrk_heap_end; + __sbrk_heap_end += incr; + + return (void *)prev_heap_end; +} diff --git a/Core/Src/system_stm32h7xx.c b/Core/Src/system_stm32h7xx.c new file mode 100644 index 0000000..c99a7b1 --- /dev/null +++ b/Core/Src/system_stm32h7xx.c @@ -0,0 +1,450 @@ +/** + ****************************************************************************** + * @file system_stm32h7xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-Mx Device Peripheral Access Layer System Source File. + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32h7xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock, it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * + ****************************************************************************** + * @attention + * + * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32h7xx_system + * @{ + */ + +/** @addtogroup STM32H7xx_System_Private_Includes + * @{ + */ + +#include "stm32h7xx.h" +#include + +#if !defined (HSE_VALUE) +#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (CSI_VALUE) + #define CSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* CSI_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)64000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to use initialized data in D2 domain SRAM (AHB SRAM) */ +/* #define DATA_IN_D2_SRAM */ + +/* Note: Following vector table addresses must be defined in line with linker + configuration. */ +/*!< Uncomment the following line if you need to relocate the vector table + anywhere in FLASH BANK1 or AXI SRAM, else the vector table is kept at the automatic + remap of boot address selected */ +/* #define USER_VECT_TAB_ADDRESS */ + +#if defined(USER_VECT_TAB_ADDRESS) +#if defined(DUAL_CORE) && defined(CORE_CM4) +/*!< Uncomment the following line if you need to relocate your vector Table + in D2 AXI SRAM else user remap will be done in FLASH BANK2. */ +/* #define VECT_TAB_SRAM */ +#if defined(VECT_TAB_SRAM) +#define VECT_TAB_BASE_ADDRESS D2_AXISRAM_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x300. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x300. */ +#else +#define VECT_TAB_BASE_ADDRESS FLASH_BANK2_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x300. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x300. */ +#endif /* VECT_TAB_SRAM */ +#else +/*!< Uncomment the following line if you need to relocate your vector Table + in D1 AXI SRAM else user remap will be done in FLASH BANK1. */ +/* #define VECT_TAB_SRAM */ +#if defined(VECT_TAB_SRAM) +#define VECT_TAB_BASE_ADDRESS D1_AXISRAM_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x300. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x300. */ +#else +#define VECT_TAB_BASE_ADDRESS FLASH_BANK1_BASE /*!< Vector Table base address field. + This value must be a multiple of 0x300. */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x300. */ +#endif /* VECT_TAB_SRAM */ +#endif /* DUAL_CORE && CORE_CM4 */ +#endif /* USER_VECT_TAB_ADDRESS */ +/******************************************************************************/ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Variables + * @{ + */ + /* This variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + Note: If you use this function to configure the system clock; then there + is no need to call the 2 first functions listed above, since SystemCoreClock + variable is updated automatically. + */ + uint32_t SystemCoreClock = 64000000; + uint32_t SystemD2Clock = 64000000; + const uint8_t D1CorePrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32H7xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the FPU setting and vector table location + * configuration. + * @param None + * @retval None + */ +void SystemInit (void) +{ +#if defined (DATA_IN_D2_SRAM) + __IO uint32_t tmpreg; +#endif /* DATA_IN_D2_SRAM */ + + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << (10*2))|(3UL << (11*2))); /* set CP10 and CP11 Full Access */ + #endif + /* Reset the RCC clock configuration to the default reset state ------------*/ + + /* Increasing the CPU frequency */ + if(FLASH_LATENCY_DEFAULT > (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))) + { + /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT)); + } + + /* Set HSION bit */ + RCC->CR |= RCC_CR_HSION; + + /* Reset CFGR register */ + RCC->CFGR = 0x00000000; + + /* Reset HSEON, HSECSSON, CSION, HSI48ON, CSIKERON, PLL1ON, PLL2ON and PLL3ON bits */ + RCC->CR &= 0xEAF6ED7FU; + + /* Decreasing the number of wait states because of lower CPU frequency */ + if(FLASH_LATENCY_DEFAULT < (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY))) + { + /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(FLASH_LATENCY_DEFAULT)); + } + +#if defined(D3_SRAM_BASE) + /* Reset D1CFGR register */ + RCC->D1CFGR = 0x00000000; + + /* Reset D2CFGR register */ + RCC->D2CFGR = 0x00000000; + + /* Reset D3CFGR register */ + RCC->D3CFGR = 0x00000000; +#else + /* Reset CDCFGR1 register */ + RCC->CDCFGR1 = 0x00000000; + + /* Reset CDCFGR2 register */ + RCC->CDCFGR2 = 0x00000000; + + /* Reset SRDCFGR register */ + RCC->SRDCFGR = 0x00000000; +#endif + /* Reset PLLCKSELR register */ + RCC->PLLCKSELR = 0x02020200; + + /* Reset PLLCFGR register */ + RCC->PLLCFGR = 0x01FF0000; + /* Reset PLL1DIVR register */ + RCC->PLL1DIVR = 0x01010280; + /* Reset PLL1FRACR register */ + RCC->PLL1FRACR = 0x00000000; + + /* Reset PLL2DIVR register */ + RCC->PLL2DIVR = 0x01010280; + + /* Reset PLL2FRACR register */ + + RCC->PLL2FRACR = 0x00000000; + /* Reset PLL3DIVR register */ + RCC->PLL3DIVR = 0x01010280; + + /* Reset PLL3FRACR register */ + RCC->PLL3FRACR = 0x00000000; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Disable all interrupts */ + RCC->CIER = 0x00000000; + +#if (STM32H7_DEV_ID == 0x450UL) + /* dual core CM7 or single core line */ + if((DBGMCU->IDCODE & 0xFFFF0000U) < 0x20000000U) + { + /* if stm32h7 revY*/ + /* Change the switch matrix read issuing capability to 1 for the AXI SRAM target (Target 7) */ + *((__IO uint32_t*)0x51008108) = 0x000000001U; + } +#endif /* STM32H7_DEV_ID */ + +#if defined(DATA_IN_D2_SRAM) + /* in case of initialized data in D2 SRAM (AHB SRAM), enable the D2 SRAM clock (AHB SRAM clock) */ +#if defined(RCC_AHB2ENR_D2SRAM3EN) + RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN | RCC_AHB2ENR_D2SRAM3EN); +#elif defined(RCC_AHB2ENR_D2SRAM2EN) + RCC->AHB2ENR |= (RCC_AHB2ENR_D2SRAM1EN | RCC_AHB2ENR_D2SRAM2EN); +#else + RCC->AHB2ENR |= (RCC_AHB2ENR_AHBSRAM1EN | RCC_AHB2ENR_AHBSRAM2EN); +#endif /* RCC_AHB2ENR_D2SRAM3EN */ + + tmpreg = RCC->AHB2ENR; + (void) tmpreg; +#endif /* DATA_IN_D2_SRAM */ + +#if defined(DUAL_CORE) && defined(CORE_CM4) + /* Configure the Vector Table location add offset address for cortex-M4 ------------------*/ +#if defined(USER_VECT_TAB_ADDRESS) + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D2 AXI-RAM or in Internal FLASH */ +#endif /* USER_VECT_TAB_ADDRESS */ + +#else + /* + * Disable the FMC bank1 (enabled after reset). + * This, prevents CPU speculation access on this bank which blocks the use of FMC during + * 24us. During this time the others FMC master (such as LTDC) cannot use it! + */ + FMC_Bank1_R->BTCR[0] = 0x000030D2; + + /* Configure the Vector Table location -------------------------------------*/ +#if defined(USER_VECT_TAB_ADDRESS) + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal D1 AXI-RAM or in Internal FLASH */ +#endif /* USER_VECT_TAB_ADDRESS */ + +#endif /*DUAL_CORE && CORE_CM4*/ +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock , it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(*) + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**) + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***) + * - If SYSCLK source is PLL, SystemCoreClock will contain the CSI_VALUE(*), + * HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors. + * + * (*) CSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value + * 4 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * (**) HSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value + * 64 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (***)HSE_VALUE is a constant defined in stm32h7xx_hal.h file (default value + * 25 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t pllp, pllsource, pllm, pllfracen, hsivalue, tmp; + uint32_t common_system_clock; + float_t fracn1, pllvco; + + + /* Get SYSCLK source -------------------------------------------------------*/ + + switch (RCC->CFGR & RCC_CFGR_SWS) + { + case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ + common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)); + break; + + case RCC_CFGR_SWS_CSI: /* CSI used as system clock source */ + common_system_clock = CSI_VALUE; + break; + + case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ + common_system_clock = HSE_VALUE; + break; + + case RCC_CFGR_SWS_PLL1: /* PLL1 used as system clock source */ + + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); + pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; + pllfracen = ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN)>>RCC_PLLCFGR_PLL1FRACEN_Pos); + fracn1 = (float_t)(uint32_t)(pllfracen* ((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN1)>> 3)); + + if (pllm != 0U) + { + switch (pllsource) + { + case RCC_PLLCKSELR_PLLSRC_HSI: /* HSI used as PLL clock source */ + + hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ; + pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + + break; + + case RCC_PLLCKSELR_PLLSRC_CSI: /* CSI used as PLL clock source */ + pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + break; + + case RCC_PLLCKSELR_PLLSRC_HSE: /* HSE used as PLL clock source */ + pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + break; + + default: + hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)) ; + pllvco = ((float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_N1) + (fracn1/(float_t)0x2000) +(float_t)1 ); + break; + } + pllp = (((RCC->PLL1DIVR & RCC_PLL1DIVR_P1) >>9) + 1U ) ; + common_system_clock = (uint32_t)(float_t)(pllvco/(float_t)pllp); + } + else + { + common_system_clock = 0U; + } + break; + + default: + common_system_clock = (uint32_t) (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV)>> 3)); + break; + } + + /* Compute SystemClock frequency --------------------------------------------------*/ +#if defined (RCC_D1CFGR_D1CPRE) + tmp = D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_D1CPRE)>> RCC_D1CFGR_D1CPRE_Pos]; + + /* common_system_clock frequency : CM7 CPU frequency */ + common_system_clock >>= tmp; + + /* SystemD2Clock frequency : CM4 CPU, AXI and AHBs Clock frequency */ + SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->D1CFGR & RCC_D1CFGR_HPRE)>> RCC_D1CFGR_HPRE_Pos]) & 0x1FU)); + +#else + tmp = D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_CDCPRE)>> RCC_CDCFGR1_CDCPRE_Pos]; + + /* common_system_clock frequency : CM7 CPU frequency */ + common_system_clock >>= tmp; + + /* SystemD2Clock frequency : AXI and AHBs Clock frequency */ + SystemD2Clock = (common_system_clock >> ((D1CorePrescTable[(RCC->CDCFGR1 & RCC_CDCFGR1_HPRE)>> RCC_CDCFGR1_HPRE_Pos]) & 0x1FU)); + +#endif + +#if defined(DUAL_CORE) && defined(CORE_CM4) + SystemCoreClock = SystemD2Clock; +#else + SystemCoreClock = common_system_clock; +#endif /* DUAL_CORE && CORE_CM4 */ +} + + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/Core/Src/tim.c b/Core/Src/tim.c new file mode 100644 index 0000000..a2353cc --- /dev/null +++ b/Core/Src/tim.c @@ -0,0 +1,325 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file tim.c + * @brief This file provides code for the configuration + * of the TIM instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "tim.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +TIM_HandleTypeDef htim2; +TIM_HandleTypeDef htim3; +TIM_HandleTypeDef htim5; + +/* TIM2 init function */ +void MX_TIM2_Init(void) +{ + + /* USER CODE BEGIN TIM2_Init 0 */ + + /* USER CODE END TIM2_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + + /* USER CODE BEGIN TIM2_Init 1 */ + + /* USER CODE END TIM2_Init 1 */ + htim2.Instance = TIM2; + htim2.Init.Prescaler = 0; + htim2.Init.CounterMode = TIM_COUNTERMODE_CENTERALIGNED1; + htim2.Init.Period = 4800-1; + htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim2) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 0; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM2_Init 2 */ + + /* USER CODE END TIM2_Init 2 */ + HAL_TIM_MspPostInit(&htim2); + +} +/* TIM3 init function */ +void MX_TIM3_Init(void) +{ + + /* USER CODE BEGIN TIM3_Init 0 */ + + /* USER CODE END TIM3_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + TIM_OC_InitTypeDef sConfigOC = {0}; + + /* USER CODE BEGIN TIM3_Init 1 */ + + /* USER CODE END TIM3_Init 1 */ + htim3.Instance = TIM3; + htim3.Init.Prescaler = 0; + htim3.Init.CounterMode = TIM_COUNTERMODE_CENTERALIGNED1; + htim3.Init.Period = 4800-1; + htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim3) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_Init(&htim3) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + sConfigOC.OCMode = TIM_OCMODE_PWM1; + sConfigOC.Pulse = 0; + sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK) + { + Error_Handler(); + } + if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM3_Init 2 */ + + /* USER CODE END TIM3_Init 2 */ + HAL_TIM_MspPostInit(&htim3); + +} +/* TIM5 init function */ +void MX_TIM5_Init(void) +{ + + /* USER CODE BEGIN TIM5_Init 0 */ + + /* USER CODE END TIM5_Init 0 */ + + TIM_ClockConfigTypeDef sClockSourceConfig = {0}; + TIM_MasterConfigTypeDef sMasterConfig = {0}; + + /* USER CODE BEGIN TIM5_Init 1 */ + + /* USER CODE END TIM5_Init 1 */ + htim5.Instance = TIM5; + htim5.Init.Prescaler = 24 - 1; + htim5.Init.CounterMode = TIM_COUNTERMODE_UP; + htim5.Init.Period = 4294967295 - 1; + htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + htim5.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + if (HAL_TIM_Base_Init(&htim5) != HAL_OK) + { + Error_Handler(); + } + sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; + if (HAL_TIM_ConfigClockSource(&htim5, &sClockSourceConfig) != HAL_OK) + { + Error_Handler(); + } + sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; + sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN TIM5_Init 2 */ + + /* USER CODE END TIM5_Init 2 */ + +} + +void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle) +{ + + if(tim_baseHandle->Instance==TIM2) + { + /* USER CODE BEGIN TIM2_MspInit 0 */ + + /* USER CODE END TIM2_MspInit 0 */ + /* TIM2 clock enable */ + __HAL_RCC_TIM2_CLK_ENABLE(); + /* USER CODE BEGIN TIM2_MspInit 1 */ + + /* USER CODE END TIM2_MspInit 1 */ + } + else if(tim_baseHandle->Instance==TIM3) + { + /* USER CODE BEGIN TIM3_MspInit 0 */ + + /* USER CODE END TIM3_MspInit 0 */ + /* TIM3 clock enable */ + __HAL_RCC_TIM3_CLK_ENABLE(); + /* USER CODE BEGIN TIM3_MspInit 1 */ + + /* USER CODE END TIM3_MspInit 1 */ + } + else if(tim_baseHandle->Instance==TIM5) + { + /* USER CODE BEGIN TIM5_MspInit 0 */ + + /* USER CODE END TIM5_MspInit 0 */ + /* TIM5 clock enable */ + __HAL_RCC_TIM5_CLK_ENABLE(); + /* USER CODE BEGIN TIM5_MspInit 1 */ + + /* USER CODE END TIM5_MspInit 1 */ + } +} +void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if(timHandle->Instance==TIM2) + { + /* USER CODE BEGIN TIM2_MspPostInit 0 */ + + /* USER CODE END TIM2_MspPostInit 0 */ + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**TIM2 GPIO Configuration + PA0 ------> TIM2_CH1 + PA1 ------> TIM2_CH2 + PA2 ------> TIM2_CH3 + */ + GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN TIM2_MspPostInit 1 */ + + /* USER CODE END TIM2_MspPostInit 1 */ + } + else if(timHandle->Instance==TIM3) + { + /* USER CODE BEGIN TIM3_MspPostInit 0 */ + + /* USER CODE END TIM3_MspPostInit 0 */ + + __HAL_RCC_GPIOC_CLK_ENABLE(); + /**TIM3 GPIO Configuration + PC6 ------> TIM3_CH1 + PC7 ------> TIM3_CH2 + PC8 ------> TIM3_CH3 + */ + GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; + HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); + + /* USER CODE BEGIN TIM3_MspPostInit 1 */ + + /* USER CODE END TIM3_MspPostInit 1 */ + } + +} + +void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle) +{ + + if(tim_baseHandle->Instance==TIM2) + { + /* USER CODE BEGIN TIM2_MspDeInit 0 */ + + /* USER CODE END TIM2_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM2_CLK_DISABLE(); + /* USER CODE BEGIN TIM2_MspDeInit 1 */ + + /* USER CODE END TIM2_MspDeInit 1 */ + } + else if(tim_baseHandle->Instance==TIM3) + { + /* USER CODE BEGIN TIM3_MspDeInit 0 */ + + /* USER CODE END TIM3_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM3_CLK_DISABLE(); + /* USER CODE BEGIN TIM3_MspDeInit 1 */ + + /* USER CODE END TIM3_MspDeInit 1 */ + } + else if(tim_baseHandle->Instance==TIM5) + { + /* USER CODE BEGIN TIM5_MspDeInit 0 */ + + /* USER CODE END TIM5_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_TIM5_CLK_DISABLE(); + /* USER CODE BEGIN TIM5_MspDeInit 1 */ + + /* USER CODE END TIM5_MspDeInit 1 */ + } +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ diff --git a/Core/Src/usart.c b/Core/Src/usart.c new file mode 100644 index 0000000..d61c372 --- /dev/null +++ b/Core/Src/usart.c @@ -0,0 +1,159 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file usart.c + * @brief This file provides code for the configuration + * of the USART instances. + ****************************************************************************** + * @attention + * + * Copyright (c) 2024 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Includes ------------------------------------------------------------------*/ +#include "usart.h" + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +UART_HandleTypeDef huart1; + +/* USART1 init function */ + +void MX_USART1_UART_Init(void) +{ + + /* USER CODE BEGIN USART1_Init 0 */ + + /* USER CODE END USART1_Init 0 */ + + /* USER CODE BEGIN USART1_Init 1 */ + + /* USER CODE END USART1_Init 1 */ + huart1.Instance = USART1; + huart1.Init.BaudRate = 115200; + huart1.Init.WordLength = UART_WORDLENGTH_8B; + huart1.Init.StopBits = UART_STOPBITS_1; + huart1.Init.Parity = UART_PARITY_NONE; + huart1.Init.Mode = UART_MODE_TX_RX; + huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; + huart1.Init.OverSampling = UART_OVERSAMPLING_16; + huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + huart1.Init.ClockPrescaler = UART_PRESCALER_DIV1; + huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + if (HAL_UART_Init(&huart1) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetTxFifoThreshold(&huart1, UART_TXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_SetRxFifoThreshold(&huart1, UART_RXFIFO_THRESHOLD_1_8) != HAL_OK) + { + Error_Handler(); + } + if (HAL_UARTEx_DisableFifoMode(&huart1) != HAL_OK) + { + Error_Handler(); + } + /* USER CODE BEGIN USART1_Init 2 */ + + /* USER CODE END USART1_Init 2 */ + +} + +void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle) +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + if(uartHandle->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspInit 0 */ + + /* USER CODE END USART1_MspInit 0 */ + + /** Initializes the peripherals clock + */ + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; + PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { + Error_Handler(); + } + + /* USART1 clock enable */ + __HAL_RCC_USART1_CLK_ENABLE(); + + __HAL_RCC_GPIOA_CLK_ENABLE(); + /**USART1 GPIO Configuration + PA9 ------> USART1_TX + PA10 ------> USART1_RX + */ + GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + GPIO_InitStruct.Alternate = GPIO_AF7_USART1; + HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + + /* USER CODE BEGIN USART1_MspInit 1 */ + + /* USER CODE END USART1_MspInit 1 */ + } +} + +void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle) +{ + + if(uartHandle->Instance==USART1) + { + /* USER CODE BEGIN USART1_MspDeInit 0 */ + + /* USER CODE END USART1_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USART1_CLK_DISABLE(); + + /**USART1 GPIO Configuration + PA9 ------> USART1_TX + PA10 ------> USART1_RX + */ + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10); + + /* USER CODE BEGIN USART1_MspDeInit 1 */ + + /* USER CODE END USART1_MspDeInit 1 */ + } +} + +/* USER CODE BEGIN 1 */ +//int fputc(int ch, FILE *f) +//{ +// USART1->TDR = ch; +// while((USART1->ISR & USART_ISR_TC) == 0) +// {} +// return ch; +//} + + +int _write (int fd, char *pBuffer, int size) +{ + for (int i = 0; i < size; i++) + { + USART1->TDR = (unsigned char) *(pBuffer+i); + while((USART1->ISR & USART_ISR_TC) == 0) + {} + } + return size; +} + +/* USER CODE END 1 */ diff --git a/Core/Startup/startup_stm32h750vbtx.s b/Core/Startup/startup_stm32h750vbtx.s new file mode 100644 index 0000000..6c714b2 --- /dev/null +++ b/Core/Startup/startup_stm32h750vbtx.s @@ -0,0 +1,752 @@ +/** + ****************************************************************************** + * @file startup_stm32h750xx.s + * @author MCD Application Team + * @brief STM32H750xx Devices vector table for GCC based toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + * Copyright (c) 2018 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m7 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit + +/* Copy the data segment initializers from flash to SRAM */ + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 + +LoopCopyDataInit: + adds r4, r0, r3 + cmp r4, r1 + bcc CopyDataInit +/* Zero fill the bss segment. */ + ldr r2, =_sbss + ldr r4, =_ebss + movs r3, #0 + b LoopFillZerobss + +FillZerobss: + str r3, [r2] + adds r2, r2, #4 + +LoopFillZerobss: + cmp r2, r4 + bcc FillZerobss + +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_AVD_IRQHandler /* PVD/AVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word FDCAN1_IT0_IRQHandler /* FDCAN1 interrupt line 0 */ + .word FDCAN2_IT0_IRQHandler /* FDCAN2 interrupt line 0 */ + .word FDCAN1_IT1_IRQHandler /* FDCAN1 interrupt line 1 */ + .word FDCAN2_IT1_IRQHandler /* FDCAN2 interrupt line 1 */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_IRQHandler /* TIM1 Break interrupt */ + .word TIM1_UP_IRQHandler /* TIM1 Update interrupt */ + .word TIM1_TRG_COM_IRQHandler /* TIM1 Trigger and Commutation interrupt */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word 0 /* Reserved */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FMC_IRQHandler /* FMC */ + .word SDMMC1_IRQHandler /* SDMMC1 */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word ETH_IRQHandler /* Ethernet */ + .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .word FDCAN_CAL_IRQHandler /* FDCAN calibration unit interrupt*/ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word DCMI_IRQHandler /* DCMI */ + .word CRYP_IRQHandler /* Crypto */ + .word HASH_RNG_IRQHandler /* Hash and Rng */ + .word FPU_IRQHandler /* FPU */ + .word UART7_IRQHandler /* UART7 */ + .word UART8_IRQHandler /* UART8 */ + .word SPI4_IRQHandler /* SPI4 */ + .word SPI5_IRQHandler /* SPI5 */ + .word SPI6_IRQHandler /* SPI6 */ + .word SAI1_IRQHandler /* SAI1 */ + .word LTDC_IRQHandler /* LTDC */ + .word LTDC_ER_IRQHandler /* LTDC error */ + .word DMA2D_IRQHandler /* DMA2D */ + .word SAI2_IRQHandler /* SAI2 */ + .word QUADSPI_IRQHandler /* QUADSPI */ + .word LPTIM1_IRQHandler /* LPTIM1 */ + .word CEC_IRQHandler /* HDMI_CEC */ + .word I2C4_EV_IRQHandler /* I2C4 Event */ + .word I2C4_ER_IRQHandler /* I2C4 Error */ + .word SPDIF_RX_IRQHandler /* SPDIF_RX */ + .word OTG_FS_EP1_OUT_IRQHandler /* USB OTG FS End Point 1 Out */ + .word OTG_FS_EP1_IN_IRQHandler /* USB OTG FS End Point 1 In */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMAMUX1_OVR_IRQHandler /* DMAMUX1 Overrun interrupt */ + .word HRTIM1_Master_IRQHandler /* HRTIM Master Timer global Interrupt */ + .word HRTIM1_TIMA_IRQHandler /* HRTIM Timer A global Interrupt */ + .word HRTIM1_TIMB_IRQHandler /* HRTIM Timer B global Interrupt */ + .word HRTIM1_TIMC_IRQHandler /* HRTIM Timer C global Interrupt */ + .word HRTIM1_TIMD_IRQHandler /* HRTIM Timer D global Interrupt */ + .word HRTIM1_TIME_IRQHandler /* HRTIM Timer E global Interrupt */ + .word HRTIM1_FLT_IRQHandler /* HRTIM Fault global Interrupt */ + .word DFSDM1_FLT0_IRQHandler /* DFSDM Filter0 Interrupt */ + .word DFSDM1_FLT1_IRQHandler /* DFSDM Filter1 Interrupt */ + .word DFSDM1_FLT2_IRQHandler /* DFSDM Filter2 Interrupt */ + .word DFSDM1_FLT3_IRQHandler /* DFSDM Filter3 Interrupt */ + .word SAI3_IRQHandler /* SAI3 global Interrupt */ + .word SWPMI1_IRQHandler /* Serial Wire Interface 1 global interrupt */ + .word TIM15_IRQHandler /* TIM15 global Interrupt */ + .word TIM16_IRQHandler /* TIM16 global Interrupt */ + .word TIM17_IRQHandler /* TIM17 global Interrupt */ + .word MDIOS_WKUP_IRQHandler /* MDIOS Wakeup Interrupt */ + .word MDIOS_IRQHandler /* MDIOS global Interrupt */ + .word JPEG_IRQHandler /* JPEG global Interrupt */ + .word MDMA_IRQHandler /* MDMA global Interrupt */ + .word 0 /* Reserved */ + .word SDMMC2_IRQHandler /* SDMMC2 global Interrupt */ + .word HSEM1_IRQHandler /* HSEM1 global Interrupt */ + .word 0 /* Reserved */ + .word ADC3_IRQHandler /* ADC3 global Interrupt */ + .word DMAMUX2_OVR_IRQHandler /* DMAMUX Overrun interrupt */ + .word BDMA_Channel0_IRQHandler /* BDMA Channel 0 global Interrupt */ + .word BDMA_Channel1_IRQHandler /* BDMA Channel 1 global Interrupt */ + .word BDMA_Channel2_IRQHandler /* BDMA Channel 2 global Interrupt */ + .word BDMA_Channel3_IRQHandler /* BDMA Channel 3 global Interrupt */ + .word BDMA_Channel4_IRQHandler /* BDMA Channel 4 global Interrupt */ + .word BDMA_Channel5_IRQHandler /* BDMA Channel 5 global Interrupt */ + .word BDMA_Channel6_IRQHandler /* BDMA Channel 6 global Interrupt */ + .word BDMA_Channel7_IRQHandler /* BDMA Channel 7 global Interrupt */ + .word COMP1_IRQHandler /* COMP1 global Interrupt */ + .word LPTIM2_IRQHandler /* LP TIM2 global interrupt */ + .word LPTIM3_IRQHandler /* LP TIM3 global interrupt */ + .word LPTIM4_IRQHandler /* LP TIM4 global interrupt */ + .word LPTIM5_IRQHandler /* LP TIM5 global interrupt */ + .word LPUART1_IRQHandler /* LP UART1 interrupt */ + .word 0 /* Reserved */ + .word CRS_IRQHandler /* Clock Recovery Global Interrupt */ + .word ECC_IRQHandler /* ECC diagnostic Global Interrupt */ + .word SAI4_IRQHandler /* SAI4 global interrupt */ + .word 0 /* Reserved */ + .word 0 /* Reserved */ + .word WAKEUP_PIN_IRQHandler /* Interrupt for all 6 wake-up pins */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_AVD_IRQHandler + .thumb_set PVD_AVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak FDCAN1_IT0_IRQHandler + .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler + + .weak FDCAN2_IT0_IRQHandler + .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler + + .weak FDCAN1_IT1_IRQHandler + .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler + + .weak FDCAN2_IT1_IRQHandler + .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_IRQHandler + .thumb_set TIM1_BRK_IRQHandler,Default_Handler + + .weak TIM1_UP_IRQHandler + .thumb_set TIM1_UP_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_IRQHandler + .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FMC_IRQHandler + .thumb_set FMC_IRQHandler,Default_Handler + + .weak SDMMC1_IRQHandler + .thumb_set SDMMC1_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak FDCAN_CAL_IRQHandler + .thumb_set FDCAN_CAL_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak CRYP_IRQHandler + .thumb_set CRYP_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + + .weak UART7_IRQHandler + .thumb_set UART7_IRQHandler,Default_Handler + + .weak UART8_IRQHandler + .thumb_set UART8_IRQHandler,Default_Handler + + .weak SPI4_IRQHandler + .thumb_set SPI4_IRQHandler,Default_Handler + + .weak SPI5_IRQHandler + .thumb_set SPI5_IRQHandler,Default_Handler + + .weak SPI6_IRQHandler + .thumb_set SPI6_IRQHandler,Default_Handler + + .weak SAI1_IRQHandler + .thumb_set SAI1_IRQHandler,Default_Handler + + .weak LTDC_IRQHandler + .thumb_set LTDC_IRQHandler,Default_Handler + + .weak LTDC_ER_IRQHandler + .thumb_set LTDC_ER_IRQHandler,Default_Handler + + .weak DMA2D_IRQHandler + .thumb_set DMA2D_IRQHandler,Default_Handler + + .weak SAI2_IRQHandler + .thumb_set SAI2_IRQHandler,Default_Handler + + .weak QUADSPI_IRQHandler + .thumb_set QUADSPI_IRQHandler,Default_Handler + + .weak LPTIM1_IRQHandler + .thumb_set LPTIM1_IRQHandler,Default_Handler + + .weak CEC_IRQHandler + .thumb_set CEC_IRQHandler,Default_Handler + + .weak I2C4_EV_IRQHandler + .thumb_set I2C4_EV_IRQHandler,Default_Handler + + .weak I2C4_ER_IRQHandler + .thumb_set I2C4_ER_IRQHandler,Default_Handler + + .weak SPDIF_RX_IRQHandler + .thumb_set SPDIF_RX_IRQHandler,Default_Handler + + .weak OTG_FS_EP1_OUT_IRQHandler + .thumb_set OTG_FS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_FS_EP1_IN_IRQHandler + .thumb_set OTG_FS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMAMUX1_OVR_IRQHandler + .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler + + .weak HRTIM1_Master_IRQHandler + .thumb_set HRTIM1_Master_IRQHandler,Default_Handler + + .weak HRTIM1_TIMA_IRQHandler + .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler + + .weak HRTIM1_TIMB_IRQHandler + .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler + + .weak HRTIM1_TIMC_IRQHandler + .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler + + .weak HRTIM1_TIMD_IRQHandler + .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler + + .weak HRTIM1_TIME_IRQHandler + .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler + + .weak HRTIM1_FLT_IRQHandler + .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler + + .weak DFSDM1_FLT0_IRQHandler + .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler + + .weak DFSDM1_FLT1_IRQHandler + .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler + + .weak DFSDM1_FLT2_IRQHandler + .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler + + .weak DFSDM1_FLT3_IRQHandler + .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler + + .weak SAI3_IRQHandler + .thumb_set SAI3_IRQHandler,Default_Handler + + .weak SWPMI1_IRQHandler + .thumb_set SWPMI1_IRQHandler,Default_Handler + + .weak TIM15_IRQHandler + .thumb_set TIM15_IRQHandler,Default_Handler + + .weak TIM16_IRQHandler + .thumb_set TIM16_IRQHandler,Default_Handler + + .weak TIM17_IRQHandler + .thumb_set TIM17_IRQHandler,Default_Handler + + .weak MDIOS_WKUP_IRQHandler + .thumb_set MDIOS_WKUP_IRQHandler,Default_Handler + + .weak MDIOS_IRQHandler + .thumb_set MDIOS_IRQHandler,Default_Handler + + .weak JPEG_IRQHandler + .thumb_set JPEG_IRQHandler,Default_Handler + + .weak MDMA_IRQHandler + .thumb_set MDMA_IRQHandler,Default_Handler + + .weak SDMMC2_IRQHandler + .thumb_set SDMMC2_IRQHandler,Default_Handler + + .weak HSEM1_IRQHandler + .thumb_set HSEM1_IRQHandler,Default_Handler + + .weak ADC3_IRQHandler + .thumb_set ADC3_IRQHandler,Default_Handler + + .weak DMAMUX2_OVR_IRQHandler + .thumb_set DMAMUX2_OVR_IRQHandler,Default_Handler + + .weak BDMA_Channel0_IRQHandler + .thumb_set BDMA_Channel0_IRQHandler,Default_Handler + + .weak BDMA_Channel1_IRQHandler + .thumb_set BDMA_Channel1_IRQHandler,Default_Handler + + .weak BDMA_Channel2_IRQHandler + .thumb_set BDMA_Channel2_IRQHandler,Default_Handler + + .weak BDMA_Channel3_IRQHandler + .thumb_set BDMA_Channel3_IRQHandler,Default_Handler + + .weak BDMA_Channel4_IRQHandler + .thumb_set BDMA_Channel4_IRQHandler,Default_Handler + + .weak BDMA_Channel5_IRQHandler + .thumb_set BDMA_Channel5_IRQHandler,Default_Handler + + .weak BDMA_Channel6_IRQHandler + .thumb_set BDMA_Channel6_IRQHandler,Default_Handler + + .weak BDMA_Channel7_IRQHandler + .thumb_set BDMA_Channel7_IRQHandler,Default_Handler + + .weak COMP1_IRQHandler + .thumb_set COMP1_IRQHandler,Default_Handler + + .weak LPTIM2_IRQHandler + .thumb_set LPTIM2_IRQHandler,Default_Handler + + .weak LPTIM3_IRQHandler + .thumb_set LPTIM3_IRQHandler,Default_Handler + + .weak LPTIM4_IRQHandler + .thumb_set LPTIM4_IRQHandler,Default_Handler + + .weak LPTIM5_IRQHandler + .thumb_set LPTIM5_IRQHandler,Default_Handler + + .weak LPUART1_IRQHandler + .thumb_set LPUART1_IRQHandler,Default_Handler + + .weak CRS_IRQHandler + .thumb_set CRS_IRQHandler,Default_Handler + + .weak ECC_IRQHandler + .thumb_set ECC_IRQHandler,Default_Handler + + .weak SAI4_IRQHandler + .thumb_set SAI4_IRQHandler,Default_Handler + + .weak WAKEUP_PIN_IRQHandler + .thumb_set WAKEUP_PIN_IRQHandler,Default_Handler + + diff --git a/IMU/alldata.h b/IMU/alldata.h new file mode 100644 index 0000000..0717c9a --- /dev/null +++ b/IMU/alldata.h @@ -0,0 +1,25 @@ +#ifndef __ALLDATA_H +#define __ALLDATA_H +#include "main.h" + +typedef struct{ + int16_t accX; + int16_t accY; + int16_t accZ; + int16_t gyroX; + int16_t gyroY; + int16_t gyroZ; +}_st_Mpu; + +typedef struct{ + float roll; + float pitch; + float yaw; +}_st_AngE; + +extern _st_Mpu ICM42688; +extern _st_AngE Angle; + +#endif + + diff --git a/IMU/icm42688.c b/IMU/icm42688.c new file mode 100644 index 0000000..c9a26c9 --- /dev/null +++ b/IMU/icm42688.c @@ -0,0 +1,443 @@ +#include "icm42688.h" + +#include "kalman.h" +#include "alldata.h" + +// ICM42688¼ÓËٶȼÆÊý¾Ý +float icm42688_acc_x, icm42688_acc_y, icm42688_acc_z ; +// ICM42688½Ç¼ÓËÙ¶ÈÊý¾Ý +float icm42688_gyro_x, icm42688_gyro_y, icm42688_gyro_z ; + +static float icm42688_acc_inv = 1, icm42688_gyro_inv = 1; + +void Spi_GPIO_Init() +{ + + GPIO_InitTypeDef GPIO_InitStruct = {0}; + __HAL_RCC_GPIOB_CLK_ENABLE(); + + /*Configure GPIO pins : PBPin PB12 */ + GPIO_InitStruct.Pin = GPIO_PIN_12 | GPIO_PIN_13 |GPIO_PIN_15; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /*Configure GPIO pins : PBPin PB14 */ + GPIO_InitStruct.Pin = GPIO_PIN_14; + GPIO_InitStruct.Mode = GPIO_MODE_INPUT; + GPIO_InitStruct.Pull = GPIO_NOPULL; + HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); +} + +void Init_ICM42688(void) +{ + unsigned char time; + unsigned char model; + Spi_GPIO_Init(); + // ¶ÁÈ¡ÍÓÂÝÒÇÐͺÅÍÓÂÝÒÇ×Ô¼ì + model = 0xff; + while(1) + { + Read_Datas_ICM42688(ICM42688_WHO_AM_I, &model, 1); + if(model == 0x47) + { + // ICM42688 + break; + } + ICM42688_DELAY_MS(10); + } + Write_Data_ICM42688(ICM42688_PWR_MGMT0,0x00); // ¸´Î»É豸 + ICM42688_DELAY_MS(10); // ²Ù×÷ÍêPWR¡ªMGMT0¼Ä´æÆ÷ºó200usÄÚ²»ÄÜÓÐÈκζÁд¼Ä´æÆ÷µÄ²Ù×÷ + + // ÉèÖÃICM42688¼ÓËٶȼƺÍÍÓÂÝÒǵÄÁ¿³ÌºÍÊä³öËÙÂÊ + Set_LowpassFilter_Range_ICM42688(ICM42688_AFS_16G, ICM42688_AODR_32000HZ, ICM42688_GFS_2000DPS, ICM42688_GODR_32000HZ); + + Write_Data_ICM42688(ICM42688_PWR_MGMT0, 0x0f); // ÉèÖÃGYRO_MODE,ACCEL_MODEΪµÍÔëÉùģʽ + ICM42688_DELAY_MS(10); +} +/** +* +* @brief »ñµÃICM42688ÍÓÂÝÒǼÓËÙ¶È +* @param +* @return void +* @notes µ¥Î»:g(m/s^2),Óû§µ÷Óà +* Example: Get_Acc_ICM42688(); +* +**/ +void Get_Acc_ICM42688(void) +{ + unsigned char dat[6]; + Read_Datas_ICM42688(ICM42688_ACCEL_DATA_X1, dat, 6); + icm42688_acc_x = icm42688_acc_inv * (short int)(((short int)dat[0] << 8) | dat[1]); + icm42688_acc_y = icm42688_acc_inv * (short int)(((short int)dat[2] << 8) | dat[3]); + icm42688_acc_z = icm42688_acc_inv * (short int)(((short int)dat[4] << 8) | dat[5]); +} + +/** +* +* @brief »ñµÃICM42688ÍÓÂÝÒǽǼÓËÙ¶È +* @param +* @return void +* @notes µ¥Î»Îª:¡ã/s,Óû§µ÷Óà +* Example: Get_Gyro_ICM42688(); +* +**/ +void Get_Gyro_ICM42688(void) +{ + unsigned char dat[6]; + Read_Datas_ICM42688(ICM42688_GYRO_DATA_X1, dat, 6); + icm42688_gyro_x = icm42688_gyro_inv * (short int)(((short int)dat[0] << 8) | dat[1]); + icm42688_gyro_y = icm42688_gyro_inv * (short int)(((short int)dat[2] << 8) | dat[3]); + icm42688_gyro_z = icm42688_gyro_inv * (short int)(((short int)dat[4] << 8) | dat[5]); +} + +/** +* +* @brief ÉèÖÃICM42688ÍÓÂÝÒǵÍͨÂ˲¨Æ÷´ø¿íºÍÁ¿³Ì +* @param afs // ¼ÓËٶȼÆÁ¿³Ì,¿ÉÔÚdmx_icm42688.hÎļþÀïö¾Ù¶¨ÒåÖв鿴 +* @param aodr // ¼ÓËٶȼÆÊä³öËÙÂÊ,¿ÉÔÚdmx_icm42688.hÎļþÀïö¾Ù¶¨ÒåÖв鿴 +* @param gfs // ÍÓÂÝÒÇÁ¿³Ì,¿ÉÔÚdmx_icm42688.hÎļþÀïö¾Ù¶¨ÒåÖв鿴 +* @param godr // ÍÓÂÝÒÇÊä³öËÙÂÊ,¿ÉÔÚdmx_icm42688.hÎļþÀïö¾Ù¶¨ÒåÖв鿴 +* @return void +* @notes ICM42688.cÎļþÄÚ²¿µ÷ÓÃ,Óû§ÎÞÐèµ÷Óó¢ÊÔ +* Example: Set_LowpassFilter_Range_ICM42688(ICM42688_AFS_16G,ICM42688_AODR_32000HZ,ICM42688_GFS_2000DPS,ICM42688_GODR_32000HZ); +* +**/ +void Set_LowpassFilter_Range_ICM42688(enum icm42688_afs afs, enum icm42688_aodr aodr, enum icm42688_gfs gfs, enum icm42688_godr godr) +{ + Write_Data_ICM42688(ICM42688_ACCEL_CONFIG0, (afs << 5) | (aodr + 1)); // ³õʼ»¯ACCELÁ¿³ÌºÍÊä³öËÙÂÊ(p77) + Write_Data_ICM42688(ICM42688_GYRO_CONFIG0, (gfs << 5) | (godr + 1)); // ³õʼ»¯GYROÁ¿³ÌºÍÊä³öËÙÂÊ(p76) + + switch(afs) + { + case ICM42688_AFS_2G: + icm42688_acc_inv = 2000 / 32768.0f; // ¼ÓËٶȼÆÁ¿³ÌΪ:¡À2g + break; + case ICM42688_AFS_4G: + icm42688_acc_inv = 4000 / 32768.0f; // ¼ÓËٶȼÆÁ¿³ÌΪ:¡À4g + break; + case ICM42688_AFS_8G: + icm42688_acc_inv = 8000 / 32768.0f; // ¼ÓËٶȼÆÁ¿³ÌΪ:¡À8g + break; + case ICM42688_AFS_16G: + icm42688_acc_inv = 16000 / 32768.0f; // ¼ÓËٶȼÆÁ¿³ÌΪ:¡À16g + break; + default: + icm42688_acc_inv = 1; // ²»×ª»¯ÎªÊµ¼ÊÊý¾Ý + break; + } + switch(gfs) + { + case ICM42688_GFS_15_625DPS: + icm42688_gyro_inv = 15.625f / 32768.0f; // ÍÓÂÝÒÇÁ¿³ÌΪ:¡À15.625dps + break; + case ICM42688_GFS_31_25DPS: + icm42688_gyro_inv = 31.25f / 32768.0f; // ÍÓÂÝÒÇÁ¿³ÌΪ:¡À31.25dps + break; + case ICM42688_GFS_62_5DPS: + icm42688_gyro_inv = 62.5f / 32768.0f; // ÍÓÂÝÒÇÁ¿³ÌΪ:¡À62.5dps + break; + case ICM42688_GFS_125DPS: + icm42688_gyro_inv = 125.0f / 32768.0f; // ÍÓÂÝÒÇÁ¿³ÌΪ:¡À125dps + break; + case ICM42688_GFS_250DPS: + icm42688_gyro_inv = 250.0f / 32768.0f; // ÍÓÂÝÒÇÁ¿³ÌΪ:¡À250dps + break; + case ICM42688_GFS_500DPS: + icm42688_gyro_inv = 500.0f / 32768.0f; // ÍÓÂÝÒÇÁ¿³ÌΪ:¡À500dps + break; + case ICM42688_GFS_1000DPS: + icm42688_gyro_inv = 1000.0f / 32768.0f; // ÍÓÂÝÒÇÁ¿³ÌΪ:¡À1000dps + break; + case ICM42688_GFS_2000DPS: + icm42688_gyro_inv = 2000.0f / 32768.0f; // ÍÓÂÝÒÇÁ¿³ÌΪ:¡À2000dps + break; + default: + icm42688_gyro_inv = 1; // ²»×ª»¯ÎªÊµ¼ÊÊý¾Ý + break; + } +} + +/** +* +* @brief ICM42688ÍÓÂÝÒÇд8bitÊý¾Ý +* @param data Êý¾Ý +* @return void +* @notes ICM42688.cÎļþÄÚ²¿µ÷ÓÃ,Óû§ÎÞÐèµ÷Óó¢ÊÔ +* Example: Write_8bit_ICM42688(0x00); +* +**/ +static void Write_8bit_ICM42688(unsigned char dat) +{ + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + if(0x80 & dat) + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,1); + } + else + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,0); + } + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + dat <<= 1; + + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + if(0x80 & dat) + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,1); + } + else + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,0); + } + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + dat <<= 1; + + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + if(0x80 & dat) + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,1); + } + else + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,0); + } + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + dat <<= 1; + + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + if(0x80 & dat) + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,1); + } + else + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,0); + } + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + dat <<= 1; + + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + if(0x80 & dat) + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,1); + } + else + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,0); + } + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + dat <<= 1; + + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + if(0x80 & dat) + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,1); + } + else + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,0); + } + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + dat <<= 1; + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + if(0x80 & dat) + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,1); + } + else + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,0); + } + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + dat <<= 1; + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + if(0x80 & dat) + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,1); + } + else + { + sys_gpio_pin_set(GPIOB,GPIO_PIN_15,0); + } + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + dat <<= 1; +} + +/** +* +* @brief ICM42688ÍÓÂÝÒǶÁ8bitÊý¾Ý +* @param data Êý¾Ý +* @return void +* @notes ICM42688.cÎļþÄÚ²¿µ÷ÓÃ,Óû§ÎÞÐèµ÷Óó¢ÊÔ +* Example: Read_8bit_ICM42688(dat); +* +**/ +static void Read_8bit_ICM42688(unsigned char *dat) +{ + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + *dat = *dat << 1; + *dat |=sys_gpio_pin_get(GPIOB,GPIO_PIN_14); + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + *dat = *dat << 1; + *dat |=sys_gpio_pin_get(GPIOB,GPIO_PIN_14); + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + *dat = *dat << 1; + *dat |=sys_gpio_pin_get(GPIOB,GPIO_PIN_14); + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + *dat = *dat << 1; + *dat |=sys_gpio_pin_get(GPIOB,GPIO_PIN_14); + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + *dat = *dat << 1; + *dat |=sys_gpio_pin_get(GPIOB,GPIO_PIN_14); + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + *dat = *dat << 1; + *dat |=sys_gpio_pin_get(GPIOB,GPIO_PIN_14); + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + *dat = *dat << 1; + *dat |=sys_gpio_pin_get(GPIOB,GPIO_PIN_14); + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + *dat = *dat << 1; + *dat |=sys_gpio_pin_get(GPIOB,GPIO_PIN_14); + HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); +} + +/** +* +* @brief ICM42688ÍÓÂÝÒÇдÊý¾Ý +* @param reg ¼Ä´æÆ÷ +* @param data ÐèҪд½ø¸Ã¼Ä´æÆ÷µÄÊý¾Ý +* @return void +* @notes ICM42688.cÎļþÄÚ²¿µ÷ÓÃ,Óû§ÎÞÐèµ÷Óó¢ÊÔ +* Example: Write_Data_ICM42688(0x00,0x00); +* +**/ +static void Write_Data_ICM42688(unsigned char reg, unsigned char dat) +{ + sys_gpio_pin_set(GPIOB,GPIO_PIN_12,0); + Write_8bit_ICM42688(reg); + Write_8bit_ICM42688(dat); + sys_gpio_pin_set(GPIOB,GPIO_PIN_12,1); +} + +/** +* +* @brief ICM42688ÍÓÂÝÒǶÁÊý¾Ý +* @param reg ¼Ä´æÆ÷ +* @param data °Ñ¶Á³öµÄÊý¾Ý´æÈëdata +* @param num Êý¾Ý¸öÊý +* @return void +* @notes ICM42688.cÎļþÄÚ²¿µ÷ÓÃ,Óû§ÎÞÐèµ÷Óó¢ÊÔ +* Example: Read_Datas_ICM42688(0x00,0x00,1); +* +**/ +static void Read_Datas_ICM42688(unsigned char reg, unsigned char *dat, unsigned int num) +{ + sys_gpio_pin_set(GPIOB,GPIO_PIN_12,0); + reg |= 0x80; + Write_8bit_ICM42688(reg); + while(num--) Read_8bit_ICM42688(dat++); + sys_gpio_pin_set(GPIOB,GPIO_PIN_12,1); +} +/* ¶ÁÈ¡MPU6050Êý¾Ý²¢¼ÓÂ˲¨ */ +//·µ»ØÖµ:0,Õý³£ +//ÆäËû,´íÎó´úÂë +_st_Mpu ICM42688; +static volatile int16_t *pMpu = (int16_t *)&ICM42688; +int16_t MpuOffset[6] = {0}; //MPU6050²¹³¥ÊýÖµ + +uint8_t MpuGetData(void) +{ + uint8_t i; + int res; + unsigned char buffer[12]; + Read_Datas_ICM42688(ICM42688_ACCEL_DATA_X1,buffer,12); + + for(i=0;i<6;i++) + { + pMpu[i] = (((int16_t)buffer[i<<1] << 8) | buffer[(i<<1)+1])-MpuOffset[i]; /* ½«Êý¾ÝÕûΪ16bit£¬²¢¼õȥˮƽУ׼ֵ */ + if(i < 3) /* ½Ç¼ÓËٶȿ¨¶ûÂüÂ˲¨ */ + { + { + static struct KalmanFilter EKF[3] = {{0.02,0,0,0,0.001,0.543},{0.02,0,0,0,0.001,0.543},{0.02,0,0,0,0.001,0.543}}; + kalmanfiter(&EKF[i],(float)pMpu[i]); + pMpu[i] = (int16_t)EKF[i].Out; + } + } + if(i > 2) /* ½ÇËÙ¶ÈÒ»½×»¥²¹Â˲¨ */ + { + uint8_t k=i-3; + const float factor = 0.15f; + static float tBuff[3]; + + pMpu[i] = tBuff[k] = tBuff[k] * (1 - factor) + pMpu[i] * factor; + } + } + + return 0; +} + +void get_IMU(float *pitch,float *roll) +{ + *roll = atan2(ICM42688.accY, ICM42688.accZ) * 180.0 / _PI; + *pitch = atan2(-ICM42688.accX, sqrt(ICM42688.accX * ICM42688.accY + ICM42688.accZ * ICM42688.accZ)) * 180.0 / _PI; + +// *roll = atan2(ICM42688.accY, ICM42688.accZ); +// *pitch = atan2(-ICM42688.accX, sqrt(ICM42688.accX * ICM42688.accY + ICM42688.accZ * ICM42688.accZ)); +} + +/** +ÉèÖÃÒý½Åµçƽ + */ +void sys_gpio_pin_set(GPIO_TypeDef *p_gpiox, uint16_t pinx, uint8_t status) +{ + if (status & 0X01) + { + p_gpiox->BSRR |= pinx; + } + else + { + p_gpiox->BSRR |= (uint32_t)pinx << 16; + } +} + +/** + * ¶ÁÈ¡Òý½Åµçƽ + */ +uint8_t sys_gpio_pin_get(GPIO_TypeDef *p_gpiox, uint16_t pinx) +{ + if (p_gpiox->IDR & pinx) + { + return 1; + } + else + { + return 0; + } +} + + + diff --git a/IMU/icm42688.h b/IMU/icm42688.h new file mode 100644 index 0000000..7b74c64 --- /dev/null +++ b/IMU/icm42688.h @@ -0,0 +1,204 @@ +#ifndef _DMX_ICM42688_H_ +#define _DMX_ICM42688_H_ +#include "stm32h7xx_hal.h" +#include "mymain.h" +#define ICM42688_DELAY_MS(time) (HAL_Delay(time)) + +extern float icm42688_acc_x, icm42688_acc_y, icm42688_acc_z ; // ����ICM42688���ٶȼ����� +extern float icm42688_gyro_x, icm42688_gyro_y, icm42688_gyro_z ; // ����ICM42688�Ǽ��ٶ����� +static void Read_Datas_ICM42688(unsigned char reg, unsigned char *dat, unsigned int num); +static void Write_Data_ICM42688(unsigned char reg, unsigned char dat); +enum icm42688_afs +{ + ICM42688_AFS_16G,// default + ICM42688_AFS_8G, + ICM42688_AFS_4G, + ICM42688_AFS_2G, + NUM_ICM42688__AFS +}; + +enum icm42688_aodr +{ + ICM42688_AODR_32000HZ, + ICM42688_AODR_16000HZ, + ICM42688_AODR_8000HZ, + ICM42688_AODR_4000HZ, + ICM42688_AODR_2000HZ, + ICM42688_AODR_1000HZ,// default + ICM42688_AODR_200HZ, + ICM42688_AODR_100HZ, + ICM42688_AODR_50HZ, + ICM42688_AODR_25HZ, + ICM42688_AODR_12_5HZ, + ICM42688_AODR_6_25HZ, + ICM42688_AODR_3_125HZ, + ICM42688_AODR_1_5625HZ, + ICM42688_AODR_500HZ, + NUM_ICM42688_AODR +}; + +enum icm42688_gfs +{ + ICM42688_GFS_2000DPS,// default + ICM42688_GFS_1000DPS, + ICM42688_GFS_500DPS, + ICM42688_GFS_250DPS, + ICM42688_GFS_125DPS, + ICM42688_GFS_62_5DPS, + ICM42688_GFS_31_25DPS, + ICM42688_GFS_15_625DPS, + NUM_ICM42688_GFS +}; +enum icm42688_godr +{ + ICM42688_GODR_32000HZ, + ICM42688_GODR_16000HZ, + ICM42688_GODR_8000HZ, + ICM42688_GODR_4000HZ, + ICM42688_GODR_2000HZ, + ICM42688_GODR_1000HZ,// default + ICM42688_GODR_200HZ, + ICM42688_GODR_100HZ, + ICM42688_GODR_50HZ, + ICM42688_GODR_25HZ, + ICM42688_GODR_12_5HZ, + ICM42688_GODR_X0HZ, + ICM42688_GODR_X1HZ, + ICM42688_GODR_X2HZ, + ICM42688_GODR_500HZ, + NUM_ICM42688_GODR +}; + +void gpio_init(void); + +/** +* +* @brief ICM42688�����dz�ʼ�� +* @param +* @return void +* @notes �û����� +* Example: Init_ICM42688(); +* +**/ +void Init_ICM42688(void); +//void get_IMU(float accx,float accy,float accz,float *pitch,float *roll); +void get_IMU(float *pitch,float *roll); +uint8_t sys_gpio_pin_get(GPIO_TypeDef *p_gpiox, uint16_t pinx); +void sys_gpio_pin_set(GPIO_TypeDef *p_gpiox, uint16_t pinx, uint8_t status); +/** +* +* @brief ���ICM42688�����Ǽ��ٶ� +* @param +* @return void +* @notes ��λ:g(m/s^2),�û����� +* Example: Get_Acc_ICM42688(); +* +**/ +void Get_Acc_ICM42688(void); + +/** +* +* @brief ���ICM42688�����ǽǼ��ٶ� +* @param +* @return void +* @notes ��λΪ:��/s,�û����� +* Example: Get_Gyro_ICM42688(); +* +**/ +void Get_Gyro_ICM42688(void); + +/** +* +* @brief ����ICM42688�����ǵ�ͨ�˲������������ +* @param afs // ���ٶȼ�����,����dmx_icm42688.h�ļ���ö�ٶ����в鿴 +* @param aodr // ���ٶȼ��������,����dmx_icm42688.h�ļ���ö�ٶ����в鿴 +* @param gfs // ����������,����dmx_icm42688.h�ļ���ö�ٶ����в鿴 +* @param godr // �������������,����dmx_icm42688.h�ļ���ö�ٶ����в鿴 +* @return void +* @notes ICM42688.c�ļ��ڲ�����,�û�������ó��� +* Example: Set_LowpassFilter_Range_ICM42688(ICM42688_AFS_16G,ICM42688_AODR_32000HZ,ICM42688_GFS_2000DPS,ICM42688_GODR_32000HZ); +* +**/ +void Set_LowpassFilter_Range_ICM42688(enum icm42688_afs afs, enum icm42688_aodr aodr, enum icm42688_gfs gfs, enum icm42688_godr godr); +uint8_t MpuGetData(void); +// ICM42688Bank0�ڲ���ַ +#define ICM42688_DEVICE_CONFIG 0x11 +#define ICM42688_DRIVE_CONFIG 0x13 +#define ICM42688_INT_CONFIG 0x14 +#define ICM42688_FIFO_CONFIG 0x16 +#define ICM42688_TEMP_DATA1 0x1D +#define ICM42688_TEMP_DATA0 0x1E +#define ICM42688_ACCEL_DATA_X1 0x1F +#define ICM42688_ACCEL_DATA_X0 0x20 +#define ICM42688_ACCEL_DATA_Y1 0x21 +#define ICM42688_ACCEL_DATA_Y0 0x22 +#define ICM42688_ACCEL_DATA_Z1 0x23 +#define ICM42688_ACCEL_DATA_Z0 0x24 +#define ICM42688_GYRO_DATA_X1 0x25 +#define ICM42688_GYRO_DATA_X0 0x26 +#define ICM42688_GYRO_DATA_Y1 0x27 +#define ICM42688_GYRO_DATA_Y0 0x28 +#define ICM42688_GYRO_DATA_Z1 0x29 +#define ICM42688_GYRO_DATA_Z0 0x2A +#define ICM42688_TMST_FSYNCH 0x2B +#define ICM42688_TMST_FSYNCL 0x2C +#define ICM42688_INT_STATUS 0x2D +#define ICM42688_FIFO_COUNTH 0x2E +#define ICM42688_FIFO_COUNTL 0x2F +#define ICM42688_FIFO_DATA 0x30 +#define ICM42688_APEX_DATA0 0x31 +#define ICM42688_APEX_DATA1 0x32 +#define ICM42688_APEX_DATA2 0x33 +#define ICM42688_APEX_DATA3 0x34 +#define ICM42688_APEX_DATA4 0x35 +#define ICM42688_APEX_DATA5 0x36 +#define ICM42688_INT_STATUS2 0x37 +#define ICM42688_INT_STATUS3 0x38 +#define ICM42688_SIGNAL_PATH_RESET 0x4B +#define ICM42688_INTF_CONFIG0 0x4C +#define ICM42688_INTF_CONFIG1 0x4D +#define ICM42688_PWR_MGMT0 0x4E +#define ICM42688_GYRO_CONFIG0 0x4F +#define ICM42688_ACCEL_CONFIG0 0x50 +#define ICM42688_GYRO_CONFIG1 0x51 +#define ICM42688_GYRO_ACCEL_CONFIG0 0x52 +#define ICM42688_ACCEL_CONFIG1 0x53 +#define ICM42688_TMST_CONFIG 0x54 +#define ICM42688_APEX_CONFIG0 0x56 +#define ICM42688_SMD_CONFIG 0x57 +#define ICM42688_FIFO_CONFIG1 0x5F +#define ICM42688_FIFO_CONFIG2 0x60 +#define ICM42688_FIFO_CONFIG3 0x61 +#define ICM42688_FSYNC_CONFIG 0x62 +#define ICM42688_INT_CONFIG0 0x63 +#define ICM42688_INT_CONFIG1 0x64 +#define ICM42688_INT_SOURCE0 0x65 +#define ICM42688_INT_SOURCE1 0x66 +#define ICM42688_INT_SOURCE3 0x68 +#define ICM42688_INT_SOURCE4 0x69 +#define ICM42688_FIFO_LOST_PKT0 0x6C +#define ICM42688_FIFO_LOST_PKT1 0x6D +#define ICM42688_SELF_TEST_CONFIG 0x70 +#define ICM42688_WHO_AM_I 0x75 +#define ICM42688_REG_BANK_SEL 0x76 // Banks +#define ICM42688_SENSOR_CONFIG0 0x03 +#define ICM42688_GYRO_CONFIG_STATIC2 0x0B +#define ICM42688_GYRO_CONFIG_STATIC3 0x0C +#define ICM42688_GYRO_CONFIG_STATIC4 0x0D +#define ICM42688_GYRO_CONFIG_STATIC5 0x0E +#define ICM42688_GYRO_CONFIG_STATIC6 0x0F +#define ICM42688_GYRO_CONFIG_STATIC7 0x10 +#define ICM42688_GYRO_CONFIG_STATIC8 0x11 +#define ICM42688_GYRO_CONFIG_STATIC9 0x12 +#define ICM42688_GYRO_CONFIG_STATIC10 0x13 +#define ICM42688_XG_ST_DATA 0x5F +#define ICM42688_YG_ST_DATA 0x60 +#define ICM42688_ZG_ST_DATA 0x61 +#define ICM42688_TMSTVAL0 0x62 +#define ICM42688_TMSTVAL1 0x63 +#define ICM42688_TMSTVAL2 0x64 +#define ICM42688_INTF_CONFIG4 0x7A +#define ICM42688_INTF_CONFIG5 0x7B +#define ICM42688_INTF_CONFIG6 0x7C + +#endif \ No newline at end of file diff --git a/IMU/imu.c b/IMU/imu.c new file mode 100644 index 0000000..6a960d0 --- /dev/null +++ b/IMU/imu.c @@ -0,0 +1,135 @@ +#include "imu.h" +#include + +//const float M_PI = 3.1415926535; +const float RtA = 57.2957795f; +const float AtR = 0.0174532925f; +const float Gyro_G = 0.03051756f*2; //ÍÓÂÝÒdzõʼ»¯Á¿³Ì+-2000¶ÈÿÃëÓÚ1 / (65536 / 4000) = 0.03051756*2 +const float Gyro_Gr = 0.0005326f*2; //Ãæ¼ÆËã¶ÈÿÃë,ת»»»¡¶ÈÿÃëÔò 2*0.03051756 * 0.0174533f = 0.0005326*2 + +static float NormAcc; + +/* ËÄÔªÊýϵÊý */ +typedef volatile struct { + float q0; + float q1; + float q2; + float q3; +} Quaternion; +Quaternion NumQ = {1, 0, 0, 0}; + +/* ÍÓÂÝÒÇ»ý·ÖÎó²î */ +struct V{ + float x; + float y; + float z; +}; +volatile struct V GyroIntegError = {0}; + +_st_AngE Angle; //µ±Ç°½Ç¶È×Ëֵ̬ +/* ËÄÔªÊý½â·¨³õʼ»¯ */ +void imu_rest(void) +{ + NumQ.q0 =1; + NumQ.q1 = 0; + NumQ.q2 = 0; + NumQ.q3 = 0; + GyroIntegError.x = 0; + GyroIntegError.y = 0; + GyroIntegError.z = 0; + Angle.pitch = 0; + Angle.roll = 0; +} + +double Time_Prev; +void GetAngle(const _st_Mpu *pMpu,_st_AngE *pAngE) +{ + + unsigned long Time_Now; + double Ts; + + Time_Now = __HAL_TIM_GET_COUNTER(&htim5); //100ns + if(Time_Now > Time_Prev)Ts = (float)(Time_Now - Time_Prev)*1e-7f; + else + Ts = (float)(0xFFFFFFFF - Time_Prev + Time_Now)*1e-7f; + Time_Prev = Time_Now; + if(Ts == 0 || Ts > 400) Ts = 1e-3f; + + + volatile struct V Gravity,Acc,Gyro,AccGravity; + + static float KpDef = 0.5f ; + static float KiDef = 0.0001f; +//static float KiDef = 0.00001f; + + float q0_t,q1_t,q2_t,q3_t; + //float NormAcc; + float NormQuat; + float HalfTime = Ts * 0.5f; + + //ÌáÈ¡µÈЧÐýת¾ØÕóÖеÄÖØÁ¦·ÖÁ¿ + Gravity.x = 2*(NumQ.q1 * NumQ.q3 - NumQ.q0 * NumQ.q2); + Gravity.y = 2*(NumQ.q0 * NumQ.q1 + NumQ.q2 * NumQ.q3); + Gravity.z = 1-2*(NumQ.q1 * NumQ.q1 + NumQ.q2 * NumQ.q2); + // ¼ÓËٶȹéÒ»»¯ + + NormAcc = 1/sqrt(squa(ICM42688.accX)+ squa(ICM42688.accY) +squa(ICM42688.accZ)); + + Acc.x = pMpu->accX * NormAcc; + Acc.y = pMpu->accY * NormAcc; + Acc.z = pMpu->accZ * NormAcc; + + //ÏòÁ¿²î³ËµÃ³öµÄÖµ + AccGravity.x = (Acc.y * Gravity.z - Acc.z * Gravity.y); + AccGravity.y = (Acc.z * Gravity.x - Acc.x * Gravity.z); + AccGravity.z = (Acc.x * Gravity.y - Acc.y * Gravity.x); + + //ÔÙ×ö¼ÓËٶȻý·Ö²¹³¥½ÇËٶȵIJ¹³¥Öµ + GyroIntegError.x += AccGravity.x * KiDef; + GyroIntegError.y += AccGravity.y * KiDef; + GyroIntegError.z += AccGravity.z * KiDef; + + //½ÇËÙ¶ÈÈںϼÓËٶȻý·Ö²¹³¥Öµ + Gyro.x = pMpu->gyroX * Gyro_Gr + KpDef * AccGravity.x + GyroIntegError.x;//»¡¶ÈÖÆ + Gyro.y = pMpu->gyroY * Gyro_Gr + KpDef * AccGravity.y + GyroIntegError.y; + Gyro.z = pMpu->gyroZ * Gyro_Gr + KpDef * AccGravity.z + GyroIntegError.z; + + // Ò»½×Áú¸ñ¿âËþ·¨, ¸üÐÂËÄÔªÊý + q0_t = (-NumQ.q1*Gyro.x - NumQ.q2*Gyro.y - NumQ.q3*Gyro.z) * HalfTime; + q1_t = ( NumQ.q0*Gyro.x - NumQ.q3*Gyro.y + NumQ.q2*Gyro.z) * HalfTime; + q2_t = ( NumQ.q3*Gyro.x + NumQ.q0*Gyro.y - NumQ.q1*Gyro.z) * HalfTime; + q3_t = (-NumQ.q2*Gyro.x + NumQ.q1*Gyro.y + NumQ.q0*Gyro.z) * HalfTime; + + NumQ.q0 += q0_t; + NumQ.q1 += q1_t; + NumQ.q2 += q2_t; + NumQ.q3 += q3_t; + // ËÄÔªÊý¹éÒ»»¯ + NormQuat = 1/sqrt(squa(NumQ.q0) + squa(NumQ.q1) + squa(NumQ.q2) + squa(NumQ.q3)); + NumQ.q0 *= NormQuat; + NumQ.q1 *= NormQuat; + NumQ.q2 *= NormQuat; + NumQ.q3 *= NormQuat; + + // ËÄÔªÊýתŷÀ­½Ç + { + + #ifdef YAW_GYRO + *( + float *)pAngE = atan2f(2 * NumQ.q1 *NumQ.q2 + 2 * NumQ.q0 * NumQ.q3, 1 - 2 * NumQ.q2 *NumQ.q2 - 2 * NumQ.q3 * NumQ.q3) * RtA; //yaw + #else + float yaw_G = pMpu->gyroZ * Gyro_G; + if((yaw_G > 1.0f) || (yaw_G < -1.0f)) //Êý¾Ý̫С¿ÉÒÔÈÏΪÊǸÉÈÅ£¬²»ÊÇÆ«º½¶¯×÷ + { + pAngE->yaw += yaw_G * Ts; + } + #endif + pAngE->pitch = asin(2 * NumQ.q0 *NumQ.q2 - 2 * NumQ.q1 * NumQ.q3) * RtA; + pAngE->roll = atan2(2 * NumQ.q2 *NumQ.q3 + 2 * NumQ.q0 * NumQ.q1, 1 - 2 * NumQ.q1 *NumQ.q1 - 2 * NumQ.q2 * NumQ.q2) * RtA; + +// pAngE->pitch = asin(2 * NumQ.q0 *NumQ.q2 - 2 * NumQ.q1 * NumQ.q3); +// pAngE->roll = atan2(2 * NumQ.q2 *NumQ.q3 + 2 * NumQ.q0 * NumQ.q1, 1 - 2 * NumQ.q1 *NumQ.q1 - 2 * NumQ.q2 * NumQ.q2); + + } +} + diff --git a/IMU/imu.h b/IMU/imu.h new file mode 100644 index 0000000..31dc799 --- /dev/null +++ b/IMU/imu.h @@ -0,0 +1,16 @@ +#ifndef __IMU_H +#define __IMU_H +#include "mymain.h" +#include "alldata.h" +#define squa( Sq ) (((float)Sq)*((float)Sq)) + + +extern _st_AngE Angle;//µ±Ç°½Ç¶È×Ëֵ̬ + +void GetAngle(const _st_Mpu *pMpu,_st_AngE *pAngE); +// extern void GetAngle(const _st_Mpu *pMpu,_st_AngE *pAngE, float dt); +extern void imu_rest(void); + +#endif + + diff --git a/IMU/kalman.c b/IMU/kalman.c new file mode 100644 index 0000000..d4baebf --- /dev/null +++ b/IMU/kalman.c @@ -0,0 +1,12 @@ +#include "kalman.h" + +//һά¿¨¶ûÂüÂ˲¨ +void kalmanfiter(struct KalmanFilter *EKF,float input) +{ + EKF->NewP = EKF->LastP + EKF->Q; + EKF->Kg = EKF->NewP / (EKF->NewP + EKF->R); + EKF->Out = EKF->Out + EKF->Kg * (input - EKF->Out); + EKF->LastP = (1 - EKF->Kg) * EKF->NewP; +} + + diff --git a/IMU/kalman.h b/IMU/kalman.h new file mode 100644 index 0000000..ec2ae63 --- /dev/null +++ b/IMU/kalman.h @@ -0,0 +1,18 @@ +#ifndef __KALMAN_H +#define __KALMAN_H + +//¿¨¶ûÂüÂ˲¨²ÎÊý½á¹¹Ìå +struct KalmanFilter{ + float LastP; //ÉÏÒ»´ÎЭ·½²î + float NewP; //×îеÄЭ·½²î + float Out; //¿¨¶ûÂüÊä³ö + float Kg; //¿¨¶ûÂüÔöÒæ + float Q; //¹ý³ÌÔëÉùµÄЭ·½²î + float R; //¹Û²âÔëÉùµÄЭ·½²î +}; + +extern void kalmanfiter(struct KalmanFilter *EKF,float input); //һά¿¨¶ûÂüÂ˲¨ + +#endif + + diff --git a/config.cfg b/config.cfg new file mode 100644 index 0000000..833e96b --- /dev/null +++ b/config.cfg @@ -0,0 +1,8 @@ +source [find interface/cmsis-dap.cfg] +# select SWD port +transport select swd +source [find target/stm32h7x.cfg] +#source [find board/stm32h7x_dual_qspi.cfg] +reset_config trst_only +; adapter speed 5000 +#reset_config srst_only \ No newline at end of file diff --git a/foc_n.ioc b/foc_n.ioc new file mode 100644 index 0000000..2296693 --- /dev/null +++ b/foc_n.ioc @@ -0,0 +1,234 @@ +#MicroXplorer Configuration settings - do not modify +File.Version=6 +GPIO.groupedBy= +KeepUserPlacement=false +Mcu.CPN=STM32H750VBT6 +Mcu.Family=STM32H7 +Mcu.IP0=CORTEX_M7 +Mcu.IP1=NVIC +Mcu.IP2=RCC +Mcu.IP3=SPI1 +Mcu.IP4=SYS +Mcu.IP5=TIM2 +Mcu.IP6=TIM3 +Mcu.IP7=TIM5 +Mcu.IP8=USART1 +Mcu.IPNb=9 +Mcu.Name=STM32H750VBTx +Mcu.Package=LQFP100 +Mcu.Pin0=PH0-OSC_IN (PH0) +Mcu.Pin1=PH1-OSC_OUT (PH1) +Mcu.Pin10=PC8 +Mcu.Pin11=PA9 +Mcu.Pin12=PA10 +Mcu.Pin13=VP_SYS_VS_Systick +Mcu.Pin14=VP_TIM2_VS_ClockSourceINT +Mcu.Pin15=VP_TIM3_VS_ClockSourceINT +Mcu.Pin16=VP_TIM5_VS_ClockSourceINT +Mcu.Pin2=PA0 +Mcu.Pin3=PA1 +Mcu.Pin4=PA2 +Mcu.Pin5=PA5 +Mcu.Pin6=PA6 +Mcu.Pin7=PA7 +Mcu.Pin8=PC6 +Mcu.Pin9=PC7 +Mcu.PinsNb=17 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32H750VBTx +MxCube.Version=6.6.1 +MxDb.Version=DB.6.0.60 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.ForceEnableDMAVector=true +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +NVIC.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false +PA0.Locked=true +PA0.Signal=S_TIM2_CH1_ETR +PA1.Locked=true +PA1.Signal=S_TIM2_CH2 +PA10.Locked=true +PA10.Mode=Asynchronous +PA10.Signal=USART1_RX +PA2.Locked=true +PA2.Signal=S_TIM2_CH3 +PA5.Locked=true +PA5.Mode=Full_Duplex_Master +PA5.Signal=SPI1_SCK +PA6.Locked=true +PA6.Mode=Full_Duplex_Master +PA6.Signal=SPI1_MISO +PA7.Locked=true +PA7.Mode=Full_Duplex_Master +PA7.Signal=SPI1_MOSI +PA9.Locked=true +PA9.Mode=Asynchronous +PA9.Signal=USART1_TX +PC6.Locked=true +PC6.Signal=S_TIM3_CH1 +PC7.Locked=true +PC7.Signal=S_TIM3_CH2 +PC8.Locked=true +PC8.Signal=S_TIM3_CH3 +PH0-OSC_IN\ (PH0).Mode=HSE-External-Oscillator +PH0-OSC_IN\ (PH0).Signal=RCC_OSC_IN +PH1-OSC_OUT\ (PH1).Mode=HSE-External-Oscillator +PH1-OSC_OUT\ (PH1).Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=6 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=true +ProjectManager.CustomerFirmwarePackage= +ProjectManager.DefaultFWLocation=true +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32H750VBTx +ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.10.0 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=1 +ProjectManager.MainLocation=Core/Src +ProjectManager.NoMain=false +ProjectManager.PreviousToolchain=STM32CubeIDE +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=foc_n.ioc +ProjectManager.ProjectName=foc_n +ProjectManager.RegisterCallBack= +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=STM32CubeIDE +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=true +ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_TIM2_Init-TIM2-false-HAL-true,4-MX_TIM3_Init-TIM3-false-HAL-true,5-MX_TIM5_Init-TIM5-false-HAL-true,6-MX_USART1_UART_Init-USART1-false-HAL-true,7-MX_SPI1_Init-SPI1-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true +RCC.ADCFreq_Value=50390625 +RCC.AHB12Freq_Value=240000000 +RCC.AHB4Freq_Value=240000000 +RCC.APB1Freq_Value=120000000 +RCC.APB2Freq_Value=120000000 +RCC.APB3Freq_Value=120000000 +RCC.APB4Freq_Value=120000000 +RCC.AXIClockFreq_Value=240000000 +RCC.CECFreq_Value=32000 +RCC.CKPERFreq_Value=64000000 +RCC.CortexFreq_Value=480000000 +RCC.CpuClockFreq_Value=480000000 +RCC.D1CPREFreq_Value=480000000 +RCC.D1PPRE=RCC_APB3_DIV2 +RCC.D2PPRE1=RCC_APB1_DIV2 +RCC.D2PPRE2=RCC_APB2_DIV2 +RCC.D3PPRE=RCC_APB4_DIV2 +RCC.DFSDMACLkFreq_Value=160000000 +RCC.DFSDMFreq_Value=120000000 +RCC.DIVM1=5 +RCC.DIVN1=192 +RCC.DIVP1Freq_Value=480000000 +RCC.DIVP2Freq_Value=50390625 +RCC.DIVP3Freq_Value=50390625 +RCC.DIVQ1=6 +RCC.DIVQ1Freq_Value=160000000 +RCC.DIVQ2Freq_Value=50390625 +RCC.DIVQ3Freq_Value=50390625 +RCC.DIVR1Freq_Value=480000000 +RCC.DIVR2Freq_Value=50390625 +RCC.DIVR3Freq_Value=50390625 +RCC.FDCANFreq_Value=160000000 +RCC.FMCFreq_Value=240000000 +RCC.FamilyName=M +RCC.HCLK3ClockFreq_Value=240000000 +RCC.HCLKFreq_Value=240000000 +RCC.HPRE=RCC_HCLK_DIV2 +RCC.HRTIMFreq_Value=240000000 +RCC.I2C123Freq_Value=120000000 +RCC.I2C4Freq_Value=120000000 +RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLSourceVirtual,ProductRev,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value +RCC.LPTIM1Freq_Value=120000000 +RCC.LPTIM2Freq_Value=120000000 +RCC.LPTIM345Freq_Value=120000000 +RCC.LPUART1Freq_Value=120000000 +RCC.LTDCFreq_Value=50390625 +RCC.MCO1PinFreq_Value=64000000 +RCC.MCO2PinFreq_Value=480000000 +RCC.PLLSourceVirtual=RCC_PLLSOURCE_HSE +RCC.ProductRev=revV +RCC.QSPIFreq_Value=240000000 +RCC.RNGFreq_Value=48000000 +RCC.RTCFreq_Value=32000 +RCC.SAI1Freq_Value=160000000 +RCC.SAI23Freq_Value=160000000 +RCC.SAI4AFreq_Value=160000000 +RCC.SAI4BFreq_Value=160000000 +RCC.SDMMCFreq_Value=160000000 +RCC.SPDIFRXFreq_Value=160000000 +RCC.SPI123Freq_Value=160000000 +RCC.SPI45Freq_Value=120000000 +RCC.SPI6Freq_Value=120000000 +RCC.SWPMI1Freq_Value=120000000 +RCC.SYSCLKFreq_VALUE=480000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.Tim1OutputFreq_Value=240000000 +RCC.Tim2OutputFreq_Value=240000000 +RCC.TraceFreq_Value=64000000 +RCC.USART16Freq_Value=120000000 +RCC.USART234578Freq_Value=120000000 +RCC.USBFreq_Value=160000000 +RCC.VCO1OutputFreq_Value=960000000 +RCC.VCO2OutputFreq_Value=100781250 +RCC.VCO3OutputFreq_Value=100781250 +RCC.VCOInput1Freq_Value=5000000 +RCC.VCOInput2Freq_Value=781250 +RCC.VCOInput3Freq_Value=781250 +SH.S_TIM2_CH1_ETR.0=TIM2_CH1,PWM Generation1 CH1 +SH.S_TIM2_CH1_ETR.ConfNb=1 +SH.S_TIM2_CH2.0=TIM2_CH2,PWM Generation2 CH2 +SH.S_TIM2_CH2.ConfNb=1 +SH.S_TIM2_CH3.0=TIM2_CH3,PWM Generation3 CH3 +SH.S_TIM2_CH3.ConfNb=1 +SH.S_TIM3_CH1.0=TIM3_CH1,PWM Generation1 CH1 +SH.S_TIM3_CH1.ConfNb=1 +SH.S_TIM3_CH2.0=TIM3_CH2,PWM Generation2 CH2 +SH.S_TIM3_CH2.ConfNb=1 +SH.S_TIM3_CH3.0=TIM3_CH3,PWM Generation3 CH3 +SH.S_TIM3_CH3.ConfNb=1 +SPI1.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_32 +SPI1.CLKPhase=SPI_PHASE_2EDGE +SPI1.CalculateBaudRate=5.0 MBits/s +SPI1.DataSize=SPI_DATASIZE_16BIT +SPI1.Direction=SPI_DIRECTION_2LINES +SPI1.IPParameters=VirtualType,Mode,Direction,BaudRatePrescaler,CalculateBaudRate,DataSize,CLKPhase +SPI1.Mode=SPI_MODE_MASTER +SPI1.VirtualType=VM_MASTER +TIM2.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 +TIM2.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2 +TIM2.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 +TIM2.CounterMode=TIM_COUNTERMODE_CENTERALIGNED1 +TIM2.IPParameters=Period,CounterMode,Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2,Channel-PWM Generation3 CH3 +TIM2.Period=4799 +TIM3.Channel-PWM\ Generation1\ CH1=TIM_CHANNEL_1 +TIM3.Channel-PWM\ Generation2\ CH2=TIM_CHANNEL_2 +TIM3.Channel-PWM\ Generation3\ CH3=TIM_CHANNEL_3 +TIM3.CounterMode=TIM_COUNTERMODE_CENTERALIGNED1 +TIM3.IPParameters=Channel-PWM Generation1 CH1,Channel-PWM Generation2 CH2,Channel-PWM Generation3 CH3,Period,CounterMode +TIM3.Period=4800 +TIM5.IPParameters=Prescaler +TIM5.Prescaler=24 +USART1.IPParameters=VirtualMode-Asynchronous +USART1.VirtualMode-Asynchronous=VM_ASYNC +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +VP_TIM2_VS_ClockSourceINT.Mode=Internal +VP_TIM2_VS_ClockSourceINT.Signal=TIM2_VS_ClockSourceINT +VP_TIM3_VS_ClockSourceINT.Mode=Internal +VP_TIM3_VS_ClockSourceINT.Signal=TIM3_VS_ClockSourceINT +VP_TIM5_VS_ClockSourceINT.Mode=Internal +VP_TIM5_VS_ClockSourceINT.Signal=TIM5_VS_ClockSourceINT +board=custom diff --git a/keilkilll.bat b/keilkilll.bat new file mode 100644 index 0000000..203dc03 --- /dev/null +++ b/keilkilll.bat @@ -0,0 +1,26 @@ +del *.bak /s +del *.ddk /s +del *.edk /s +del *.lst /s +del *.lnp /s +del *.mpf /s +del *.mpj /s +del *.obj /s +del *.omf /s +::del *.opt /s ::²»ÔÊÐíɾ³ýJLINKµÄÉèÖà +del *.plg /s +del *.rpt /s +del *.tmp /s +del *.__i /s +del *.crf /s +del *.o /s +del *.d /s +del *.axf /s +del *.tra /s +del *.dep /s +del JLinkLog.txt /s + +del *.iex /s +del *.htm /s +del *.map /s +exit