1.更新了植物探头最新设计
2.更新了fsa2布局(未完)
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植物探头/使用时间监测模块/0603.PcbLib
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植物探头/使用时间监测模块/1N4001W.PcbLib
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植物探头/使用时间监测模块/CNJMA2001WR-S-2P.PcbLib
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植物探头/使用时间监测模块/FC-135.PcbLib
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植物探头/使用时间监测模块/GS2040AR-CR.PcbLib
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植物探头/使用时间监测模块/PCB1.PcbDoc
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植物探头/使用时间监测模块/PCB_Project2.PrjPCBStructure
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@ -0,0 +1,452 @@
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Add component. Clean all parameters for all variants
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Added Component: Designator=C3(RAD-0.3)
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Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
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Added Component: Designator=C4(C0805)
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Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
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Added Component: Designator=C6(RAD-0.3)
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Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
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Add component. Clean all parameters for all variants
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Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
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||||||
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Add component. Clean all parameters for all variants
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Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
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Added Component: Designator=C9(RAD-0.3)
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||||||
|
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||||||
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Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
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||||||
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Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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||||||
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Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
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||||||
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||||||
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Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
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||||||
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Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
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||||||
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Add component (AddParameter): Name = "Value"; Value = "0.1<EFBFBD><EFBFBD>F"; VariantName = "[No Variations]"
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||||||
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Added Component: Designator=C10(RAD-0.3)
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||||||
|
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||||||
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Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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||||||
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Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
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||||||
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Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
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||||||
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Add component (AddParameter): Name = "Value"; Value = "0.1<EFBFBD><EFBFBD>F"; VariantName = "[No Variations]"
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||||||
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Added Component: Designator=C11(RAD-0.3)
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||||||
|
Add component. Clean all parameters for all variants
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||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
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||||||
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Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
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||||||
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||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
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||||||
|
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|
||||||
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|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
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||||||
|
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||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
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||||||
|
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||||||
|
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|
||||||
|
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|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
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||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
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|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
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||||||
|
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|
||||||
|
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|
||||||
|
Add component. Clean all parameters for all variants
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||||||
|
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||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
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||||||
|
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||||||
|
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||||||
|
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||||||
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||||||
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||||||
|
Add component. Clean all parameters for all variants
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||||||
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Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
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||||||
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Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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||||||
|
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||||||
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||||||
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Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
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Added Component: Designator=P1(HDR1X2)
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Add component. Clean all parameters for all variants
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Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
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|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
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Added Component: Designator=P2(HDR1X3)
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Add component. Clean all parameters for all variants
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Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
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Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
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Added Component: Designator=Q?(SOT-23B_N)
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Add component. Clean all parameters for all variants
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Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.4 mm Lead Span"; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "PackageVersion"; Value = "Aug-1999"; VariantName = "[No Variations]"
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||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
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||||||
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Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
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||||||
|
Added Component: Designator=Q?(SOT-23B_N)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.4 mm Lead Span"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23B"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageVersion"; Value = "Aug-1999"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=Q?(SOT-23B_N)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.4 mm Lead Span"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23B"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageVersion"; Value = "Aug-1999"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=Q?(SOT-23B_N)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "29-May-2009"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "IPC-7351 Footprint Added."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "3-Pin SOT-23 Package 0.95 mm Pitch, 2.4 mm Lead Span"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "SOT-23B"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageVersion"; Value = "Aug-1999"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R3(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "69.8K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R4(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "22.1K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R5(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R6(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R7(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R8(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R9(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R10(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R11(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R12(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R13(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "1K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R14(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "1K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R15(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "1K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R16(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "1K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R17(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "1K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R18(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "1K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R19(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "1K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R20(AXIAL-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "1K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=Y?(R38)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Crystal, Thru-Hole; 2 Leads; Body 3.1 x 8.2 mm (Dia.xH)"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "R38"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=C2-1
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=C3-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=C4-1
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=C5-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=C8-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=D?-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=Q?-3
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=Q?-3
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=Q?-3
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=Q?-3
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=R6-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=R8-1
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=R10-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=R12-2
|
||||||
|
Added Net: Name=+3.3
|
||||||
|
Added Pin To Net: NetName=3.3V Pin=C9-2
|
||||||
|
Added Pin To Net: NetName=3.3V Pin=C10-2
|
||||||
|
Added Pin To Net: NetName=3.3V Pin=C11-1
|
||||||
|
Added Net: Name=3.3V
|
||||||
|
Added Net: Name=EN
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C2-2
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C3-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C4-2
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C5-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C6-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C7-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C8-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C9-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C10-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C11-2
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C12-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C14-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=P1-2
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=P2-3
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=R4-2
|
||||||
|
Added Net: Name=GND1
|
||||||
|
Added Net: Name=IO0
|
||||||
|
Added Pin To Net: NetName=IO34 ADC Pin=C14-2
|
||||||
|
Added Pin To Net: NetName=IO34 ADC Pin=D?-1
|
||||||
|
Added Pin To Net: NetName=IO34 ADC Pin=R3-1
|
||||||
|
Added Net: Name=IO34 ADC
|
||||||
|
Added Pin To Net: NetName=LED A Pin=R13-1
|
||||||
|
Added Net: Name=LED A
|
||||||
|
Added Pin To Net: NetName=LED B Pin=R14-1
|
||||||
|
Added Net: Name=LED B
|
||||||
|
Added Pin To Net: NetName=LED C Pin=R15-1
|
||||||
|
Added Net: Name=LED C
|
||||||
|
Added Pin To Net: NetName=LED DP Pin=R20-1
|
||||||
|
Added Net: Name=LED DP
|
||||||
|
Added Pin To Net: NetName=LED D Pin=R16-1
|
||||||
|
Added Net: Name=LED D
|
||||||
|
Added Pin To Net: NetName=LED E Pin=R17-1
|
||||||
|
Added Net: Name=LED E
|
||||||
|
Added Pin To Net: NetName=LED F Pin=R18-1
|
||||||
|
Added Net: Name=LED F
|
||||||
|
Added Pin To Net: NetName=LED G Pin=R19-1
|
||||||
|
Added Net: Name=LED G
|
||||||
|
Added Pin To Net: NetName=LED H1 Pin=R5-2
|
||||||
|
Added Net: Name=LED H1
|
||||||
|
Added Pin To Net: NetName=LED H2 Pin=R7-1
|
||||||
|
Added Net: Name=LED H2
|
||||||
|
Added Pin To Net: NetName=LED H3 Pin=R9-2
|
||||||
|
Added Net: Name=LED H3
|
||||||
|
Added Pin To Net: NetName=LED H4 Pin=R11-1
|
||||||
|
Added Net: Name=LED H4
|
||||||
|
Added Pin To Net: NetName=NetC6_2 Pin=C6-2
|
||||||
|
Added Pin To Net: NetName=NetC6_2 Pin=Y?-1
|
||||||
|
Added Net: Name=NetC6_2
|
||||||
|
Added Pin To Net: NetName=NetC7_2 Pin=C7-2
|
||||||
|
Added Pin To Net: NetName=NetC7_2 Pin=Y?-2
|
||||||
|
Added Net: Name=NetC7_2
|
||||||
|
Added Pin To Net: NetName=NetC12_2 Pin=C12-2
|
||||||
|
Added Pin To Net: NetName=NetC12_2 Pin=P1-1
|
||||||
|
Added Net: Name=NetC12_2
|
||||||
|
Added Pin To Net: NetName=NetC13_1 Pin=C13-1
|
||||||
|
Added Net: Name=NetC13_1
|
||||||
|
Added Pin To Net: NetName=NetC13_2 Pin=C13-2
|
||||||
|
Added Net: Name=NetC13_2
|
||||||
|
Added Pin To Net: NetName=NetQ?_1 Pin=Q?-1
|
||||||
|
Added Net: Name=NetQ?_1
|
||||||
|
Added Pin To Net: NetName=NetQ?_2 Pin=Q?-2
|
||||||
|
Added Pin To Net: NetName=NetQ?_2 Pin=R5-1
|
||||||
|
Added Pin To Net: NetName=NetQ?_2 Pin=R6-1
|
||||||
|
Added Net: Name=NetQ?_2
|
||||||
|
Added Pin To Net: NetName=NetR3_2 Pin=R3-2
|
||||||
|
Added Pin To Net: NetName=NetR3_2 Pin=R4-1
|
||||||
|
Added Net: Name=NetR3_2
|
||||||
|
Added Pin To Net: NetName=NetR13_2 Pin=R13-2
|
||||||
|
Added Net: Name=NetR13_2
|
||||||
|
Added Pin To Net: NetName=NetR14_2 Pin=R14-2
|
||||||
|
Added Net: Name=NetR14_2
|
||||||
|
Added Pin To Net: NetName=NetR15_2 Pin=R15-2
|
||||||
|
Added Net: Name=NetR15_2
|
||||||
|
Added Pin To Net: NetName=NetR16_2 Pin=R16-2
|
||||||
|
Added Net: Name=NetR16_2
|
||||||
|
Added Pin To Net: NetName=NetR17_2 Pin=R17-2
|
||||||
|
Added Net: Name=NetR17_2
|
||||||
|
Added Pin To Net: NetName=NetR18_2 Pin=R18-2
|
||||||
|
Added Net: Name=NetR18_2
|
||||||
|
Added Pin To Net: NetName=NetR19_2 Pin=R19-2
|
||||||
|
Added Net: Name=NetR19_2
|
||||||
|
Added Pin To Net: NetName=NetR20_2 Pin=R20-2
|
||||||
|
Added Net: Name=NetR20_2
|
||||||
|
Added Pin To Net: NetName=U0RXD Pin=P2-2
|
||||||
|
Added Net: Name=U0RXD
|
||||||
|
Added Pin To Net: NetName=U0TXD Pin=P2-1
|
||||||
|
Added Net: Name=U0TXD
|
||||||
|
Added Class: Name=Sheet1
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,29 @@
|
|||||||
|
Change Component Designator: OldDesignator=Q? NewDesignator=Q1
|
||||||
|
Change Component Designator: OldDesignator=Q? NewDesignator=Q2
|
||||||
|
Change Component Designator: OldDesignator=Q? NewDesignator=Q3
|
||||||
|
Change Component Designator: OldDesignator=Q? NewDesignator=Q4
|
||||||
|
Change Net Name : Old Net Name=NetQ?_2 New Net Name=NetQ1_2
|
||||||
|
Added Pin To Net: NetName=NetQ1_1 Pin=Q1-1
|
||||||
|
Added Net: Name=NetQ1_1
|
||||||
|
Added Pin To Net: NetName=NetQ2_1 Pin=Q2-1
|
||||||
|
Added Net: Name=NetQ2_1
|
||||||
|
Added Pin To Net: NetName=NetQ2_2 Pin=Q2-2
|
||||||
|
Added Pin To Net: NetName=NetQ2_2 Pin=R7-2
|
||||||
|
Added Pin To Net: NetName=NetQ2_2 Pin=R8-2
|
||||||
|
Added Net: Name=NetQ2_2
|
||||||
|
Added Pin To Net: NetName=NetQ3_1 Pin=Q3-1
|
||||||
|
Added Net: Name=NetQ3_1
|
||||||
|
Added Pin To Net: NetName=NetQ3_2 Pin=Q3-2
|
||||||
|
Added Pin To Net: NetName=NetQ3_2 Pin=R9-1
|
||||||
|
Added Pin To Net: NetName=NetQ3_2 Pin=R10-1
|
||||||
|
Added Net: Name=NetQ3_2
|
||||||
|
Added Pin To Net: NetName=NetQ4_1 Pin=Q4-1
|
||||||
|
Added Net: Name=NetQ4_1
|
||||||
|
Added Pin To Net: NetName=NetQ4_2 Pin=Q4-2
|
||||||
|
Added Pin To Net: NetName=NetQ4_2 Pin=R11-2
|
||||||
|
Added Pin To Net: NetName=NetQ4_2 Pin=R12-1
|
||||||
|
Added Net: Name=NetQ4_2
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component Q2 PNP
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component Q3 PNP
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component Q4 PNP
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,50 @@
|
|||||||
|
Change Component Footprint: Designator=C2 Old Footprint=RAD-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=C3 Old Footprint=RAD-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=C5 Old Footprint=RAD-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=C6 Old Footprint=RAD-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=C7 Old Footprint=RAD-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=C8 Old Footprint=RAD-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=C9 Old Footprint=RAD-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=C10 Old Footprint=RAD-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=C11 Old Footprint=RAD-0.3 New Footprint=0402
|
||||||
|
Added Component: Designator=U1(esp32-pico-d4)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "BOM_JLCPCB Part Class"; Value = "Extended Part"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Manufacturer"; Value = "Espressif Systems"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Manufacturer Part"; Value = "ESP32-PICO-D4"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier Part"; Value = "C193707"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Contributor"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Frequency"; Value = "-"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spicePre"; Value = "U"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spiceSymbolName"; Value = "ESP32-PICO-D4"; VariantName = "[No Variations]"
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=U1-1
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=U1-3
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=U1-4
|
||||||
|
Added Pin To Net: NetName=EN Pin=U1-9
|
||||||
|
Added Pin To Net: NetName=IO34 ADC Pin=U1-10
|
||||||
|
Added Pin To Net: NetName=NetC6_2 Pin=U1-12
|
||||||
|
Added Pin To Net: NetName=NetC7_2 Pin=U1-13
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=U1-19
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=U1-22
|
||||||
|
Added Pin To Net: NetName=IO0 Pin=U1-23
|
||||||
|
Added Pin To Net: NetName=LED DP Pin=U1-27
|
||||||
|
Added Pin To Net: NetName=LED G Pin=U1-28
|
||||||
|
Added Pin To Net: NetName=LED F Pin=U1-29
|
||||||
|
Added Pin To Net: NetName=LED E Pin=U1-30
|
||||||
|
Added Pin To Net: NetName=LED D Pin=U1-31
|
||||||
|
Added Pin To Net: NetName=LED C Pin=U1-32
|
||||||
|
Added Pin To Net: NetName=LED B Pin=U1-33
|
||||||
|
Added Pin To Net: NetName=LED A Pin=U1-34
|
||||||
|
Added Pin To Net: NetName=LED H4 Pin=U1-35
|
||||||
|
Added Pin To Net: NetName=LED H3 Pin=U1-36
|
||||||
|
Added Pin To Net: NetName=3.3V Pin=U1-37
|
||||||
|
Added Pin To Net: NetName=LED H2 Pin=U1-38
|
||||||
|
Added Pin To Net: NetName=LED H1 Pin=U1-39
|
||||||
|
Added Pin To Net: NetName=U0RXD Pin=U1-40
|
||||||
|
Added Pin To Net: NetName=U0TXD Pin=U1-41
|
||||||
|
Added Pin To Net: NetName=3.3V Pin=U1-43
|
||||||
|
Added Pin To Net: NetName=3.3V Pin=U1-46
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=U1-49
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component U1 ESP32-PICO-D4
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,16 @@
|
|||||||
|
Added Component: Designator=U3(GS2040AR-CR)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Added Pin To Net: NetName=NetR17_2 Pin=U3-1
|
||||||
|
Added Pin To Net: NetName=NetR16_2 Pin=U3-2
|
||||||
|
Added Pin To Net: NetName=NetR20_2 Pin=U3-3
|
||||||
|
Added Pin To Net: NetName=NetR15_2 Pin=U3-4
|
||||||
|
Added Pin To Net: NetName=NetR19_2 Pin=U3-5
|
||||||
|
Added Pin To Net: NetName=NetQ1_1 Pin=U3-6
|
||||||
|
Added Pin To Net: NetName=NetR14_2 Pin=U3-7
|
||||||
|
Added Pin To Net: NetName=NetQ2_1 Pin=U3-8
|
||||||
|
Added Pin To Net: NetName=NetQ3_1 Pin=U3-9
|
||||||
|
Added Pin To Net: NetName=NetR18_2 Pin=U3-10
|
||||||
|
Added Pin To Net: NetName=NetR13_2 Pin=U3-11
|
||||||
|
Added Pin To Net: NetName=NetQ4_1 Pin=U3-12
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component U3
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,2 @@
|
|||||||
|
Change Component Footprint: Designator=Y? Old Footprint=R38 New Footprint=FC-135
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,2 @@
|
|||||||
|
Change Component Footprint: Designator=C4 Old Footprint=C0805 New Footprint=DIODE_SMC
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,53 @@
|
|||||||
|
Removed Pin From Net: NetName=+3.3 Pin=Q1-3
|
||||||
|
Removed Pin From Net: NetName=+3.3 Pin=Q2-3
|
||||||
|
Removed Pin From Net: NetName=+3.3 Pin=Q3-3
|
||||||
|
Removed Pin From Net: NetName=+3.3 Pin=Q4-3
|
||||||
|
Removed Pin From Net: NetName=NetQ1_1 Pin=U3-6
|
||||||
|
Removed Pin From Net: NetName=NetQ2_1 Pin=U3-8
|
||||||
|
Removed Pin From Net: NetName=NetQ3_1 Pin=U3-9
|
||||||
|
Removed Pin From Net: NetName=NetQ4_1 Pin=U3-12
|
||||||
|
Change Component Footprint: Designator=R5 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R6 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R7 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R8 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R9 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R10 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R11 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R12 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R13 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R14 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R15 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R16 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R17 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R18 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R19 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=R20 Old Footprint=AXIAL-0.3 New Footprint=0402
|
||||||
|
Change Component Footprint: Designator=Q1 Old Footprint=SOT-23B_N New Footprint=s8550
|
||||||
|
Change Component Footprint: Designator=Q2 Old Footprint=SOT-23B_N New Footprint=s8550
|
||||||
|
Change Component Footprint: Designator=Q3 Old Footprint=SOT-23B_N New Footprint=s8550
|
||||||
|
Change Component Footprint: Designator=Q4 Old Footprint=SOT-23B_N New Footprint=s8550
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=Q1-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=Q2-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=Q3-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=Q4-2
|
||||||
|
Added Pin To Net: NetName=NetQ1_1 Pin=R5-1
|
||||||
|
Added Pin To Net: NetName=NetQ1_1 Pin=R6-1
|
||||||
|
Added Pin To Net: NetName=NetQ2_1 Pin=R7-2
|
||||||
|
Added Pin To Net: NetName=NetQ2_1 Pin=R8-2
|
||||||
|
Added Pin To Net: NetName=NetQ3_1 Pin=R9-1
|
||||||
|
Added Pin To Net: NetName=NetQ3_1 Pin=R10-1
|
||||||
|
Added Pin To Net: NetName=NetQ4_1 Pin=R11-2
|
||||||
|
Added Pin To Net: NetName=NetQ4_1 Pin=R12-1
|
||||||
|
Added Pin To Net: NetName=NetQ1_3 Pin=Q1-3
|
||||||
|
Added Pin To Net: NetName=NetQ1_3 Pin=U3-6
|
||||||
|
Added Net: Name=NetQ1_3
|
||||||
|
Added Pin To Net: NetName=NetQ2_3 Pin=Q2-3
|
||||||
|
Added Pin To Net: NetName=NetQ2_3 Pin=U3-8
|
||||||
|
Added Net: Name=NetQ2_3
|
||||||
|
Added Pin To Net: NetName=NetQ3_3 Pin=Q3-3
|
||||||
|
Added Pin To Net: NetName=NetQ3_3 Pin=U3-9
|
||||||
|
Added Net: Name=NetQ3_3
|
||||||
|
Added Pin To Net: NetName=NetQ4_3 Pin=Q4-3
|
||||||
|
Added Pin To Net: NetName=NetQ4_3 Pin=U3-12
|
||||||
|
Added Net: Name=NetQ4_3
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,115 @@
|
|||||||
|
Removed Pin From Net: NetName=GND1 Pin=C12-1
|
||||||
|
Removed Pin From Net: NetName=GND1 Pin=C14-1
|
||||||
|
Removed Pin From Net: NetName=IO34 ADC Pin=C14-2
|
||||||
|
Removed Pin From Net: NetName=IO34 ADC Pin=R3-1
|
||||||
|
Removed Pin From Net: NetName=GND1 Pin=R4-2
|
||||||
|
Removed Pin From Net: NetName=LED A Pin=R13-1
|
||||||
|
Removed Pin From Net: NetName=LED B Pin=R14-1
|
||||||
|
Removed Pin From Net: NetName=LED C Pin=R15-1
|
||||||
|
Removed Pin From Net: NetName=LED D Pin=R16-1
|
||||||
|
Removed Pin From Net: NetName=LED E Pin=R17-1
|
||||||
|
Removed Pin From Net: NetName=LED F Pin=R18-1
|
||||||
|
Removed Pin From Net: NetName=LED G Pin=R19-1
|
||||||
|
Removed Pin From Net: NetName=LED DP Pin=R20-1
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R3
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R4
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R13
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R14
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R15
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R16
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R17
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R18
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R19
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R20
|
||||||
|
Change Component Footprint: Designator=C12 Old Footprint=RAD-0.3 New Footprint=6-0805_N
|
||||||
|
Change Component Footprint: Designator=C13 Old Footprint=RAD-0.3 New Footprint=6-0805_N
|
||||||
|
Change Component Footprint: Designator=C14 Old Footprint=RAD-0.3 New Footprint=6-0805_N
|
||||||
|
Change Component Designator: OldDesignator=U3 NewDesignator=U5
|
||||||
|
Change component parameters: Designator = "C12"; Footprint = "6-0805_N"; UniqueID = "\SLGBJKAR"
|
||||||
|
Change component parameters. Clean all parameters for all variants
|
||||||
|
Change component parameters (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "Value"; Value = "0.22<EFBFBD><EFBFBD>F"; VariantName = "[No Variations]"
|
||||||
|
Change component parameters: Designator = "C14"; Footprint = "6-0805_N"; UniqueID = "\PWVEDBTD"
|
||||||
|
Change component parameters. Clean all parameters for all variants
|
||||||
|
Change component parameters (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Change component parameters (AddParameter): Name = "Value"; Value = "22<32><32>F"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=C15(6-0805_N)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "1<><31>F"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=C16(6-0805_N)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "1<><31>F"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=U2(LM340)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Added Component: Designator=U3(AMS1117)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Added Pin To Net: NetName=IO34 ADC Pin=C16-2
|
||||||
|
Added Pin To Net: NetName=NetC12_2 Pin=U2-1
|
||||||
|
Added Pin To Net: NetName=IO34 ADC Pin=U3-2
|
||||||
|
Added Pin To Net: NetName=IO34 ADC Pin=U3-4
|
||||||
|
Added Pin To Net: NetName=+5 Pin=C13-2
|
||||||
|
Added Pin To Net: NetName=+5 Pin=C14-2
|
||||||
|
Added Pin To Net: NetName=+5 Pin=C15-2
|
||||||
|
Added Pin To Net: NetName=+5 Pin=U2-3
|
||||||
|
Added Pin To Net: NetName=+5 Pin=U3-3
|
||||||
|
Added Net: Name=+5
|
||||||
|
Added Pin To Net: NetName=DP Pin=U5-3
|
||||||
|
Added Net: Name=DP
|
||||||
|
Added Pin To Net: NetName=GND Pin=C12-1
|
||||||
|
Added Pin To Net: NetName=GND Pin=C13-1
|
||||||
|
Added Pin To Net: NetName=GND Pin=C14-1
|
||||||
|
Added Pin To Net: NetName=GND Pin=C15-1
|
||||||
|
Added Pin To Net: NetName=GND Pin=C16-1
|
||||||
|
Added Pin To Net: NetName=GND Pin=U2-2
|
||||||
|
Added Pin To Net: NetName=GND Pin=U2-4
|
||||||
|
Added Pin To Net: NetName=GND Pin=U3-1
|
||||||
|
Added Net: Name=GND
|
||||||
|
Added Pin To Net: NetName=GR1 Pin=U5-6
|
||||||
|
Added Net: Name=GR1
|
||||||
|
Added Pin To Net: NetName=GR2 Pin=U5-8
|
||||||
|
Added Net: Name=GR2
|
||||||
|
Added Pin To Net: NetName=GR3 Pin=U5-9
|
||||||
|
Added Net: Name=GR3
|
||||||
|
Added Pin To Net: NetName=GR4 Pin=U5-12
|
||||||
|
Added Net: Name=GR4
|
||||||
|
Added Pin To Net: NetName=SG1 Pin=U5-11
|
||||||
|
Added Net: Name=SG1
|
||||||
|
Added Pin To Net: NetName=SG2 Pin=U5-7
|
||||||
|
Added Net: Name=SG2
|
||||||
|
Added Pin To Net: NetName=SG3 Pin=U5-4
|
||||||
|
Added Net: Name=SG3
|
||||||
|
Added Pin To Net: NetName=SG4 Pin=U5-2
|
||||||
|
Added Net: Name=SG4
|
||||||
|
Added Pin To Net: NetName=SG5 Pin=U5-1
|
||||||
|
Added Net: Name=SG5
|
||||||
|
Added Pin To Net: NetName=SG6 Pin=U5-10
|
||||||
|
Added Net: Name=SG6
|
||||||
|
Added Pin To Net: NetName=SG7 Pin=U5-5
|
||||||
|
Added Net: Name=SG7
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component C15 Cap
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component C16 Cap
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component U2
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component U5
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,17 @@
|
|||||||
|
Added Component: Designator=U4(VK1650)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Added Pin To Net: NetName=GR1 Pin=U4-1
|
||||||
|
Added Pin To Net: NetName=GND Pin=U4-4
|
||||||
|
Added Pin To Net: NetName=GR2 Pin=U4-5
|
||||||
|
Added Pin To Net: NetName=GR3 Pin=U4-6
|
||||||
|
Added Pin To Net: NetName=GR4 Pin=U4-7
|
||||||
|
Added Pin To Net: NetName=SG1 Pin=U4-8
|
||||||
|
Added Pin To Net: NetName=SG2 Pin=U4-9
|
||||||
|
Added Pin To Net: NetName=SG3 Pin=U4-11
|
||||||
|
Added Pin To Net: NetName=SG4 Pin=U4-12
|
||||||
|
Added Pin To Net: NetName=SG5 Pin=U4-13
|
||||||
|
Added Pin To Net: NetName=SG6 Pin=U4-14
|
||||||
|
Added Pin To Net: NetName=SG7 Pin=U4-15
|
||||||
|
Added Pin To Net: NetName=DP Pin=U4-16
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component U4
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,49 @@
|
|||||||
|
Removed Pin From Net: NetName=+3.3 Pin=Q1-2
|
||||||
|
Removed Pin From Net: NetName=+3.3 Pin=Q2-2
|
||||||
|
Removed Pin From Net: NetName=+3.3 Pin=Q3-2
|
||||||
|
Removed Pin From Net: NetName=+3.3 Pin=Q4-2
|
||||||
|
Removed Pin From Net: NetName=LED H1 Pin=R5-2
|
||||||
|
Removed Pin From Net: NetName=+3.3 Pin=R6-2
|
||||||
|
Removed Pin From Net: NetName=LED H2 Pin=R7-1
|
||||||
|
Removed Pin From Net: NetName=+3.3 Pin=R8-1
|
||||||
|
Removed Pin From Net: NetName=LED H3 Pin=R9-2
|
||||||
|
Removed Pin From Net: NetName=+3.3 Pin=R10-2
|
||||||
|
Removed Pin From Net: NetName=LED H4 Pin=R11-1
|
||||||
|
Removed Pin From Net: NetName=+3.3 Pin=R12-2
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=Q1
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=Q2
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=Q3
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=Q4
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R5
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R6
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R7
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R8
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R9
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R10
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R11
|
||||||
|
Removed Member From Class: ClassName=Sheet1 Member=R12
|
||||||
|
Added Component: Designator=C?(RAD-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "100pF"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=C?(RAD-0.3)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "100pF"; VariantName = "[No Variations]"
|
||||||
|
Added Pin To Net: NetName=GND Pin=C?-1
|
||||||
|
Added Pin To Net: NetName=GND Pin=C?-1
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=C?-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=C?-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=U4-10
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component C? Cap
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component C? Cap
|
@ -0,0 +1,6 @@
|
|||||||
|
Change Component Footprint: Designator=C? Old Footprint=RAD-0.3 New Footprint=0603
|
||||||
|
Change Component Footprint: Designator=C? Old Footprint=RAD-0.3 New Footprint=0603
|
||||||
|
Change Component Designator: OldDesignator=C? NewDesignator=C17
|
||||||
|
Change Component Designator: OldDesignator=C? NewDesignator=C18
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component C17 Cap
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,37 @@
|
|||||||
|
Added Component: Designator=C1(0402)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "BOM_Manufacturer Part"; Value = ""; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier"; Value = ""; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier Part"; Value = ""; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Contributor"; Value = "LCEDA_Lib"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "nameAlias"; Value = "Value(F)"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spicePre"; Value = "C"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spiceSymbolName"; Value = "C_0603_US"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R1(0402)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "BOM_Manufacturer Part"; Value = ""; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier"; Value = ""; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier Part"; Value = ""; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Contributor"; Value = "LCEDA_Lib"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "nameAlias"; Value = "Value(<28><>)"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spicePre"; Value = "R"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spiceSymbolName"; Value = "R_0603_US"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=R2(0402)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "BOM_Manufacturer Part"; Value = ""; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier"; Value = ""; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier Part"; Value = ""; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Contributor"; Value = "LCEDA_Lib"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "nameAlias"; Value = "Value(<28><>)"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spicePre"; Value = "R"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spiceSymbolName"; Value = "R_0603_US"; VariantName = "[No Variations]"
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C1-1
|
||||||
|
Added Pin To Net: NetName=EN Pin=C1-2
|
||||||
|
Added Pin To Net: NetName=EN Pin=R1-1
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=R1-2
|
||||||
|
Added Pin To Net: NetName=IO0 Pin=R2-1
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=R2-2
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component C1 1u
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component R1 10k
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component R2 10k
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,7 @@
|
|||||||
|
Added Pin To Net: NetName=+3.3 Pin=C9-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=C10-2
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=C11-1
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=U1-37
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=U1-43
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=U1-46
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,2 @@
|
|||||||
|
Change Component Footprint: Designator=P1 Old Footprint=HDR1X2 New Footprint=CNJMA2001WR-S-2P
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,2 @@
|
|||||||
|
Change Component Footprint: Designator=D? Old Footprint=SMC New Footprint=1N4001W
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,41 @@
|
|||||||
|
Added Component: Designator=R?(0402)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Value"; Value = "10K"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=SW1(SW)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "BOM_JLCPCB Part Class"; Value = "Extended Part"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Manufacturer"; Value = "SHOU HAN"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Manufacturer Part"; Value = "TS342A2P-WZ"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier Part"; Value = "C557591"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Contributor"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spicePre"; Value = "S"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spiceSymbolName"; Value = "TS342A2P-WZ"; VariantName = "[No Variations]"
|
||||||
|
Added Component: Designator=SW2(SW)
|
||||||
|
Add component. Clean all parameters for all variants
|
||||||
|
Add component (AddParameter): Name = "BOM_JLCPCB Part Class"; Value = "Extended Part"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Manufacturer"; Value = "SHOU HAN"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Manufacturer Part"; Value = "TS342A2P-WZ"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "BOM_Supplier Part"; Value = "C557591"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "Contributor"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spicePre"; Value = "S"; VariantName = "[No Variations]"
|
||||||
|
Add component (AddParameter): Name = "spiceSymbolName"; Value = "TS342A2P-WZ"; VariantName = "[No Variations]"
|
||||||
|
Added Pin To Net: NetName=+3.3 Pin=R?-2
|
||||||
|
Added Pin To Net: NetName=IO0 Pin=SW1-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=SW1-2
|
||||||
|
Added Pin To Net: NetName=GND Pin=SW2-2
|
||||||
|
Added Pin To Net: NetName=SW Pin=R?-1
|
||||||
|
Added Pin To Net: NetName=SW Pin=SW2-1
|
||||||
|
Added Pin To Net: NetName=SW Pin=U1-24
|
||||||
|
Added Net: Name=SW
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component R? Res1
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component SW1 TS342A2P-WZ
|
||||||
|
Added Member To Class: ClassName=Sheet1 Member=Component SW2 TS342A2P-WZ
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,7 @@
|
|||||||
|
Added Pin To Net: NetName=CLK Pin=U1-14
|
||||||
|
Added Pin To Net: NetName=CLK Pin=U4-2
|
||||||
|
Added Net: Name=CLK
|
||||||
|
Added Pin To Net: NetName=DAT Pin=U1-15
|
||||||
|
Added Pin To Net: NetName=DAT Pin=U4-3
|
||||||
|
Added Net: Name=DAT
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,14 @@
|
|||||||
|
Added Pin To Net: NetName=GND1 Pin=C12-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C13-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C14-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C15-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C16-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C17-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=C18-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=SW2-2
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=U2-2
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=U2-4
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=U3-1
|
||||||
|
Added Pin To Net: NetName=GND1 Pin=U4-4
|
||||||
|
Change Net Name : Old Net Name=GND1 New Net Name=GND
|
||||||
|
Added Room: Name=Sheet1
|
@ -0,0 +1,334 @@
|
|||||||
|
Protel Design System Design Rule Check
|
||||||
|
PCB File : C:\Users\hu123456\Desktop\ֲ<><D6B2>̽ͷ\ʹ<><CAB9>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>\PCB1.PcbDoc
|
||||||
|
Date : 2022/5/7
|
||||||
|
Time : 14:08:10
|
||||||
|
|
||||||
|
Processing Rule : Clearance Constraint (Gap=0.2mm) (All),(All)
|
||||||
|
Rule Violations :0
|
||||||
|
|
||||||
|
Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
|
||||||
|
Rule Violations :0
|
||||||
|
|
||||||
|
Processing Rule : Un-Routed Net Constraint ( (All) )
|
||||||
|
Rule Violations :0
|
||||||
|
|
||||||
|
Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No)
|
||||||
|
Rule Violations :0
|
||||||
|
|
||||||
|
Processing Rule : Width Constraint (Min=0.2mm) (Max=1mm) (Preferred=0.254mm) (All)
|
||||||
|
Rule Violations :0
|
||||||
|
|
||||||
|
Processing Rule : Power Plane Connect Rule(Direct Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
|
||||||
|
Rule Violations :0
|
||||||
|
|
||||||
|
Processing Rule : Hole Size Constraint (Min=0.025mm) (Max=2.54mm) (All)
|
||||||
|
Rule Violations :0
|
||||||
|
|
||||||
|
Processing Rule : Hole To Hole Clearance (Gap=0.254mm) (All),(All)
|
||||||
|
Rule Violations :0
|
||||||
|
|
||||||
|
Processing Rule : Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C10-1(141.91mm,48.971mm) on Top Layer And Pad C10-2(141.91mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.062mm < 0.254mm) Between Pad C10-2(141.91mm,49.971mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.062mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C1-1(141.648mm,61.747mm) on Top Layer And Pad C1-2(140.648mm,61.747mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.237mm < 0.254mm) Between Pad C1-1(141.648mm,61.747mm) on Top Layer And Pad R1-2(141.648mm,60.808mm) on Top Layer [Top Solder] Mask Sliver [0.237mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.16mm < 0.254mm) Between Pad C1-1(141.648mm,61.747mm) on Top Layer And Via (141.402mm,62.611mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.16mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C11-1(143.241mm,49.971mm) on Top Layer And Pad C11-2(143.241mm,48.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.069mm < 0.254mm) Between Pad C11-1(143.241mm,49.971mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.069mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.057mm < 0.254mm) Between Pad C11-1(143.241mm,49.971mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.057mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.237mm < 0.254mm) Between Pad C1-2(140.648mm,61.747mm) on Top Layer And Pad R1-1(140.648mm,60.808mm) on Top Layer [Top Solder] Mask Sliver [0.237mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.138mm < 0.254mm) Between Pad C18-2(141.3mm,50.981mm) on Bottom Layer And Via (140.259mm,51.333mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.138mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C2-1(144.572mm,49.971mm) on Top Layer And Pad C2-2(144.572mm,48.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.041mm < 0.254mm) Between Pad C2-1(144.572mm,49.971mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.041mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C3-1(145.903mm,48.971mm) on Top Layer And Pad C3-2(145.903mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.248mm < 0.254mm) Between Pad C4-1(155.931mm,53.086mm) on Bottom Layer And Via (153.441mm,51.232mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.248mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.131mm < 0.254mm) Between Pad C4-2(155.931mm,60.706mm) on Bottom Layer And Via (153.441mm,61.62mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.131mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C5-1(147.234mm,48.971mm) on Top Layer And Pad C5-2(147.234mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C6-1(149.174mm,60.943mm) on Top Layer And Pad C6-2(149.174mm,61.943mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.171mm < 0.254mm) Between Pad C6-1(149.174mm,60.943mm) on Top Layer And Via (150.012mm,60.35mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.171mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C7-1(143.891mm,61.595mm) on Top Layer And Pad C7-2(143.891mm,60.595mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C8-1(142.85mm,61.587mm) on Top Layer And Pad C8-2(142.85mm,60.587mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.144mm < 0.254mm) Between Pad C8-2(142.85mm,60.587mm) on Top Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.144mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C9-1(140.579mm,48.971mm) on Top Layer And Pad C9-2(140.579mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.204mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Via (153.213mm,49.047mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.204mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.138mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Via (153.441mm,51.232mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.138mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.182mm < 0.254mm) Between Pad P1-2(175.971mm,56.139mm) on Bottom Layer And Via (175.666mm,57.125mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.182mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.097mm < 0.254mm) Between Pad P1-3(179.06mm,52.047mm) on Bottom Layer And Via (179.73mm,53.797mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.097mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.118mm < 0.254mm) Between Pad P2-2(140.894mm,58.547mm) on Bottom Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.118mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R?-1(179.638mm,60.35mm) on Top Layer And Pad R?-2(178.638mm,60.35mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R1-1(140.648mm,60.808mm) on Top Layer And Pad R1-2(141.648mm,60.808mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R2-1(151.689mm,49.563mm) on Bottom Layer And Pad R2-2(151.689mm,50.563mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.108mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Via (148.305mm,51.505mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.108mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.175mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Via (148.615mm,48.971mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.175mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.175mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Via (149.631mm,48.971mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.175mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.086mm < 0.254mm) Between Pad SW1-2(145.22mm,50.279mm) on Bottom Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.086mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.229mm < 0.254mm) Between Pad SW2-1(179.108mm,57.546mm) on Top Layer And Via (177.952mm,56.236mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.229mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Pad U1-2(147.518mm,52.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Pad U1-48(146.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,56.843mm) on Top Layer And Pad U1-11(147.518mm,57.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-10(147.518mm,56.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,56.843mm) on Top Layer And Pad U1-9(147.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-11(147.518mm,57.343mm) on Top Layer And Pad U1-12(147.518mm,57.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-11(147.518mm,57.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-12(147.518mm,57.843mm) on Top Layer And Pad U1-13(146.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-12(147.518mm,57.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-13(146.768mm,58.593mm) on Top Layer And Pad U1-14(146.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-13(146.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-14(146.268mm,58.593mm) on Top Layer And Pad U1-15(145.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-14(146.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-15(145.768mm,58.593mm) on Top Layer And Pad U1-16(145.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-15(145.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-16(145.268mm,58.593mm) on Top Layer And Pad U1-17(144.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-16(145.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-17(144.768mm,58.593mm) on Top Layer And Pad U1-18(144.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-17(144.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.244mm < 0.254mm) Between Pad U1-17(144.768mm,58.593mm) on Top Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.244mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-18(144.268mm,58.593mm) on Top Layer And Pad U1-19(143.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-18(144.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-19(143.768mm,58.593mm) on Top Layer And Pad U1-20(143.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-19(143.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-2(147.518mm,52.843mm) on Top Layer And Pad U1-3(147.518mm,53.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-2(147.518mm,52.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-20(143.268mm,58.593mm) on Top Layer And Pad U1-21(142.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-20(143.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-21(142.768mm,58.593mm) on Top Layer And Pad U1-22(142.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-21(142.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.244mm < 0.254mm) Between Pad U1-21(142.768mm,58.593mm) on Top Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.244mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Pad U1-23(141.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.237mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.237mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.245mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.245mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-23(141.768mm,58.593mm) on Top Layer And Pad U1-24(141.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-23(141.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.142mm < 0.254mm) Between Pad U1-23(141.768mm,58.593mm) on Top Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.142mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Pad U1-25(140.518mm,57.843mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.18mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.18mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Pad U1-26(140.518mm,57.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.238mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Via (140.36mm,58.674mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.238mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-26(140.518mm,57.343mm) on Top Layer And Pad U1-27(140.518mm,56.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-26(140.518mm,57.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-27(140.518mm,56.843mm) on Top Layer And Pad U1-28(140.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-27(140.518mm,56.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-28(140.518mm,56.343mm) on Top Layer And Pad U1-29(140.518mm,55.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-28(140.518mm,56.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-29(140.518mm,55.843mm) on Top Layer And Pad U1-30(140.518mm,55.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-29(140.518mm,55.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-3(147.518mm,53.343mm) on Top Layer And Pad U1-4(147.518mm,53.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-3(147.518mm,53.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-30(140.518mm,55.343mm) on Top Layer And Pad U1-31(140.518mm,54.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-30(140.518mm,55.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-31(140.518mm,54.843mm) on Top Layer And Pad U1-32(140.518mm,54.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-31(140.518mm,54.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-32(140.518mm,54.343mm) on Top Layer And Pad U1-33(140.518mm,53.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-32(140.518mm,54.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-33(140.518mm,53.843mm) on Top Layer And Pad U1-34(140.518mm,53.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-33(140.518mm,53.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-34(140.518mm,53.343mm) on Top Layer And Pad U1-35(140.518mm,52.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-34(140.518mm,53.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-35(140.518mm,52.843mm) on Top Layer And Pad U1-36(140.518mm,52.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-35(140.518mm,52.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-36(140.518mm,52.343mm) on Top Layer And Pad U1-37(141.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-36(140.518mm,52.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-37(141.268mm,51.593mm) on Top Layer And Pad U1-38(141.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-37(141.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-38(141.768mm,51.593mm) on Top Layer And Pad U1-39(142.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-38(141.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-39(142.268mm,51.593mm) on Top Layer And Pad U1-40(142.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-39(142.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.096mm < 0.254mm) Between Pad U1-39(142.268mm,51.593mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.096mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-4(147.518mm,53.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-4(147.518mm,53.843mm) on Top Layer And Pad U1-5(147.518mm,54.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-40(142.768mm,51.593mm) on Top Layer And Pad U1-41(143.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-40(142.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.092mm < 0.254mm) Between Pad U1-40(142.768mm,51.593mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.092mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-41(143.268mm,51.593mm) on Top Layer And Pad U1-42(143.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-41(143.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-42(143.768mm,51.593mm) on Top Layer And Pad U1-43(144.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-42(143.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.117mm < 0.254mm) Between Pad U1-42(143.768mm,51.593mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.117mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-43(144.268mm,51.593mm) on Top Layer And Pad U1-44(144.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-43(144.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.13mm < 0.254mm) Between Pad U1-43(144.268mm,51.593mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.13mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-44(144.768mm,51.593mm) on Top Layer And Pad U1-45(145.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-44(144.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-45(145.268mm,51.593mm) on Top Layer And Pad U1-46(145.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-45(145.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-46(145.768mm,51.593mm) on Top Layer And Pad U1-47(146.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-46(145.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-47(146.268mm,51.593mm) on Top Layer And Pad U1-48(146.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-47(146.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-48(146.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-5(147.518mm,54.343mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-6(147.518mm,54.843mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-7(147.518mm,55.343mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-8(147.518mm,55.843mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-9(147.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-5(147.518mm,54.343mm) on Top Layer And Pad U1-6(147.518mm,54.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-6(147.518mm,54.843mm) on Top Layer And Pad U1-7(147.518mm,55.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-7(147.518mm,55.343mm) on Top Layer And Pad U1-8(147.518mm,55.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-8(147.518mm,55.843mm) on Top Layer And Pad U1-9(147.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.134mm < 0.254mm) Between Pad U2-3(168.388mm,55.093mm) on Bottom Layer And Via (169.139mm,56.896mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.134mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.059mm < 0.254mm) Between Pad U3-4(163.322mm,60.706mm) on Bottom Layer And Via (161.265mm,59.055mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.059mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.051mm < 0.254mm) Between Pad U4-11(149.484mm,59.08mm) on Bottom Layer And Via (148.107mm,59.055mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.051mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.253mm < 0.254mm) Between Pad U4-4(143.739mm,56.54mm) on Bottom Layer And Via (145.161mm,57.074mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.253mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.123mm < 0.254mm) Between Pad U4-6(143.739mm,59.08mm) on Bottom Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.123mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.071mm < 0.254mm) Between Pad U4-6(143.739mm,59.08mm) on Bottom Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.071mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.16mm < 0.254mm) Between Pad U4-7(143.739mm,60.35mm) on Bottom Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.16mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.111mm < 0.254mm) Between Pad U4-7(143.739mm,60.35mm) on Bottom Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.111mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.151mm < 0.254mm) Between Pad U5-(151.384mm,50.292mm) on Top Layer And Via (151.105mm,52.146mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.151mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.018mm < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Via (150.012mm,60.35mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.018mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.095mm < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Via (152.832mm,61.011mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.095mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.12mm < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Via (152.857mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.12mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.031mm < 0.254mm) Between Pad U5-4(161.544mm,60.789mm) on Top Layer And Via (161.265mm,59.055mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.031mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.221mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.221mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.17mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Via (145.644mm,59.741mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.17mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.107mm < 0.254mm) Between Via (140.005mm,63.424mm) from Top Layer to Bottom Layer And Via (140.538mm,62.814mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.107mm] / [Bottom Solder] Mask Sliver [0.107mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.184mm < 0.254mm) Between Via (140.538mm,62.814mm) from Top Layer to Bottom Layer And Via (141.402mm,62.611mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.184mm] / [Bottom Solder] Mask Sliver [0.184mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.141mm < 0.254mm) Between Via (141.707mm,59.588mm) from Top Layer to Bottom Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.141mm] / [Bottom Solder] Mask Sliver [0.141mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.086mm < 0.254mm) Between Via (144.856mm,59.69mm) from Top Layer to Bottom Layer And Via (145.644mm,59.741mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.086mm] / [Bottom Solder] Mask Sliver [0.086mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.135mm < 0.254mm) Between Via (145.644mm,59.741mm) from Top Layer to Bottom Layer And Via (146.482mm,59.715mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.135mm] / [Bottom Solder] Mask Sliver [0.135mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.135mm < 0.254mm) Between Via (151.105mm,55.905mm) from Top Layer to Bottom Layer And Via (151.943mm,55.905mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.135mm] / [Bottom Solder] Mask Sliver [0.135mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.241mm < 0.254mm) Between Via (151.661mm,58.417mm) from Top Layer to Bottom Layer And Via (152.578mm,58.191mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.241mm] / [Bottom Solder] Mask Sliver [0.241mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.156mm < 0.254mm) Between Via (152.578mm,53.086mm) from Top Layer to Bottom Layer And Via (152.857mm,52.273mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.156mm] / [Bottom Solder] Mask Sliver [0.156mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.159mm < 0.254mm) Between Via (152.832mm,61.011mm) from Top Layer to Bottom Layer And Via (153.441mm,61.62mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.159mm] / [Bottom Solder] Mask Sliver [0.159mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.135mm < 0.254mm) Between Via (158.699mm,52.934mm) from Top Layer to Bottom Layer And Via (159.537mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.135mm] / [Bottom Solder] Mask Sliver [0.135mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.141mm < 0.254mm) Between Via (161.265mm,59.055mm) from Top Layer to Bottom Layer And Via (161.849mm,58.445mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.141mm] / [Bottom Solder] Mask Sliver [0.141mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (177.343mm,48.108mm) from Top Layer to Bottom Layer And Via (177.343mm,49.035mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (177.343mm,49.035mm) from Top Layer to Bottom Layer And Via (177.343mm,49.962mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (178.841mm,49.035mm) from Top Layer to Bottom Layer And Via (178.841mm,49.962mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (180.162mm,48.108mm) from Top Layer to Bottom Layer And Via (180.162mm,49.035mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
|
||||||
|
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (180.162mm,49.035mm) from Top Layer to Bottom Layer And Via (180.162mm,49.962mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
|
||||||
|
Rule Violations :173
|
||||||
|
|
||||||
|
Processing Rule : Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (143.739mm,51.998mm) on Bottom Overlay And Pad U4-1(143.739mm,52.73mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.09mm < 0.254mm) Between Arc (148.158mm,52.343mm) on Top Overlay And Pad U1-1(147.518mm,52.343mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0.09mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C12-1(172.237mm,49.773mm) on Bottom Layer And Track (171.637mm,50.673mm)(172.837mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C12-2(172.237mm,51.573mm) on Bottom Layer And Track (171.637mm,50.673mm)(172.837mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C13-1(169.596mm,49.773mm) on Bottom Layer And Track (168.996mm,50.673mm)(170.196mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C13-2(169.596mm,51.573mm) on Bottom Layer And Track (168.996mm,50.673mm)(170.196mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C14-1(161.595mm,49.773mm) on Bottom Layer And Track (160.995mm,50.673mm)(162.195mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C14-2(161.595mm,51.573mm) on Bottom Layer And Track (160.995mm,50.673mm)(162.195mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C15-1(163.601mm,49.773mm) on Bottom Layer And Track (163.001mm,50.673mm)(164.201mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C15-2(163.601mm,51.573mm) on Bottom Layer And Track (163.001mm,50.673mm)(164.201mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C16-1(165.608mm,49.773mm) on Bottom Layer And Track (165.008mm,50.673mm)(166.208mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C16-2(165.608mm,51.573mm) on Bottom Layer And Track (165.008mm,50.673mm)(166.208mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.187mm < 0.254mm) Between Pad C17-1(141.3mm,52.524mm) on Bottom Layer And Text "TX" (140.589mm,52.756mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.187mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.186mm < 0.254mm) Between Pad C17-2(141.3mm,53.924mm) on Bottom Layer And Text "TX" (140.589mm,52.756mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.186mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad C6-1(149.174mm,60.943mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C7-1(143.891mm,61.595mm) on Top Layer And Track (144.433mm,60.135mm)(144.433mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.216mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C7-2(143.891mm,60.595mm) on Top Layer And Track (144.433mm,60.135mm)(144.433mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.216mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.22mm < 0.254mm) Between Pad D?-1(157.354mm,50.089mm) on Bottom Layer And Track (154.284mm,49.142mm)(157.284mm,49.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.22mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.206mm < 0.254mm) Between Pad D?-1(157.354mm,50.089mm) on Bottom Layer And Track (154.298mm,51.022mm)(157.298mm,51.022mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.206mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.161mm < 0.254mm) Between Pad D?-1(157.354mm,50.089mm) on Bottom Layer And Track (155.042mm,50.089mm)(156.566mm,50.089mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.161mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.22mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Track (154.284mm,49.142mm)(157.284mm,49.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.22mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.206mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Track (154.298mm,51.022mm)(157.298mm,51.022mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.206mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.161mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Track (155.042mm,50.089mm)(156.566mm,50.089mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.161mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-1(175.971mm,54.889mm) on Bottom Layer And Track (176.736mm,53.381mm)(176.736mm,54.308mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-1(175.971mm,54.889mm) on Bottom Layer And Track (176.736mm,55.471mm)(176.736mm,55.558mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-2(175.971mm,56.139mm) on Bottom Layer And Track (176.736mm,55.471mm)(176.736mm,55.558mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-2(175.971mm,56.139mm) on Bottom Layer And Track (176.736mm,56.72mm)(176.736mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.007mm < 0.254mm) Between Pad P1-3(179.06mm,52.047mm) on Bottom Layer And Track (176.736mm,53.381mm)(180.436mm,53.381mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.007mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.018mm < 0.254mm) Between Pad P1-3(179.06mm,52.047mm) on Bottom Layer And Track (180.436mm,53.391mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.018mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.061mm,58.989mm) on Bottom Layer And Track (176.736mm,57.659mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.061mm,58.989mm) on Bottom Layer And Track (180.436mm,53.391mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-1(140.894mm,56.007mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-2(140.894mm,58.547mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-3(140.894mm,61.087mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Track (149.332mm,49.396mm)(149.332mm,48.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Track (149.332mm,51.163mm)(149.332mm,51.856mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(145.22mm,50.279mm) on Bottom Layer And Track (145.179mm,49.396mm)(145.179mm,48.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(145.22mm,50.279mm) on Bottom Layer And Track (145.179mm,51.163mm)(145.179mm,51.856mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(179.108mm,57.546mm) on Top Layer And Track (177.532mm,57.587mm)(178.225mm,57.587mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(179.108mm,57.546mm) on Top Layer And Track (179.991mm,57.587mm)(180.684mm,57.587mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.108mm,53.476mm) on Top Layer And Track (177.532mm,53.434mm)(178.225mm,53.434mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.108mm,53.476mm) on Top Layer And Track (179.991mm,53.434mm)(180.684mm,53.434mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.211mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Track (147.594mm,51.517mm)(147.594mm,52.012mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.211mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-12(147.518mm,57.843mm) on Top Layer And Track (147.594mm,58.173mm)(147.594mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-13(146.768mm,58.593mm) on Top Layer And Track (147.098mm,58.669mm)(147.594mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.21mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Track (140.442mm,58.669mm)(140.938mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.21mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Track (140.442mm,58.173mm)(140.442mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-36(140.518mm,52.343mm) on Top Layer And Track (140.442mm,51.517mm)(140.442mm,52.012mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-37(141.268mm,51.593mm) on Top Layer And Track (140.442mm,51.517mm)(140.938mm,51.517mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-48(146.768mm,51.593mm) on Top Layer And Track (147.098mm,51.517mm)(147.594mm,51.517mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-1(172.988mm,55.093mm) on Bottom Layer And Track (167.287mm,56.554mm)(174.089mm,56.554mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-2(170.688mm,55.093mm) on Bottom Layer And Track (167.287mm,56.554mm)(174.089mm,56.554mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-3(168.388mm,55.093mm) on Bottom Layer And Track (167.287mm,56.554mm)(174.089mm,56.554mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-4(170.688mm,60.808mm) on Bottom Layer And Track (167.287mm,59.346mm)(174.089mm,59.346mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U3-4(163.322mm,60.706mm) on Bottom Layer And Track (159.996mm,59.307mm)(166.648mm,59.307mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-1(143.739mm,52.73mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-10(149.484mm,60.35mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-11(149.484mm,59.08mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-12(149.484mm,57.81mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-13(149.484mm,56.54mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-14(149.484mm,55.27mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-15(149.484mm,54mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-16(149.484mm,52.73mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-2(143.739mm,54mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-3(143.739mm,55.27mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-4(143.739mm,56.54mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-5(143.739mm,57.81mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-6(143.739mm,59.08mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-7(143.739mm,60.35mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-8(143.739mm,61.62mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-9(149.484mm,61.62mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(151.384mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-(151.384mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.244mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-(174.244mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.244mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.244mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-1(169.164mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-1(169.164mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-10(164.084mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-10(164.084mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-11(166.624mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-11(166.624mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-12(169.164mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-12(169.164mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-2(166.624mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-2(166.624mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-3(164.084mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-3(164.084mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-4(161.544mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-4(161.544mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-5(159.004mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-5(159.004mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-6(156.464mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-6(156.464mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-7(156.464mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-7(156.464mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-8(159.004mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-8(159.004mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-9(161.544mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-9(161.544mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (144.433mm,60.135mm)(148.49mm,60.135mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (144.433mm,62.293mm)(148.49mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.075mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (148.463mm,50.673mm)(148.463mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.075mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.075mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.075mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (148.49mm,60.135mm)(148.49mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Track (144.433mm,60.135mm)(144.433mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Track (144.433mm,60.135mm)(148.49mm,60.135mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||||
|
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Track (144.433mm,62.293mm)(148.49mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||||
|
Rule Violations :111
|
||||||
|
|
||||||
|
Processing Rule : Silk to Silk (Clearance=0.254mm) (All),(All)
|
||||||
|
Violation between Silk To Silk Clearance Constraint: (0.095mm < 0.254mm) Between Text "TX" (140.589mm,52.756mm) on Bottom Overlay And Track (139.624mm,54.737mm)(139.624mm,62.357mm) on Bottom Overlay Silk Text to Silk Clearance [0.095mm]
|
||||||
|
Violation between Silk To Silk Clearance Constraint: (0.092mm < 0.254mm) Between Text "TX" (140.589mm,52.756mm) on Bottom Overlay And Track (139.624mm,54.737mm)(142.164mm,54.737mm) on Bottom Overlay Silk Text to Silk Clearance [0.092mm]
|
||||||
|
Rule Violations :2
|
||||||
|
|
||||||
|
Processing Rule : Net Antennae (Tolerance=0mm) (All)
|
||||||
|
Rule Violations :0
|
||||||
|
|
||||||
|
Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
|
||||||
|
Rule Violations :0
|
||||||
|
|
||||||
|
|
||||||
|
Violations Detected : 286
|
||||||
|
Waived Violations : 0
|
||||||
|
Time Elapsed : 00:00:02
|
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,9 @@
|
|||||||
|
Output: Bill of Materials
|
||||||
|
Type : BOM
|
||||||
|
From : Variant [[No Variations]] of Project [PCB_Project2.PrjPCB]
|
||||||
|
|
||||||
|
|
||||||
|
Files Generated : 0
|
||||||
|
Documents Printed : 0
|
||||||
|
|
||||||
|
Finished Output Generation At 15:00:08 On 2022/5/7
|
BIN
植物探头/使用时间监测模块/SW.PcbLib
Normal file
BIN
植物探头/使用时间监测模块/SW.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/使用时间监测模块/Sheet1.SchDoc
Normal file
BIN
植物探头/使用时间监测模块/Sheet1.SchDoc
Normal file
Binary file not shown.
0
植物探头/使用时间监测模块/debug.log
Normal file
0
植物探头/使用时间监测模块/debug.log
Normal file
BIN
植物探头/使用时间监测模块/esp32-picp-d4.PcbLib
Normal file
BIN
植物探头/使用时间监测模块/esp32-picp-d4.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/使用时间监测模块/s8550.PcbLib
Normal file
BIN
植物探头/使用时间监测模块/s8550.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/可调电流电源模块/3590s-501.PcbLib
Normal file
BIN
植物探头/可调电流电源模块/3590s-501.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/可调电流电源模块/CAP-SMD_BD6.3-L6.6-W6.6-LS7.6-.PcbLib
Normal file
BIN
植物探头/可调电流电源模块/CAP-SMD_BD6.3-L6.6-W6.6-LS7.6-.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/可调电流电源模块/K8-5851D-L1.PcbLib
Normal file
BIN
植物探头/可调电流电源模块/K8-5851D-L1.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/可调电流电源模块/LM317.SchLib
Normal file
BIN
植物探头/可调电流电源模块/LM317.SchLib
Normal file
Binary file not shown.
BIN
植物探头/可调电流电源模块/LMR54410.SchLib
Normal file
BIN
植物探头/可调电流电源模块/LMR54410.SchLib
Normal file
Binary file not shown.
BIN
植物探头/可调电流电源模块/LT1086.PcbLib
Normal file
BIN
植物探头/可调电流电源模块/LT1086.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/可调电流电源模块/LT1086.SchLib
Normal file
BIN
植物探头/可调电流电源模块/LT1086.SchLib
Normal file
Binary file not shown.
BIN
植物探头/可调电流电源模块/NRVBD1035CTLT4G.PcbLib
Normal file
BIN
植物探头/可调电流电源模块/NRVBD1035CTLT4G.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/可调电流电源模块/PCB2.PcbDoc
Normal file
BIN
植物探头/可调电流电源模块/PCB2.PcbDoc
Normal file
Binary file not shown.
1229
植物探头/可调电流电源模块/PCB_Project1.PrjPCB
Normal file
1229
植物探头/可调电流电源模块/PCB_Project1.PrjPCB
Normal file
File diff suppressed because it is too large
Load Diff
1
植物探头/可调电流电源模块/PCB_Project1.PrjPCBStructure
Normal file
1
植物探头/可调电流电源模块/PCB_Project1.PrjPCBStructure
Normal file
@ -0,0 +1 @@
|
|||||||
|
Record=TopLevelDocument|FileName=Sheet2.SchDoc
|
BIN
植物探头/可调电流电源模块/Sheet2.SchDoc
Normal file
BIN
植物探头/可调电流电源模块/Sheet2.SchDoc
Normal file
Binary file not shown.
0
植物探头/可调电流电源模块/debug.log
Normal file
0
植物探头/可调电流电源模块/debug.log
Normal file
BIN
植物探头/可调电流电源模块/村田200.PcbLib
Normal file
BIN
植物探头/可调电流电源模块/村田200.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/可调电流电源模块/采样电阻.PcbLib
Normal file
BIN
植物探头/可调电流电源模块/采样电阻.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/芯片资料/1086ffs.pdf
Normal file
BIN
植物探头/芯片资料/1086ffs.pdf
Normal file
Binary file not shown.
11193
植物探头/芯片资料/R-5A.pdf
Normal file
11193
植物探头/芯片资料/R-5A.pdf
Normal file
File diff suppressed because one or more lines are too long
BIN
植物探头/芯片资料/lm317.pdf
Normal file
BIN
植物探头/芯片资料/lm317.pdf
Normal file
Binary file not shown.
Reference in New Issue
Block a user