270 lines
53 KiB
Plaintext
270 lines
53 KiB
Plaintext
Protel Design System Design Rule Check
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PCB File : C:\Users\hu123456\Desktop\ʹÓÃʱ¼ä¼à²âÄ£¿é\PCB1.PcbDoc
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Date : 2022/6/30
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Time : 13:25:17
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Processing Rule : Clearance Constraint (Gap=0.2mm) (All),(All)
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Rule Violations :0
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Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
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Rule Violations :0
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Processing Rule : Un-Routed Net Constraint ( (All) )
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Rule Violations :0
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Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No)
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Rule Violations :0
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Processing Rule : Width Constraint (Min=0.2mm) (Max=1mm) (Preferred=0.254mm) (All)
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Rule Violations :0
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Processing Rule : Power Plane Connect Rule(Direct Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
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Rule Violations :0
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Processing Rule : Hole Size Constraint (Min=0.025mm) (Max=2.54mm) (All)
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Rule Violations :0
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Processing Rule : Hole To Hole Clearance (Gap=0.254mm) (All),(All)
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Rule Violations :0
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Processing Rule : Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C1-1(146.677mm,60.3mm) on Top Layer And Pad C1-2(147.677mm,60.3mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.211mm < 0.254mm) Between Pad C1-1(146.677mm,60.3mm) on Top Layer And Pad R1-2(146.694mm,61.214mm) on Top Layer [Top Solder] Mask Sliver [0.211mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C11-1(141.275mm,50.436mm) on Top Layer And Pad C11-2(141.275mm,49.436mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.211mm < 0.254mm) Between Pad C1-2(147.677mm,60.3mm) on Top Layer And Pad R1-1(147.694mm,61.214mm) on Top Layer [Top Solder] Mask Sliver [0.211mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.11mm < 0.254mm) Between Pad C1-2(147.677mm,60.3mm) on Top Layer And Via (147.93mm,59.487mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.11mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.209mm < 0.254mm) Between Pad C14-1(166.903mm,56.207mm) on Bottom Layer And Via (165.786mm,55.042mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.209mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.166mm < 0.254mm) Between Pad C14-2(166.903mm,54.407mm) on Bottom Layer And Via (167.005mm,53.188mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.166mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.236mm < 0.254mm) Between Pad C18-2(140.64mm,51.991mm) on Bottom Layer And Pad C19-2(140.64mm,50.752mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.236mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C3-1(145.771mm,49.436mm) on Top Layer And Pad C3-2(145.771mm,50.436mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.156mm < 0.254mm) Between Pad C4-2(154.127mm,59.106mm) on Bottom Layer And Via (151.613mm,58.649mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.156mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.182mm < 0.254mm) Between Pad C4-2(154.127mm,59.106mm) on Bottom Layer And Via (156.667mm,57.836mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.182mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C5-1(144.272mm,49.436mm) on Top Layer And Pad C5-2(144.272mm,50.436mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C8-1(143.264mm,60.655mm) on Top Layer And Pad C8-2(144.264mm,60.655mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.241mm < 0.254mm) Between Pad P2-2(141.224mm,58.547mm) on Bottom Layer And Via (140.64mm,59.868mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.241mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.149mm < 0.254mm) Between Pad P2-3(141.224mm,61.087mm) on Bottom Layer And Via (140.64mm,59.868mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.149mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R1-1(147.694mm,61.214mm) on Top Layer And Pad R1-2(146.694mm,61.214mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R2-1(150.343mm,49.995mm) on Bottom Layer And Pad R2-2(150.343mm,50.995mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.186mm < 0.254mm) Between Pad R2-1(150.343mm,49.995mm) on Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.186mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.222mm < 0.254mm) Between Pad R2-2(150.343mm,50.995mm) on Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.222mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R3-1(176.352mm,57.904mm) on Bottom Layer And Pad R3-2(176.352mm,56.904mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad R6-2(160.325mm,51.918mm) on Bottom Layer And Via (159.461mm,52.299mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.01mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.124mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Via (148.107mm,51.486mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.124mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.113mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.113mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.234mm < 0.254mm) Between Pad U?-3(164.166mm,56.145mm) on Bottom Layer And Via (165.786mm,55.042mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.234mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.191mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Via (156.616mm,56.972mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.191mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.141mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Via (156.667mm,57.836mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.141mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.185mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Via (157.353mm,56.007mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.185mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-1(147.518mm,52.749mm) on Top Layer And Pad U1-2(147.518mm,53.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-1(147.518mm,52.749mm) on Top Layer And Pad U1-48(146.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,57.249mm) on Top Layer And Pad U1-11(147.518mm,57.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,57.249mm) on Top Layer And Pad U1-9(147.518mm,56.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-11(147.518mm,57.749mm) on Top Layer And Pad U1-12(147.518mm,58.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-12(147.518mm,58.249mm) on Top Layer And Pad U1-13(146.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-13(146.768mm,58.999mm) on Top Layer And Pad U1-14(146.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-14(146.268mm,58.999mm) on Top Layer And Pad U1-15(145.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.173mm < 0.254mm) Between Pad U1-14(146.268mm,58.999mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.173mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-15(145.768mm,58.999mm) on Top Layer And Pad U1-16(145.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.107mm < 0.254mm) Between Pad U1-15(145.768mm,58.999mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.107mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-16(145.268mm,58.999mm) on Top Layer And Pad U1-17(144.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.176mm < 0.254mm) Between Pad U1-16(145.268mm,58.999mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.176mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-17(144.768mm,58.999mm) on Top Layer And Pad U1-18(144.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-18(144.268mm,58.999mm) on Top Layer And Pad U1-19(143.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-19(143.768mm,58.999mm) on Top Layer And Pad U1-20(143.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-2(147.518mm,53.249mm) on Top Layer And Pad U1-3(147.518mm,53.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-20(143.268mm,58.999mm) on Top Layer And Pad U1-21(142.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-21(142.768mm,58.999mm) on Top Layer And Pad U1-22(142.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.187mm < 0.254mm) Between Pad U1-21(142.768mm,58.999mm) on Top Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.187mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-22(142.268mm,58.999mm) on Top Layer And Pad U1-23(141.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.121mm < 0.254mm) Between Pad U1-22(142.268mm,58.999mm) on Top Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.121mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-23(141.768mm,58.999mm) on Top Layer And Pad U1-24(141.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.186mm < 0.254mm) Between Pad U1-23(141.768mm,58.999mm) on Top Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.186mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-24(141.268mm,58.999mm) on Top Layer And Pad U1-25(140.518mm,58.249mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.181mm < 0.254mm) Between Pad U1-24(141.268mm,58.999mm) on Top Layer And Via (140.64mm,59.868mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.181mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-25(140.518mm,58.249mm) on Top Layer And Pad U1-26(140.518mm,57.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-26(140.518mm,57.749mm) on Top Layer And Pad U1-27(140.518mm,57.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-27(140.518mm,57.249mm) on Top Layer And Pad U1-28(140.518mm,56.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-28(140.518mm,56.749mm) on Top Layer And Pad U1-29(140.518mm,56.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-29(140.518mm,56.249mm) on Top Layer And Pad U1-30(140.518mm,55.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-3(147.518mm,53.749mm) on Top Layer And Pad U1-4(147.518mm,54.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.082mm < 0.254mm) Between Pad U1-3(147.518mm,53.749mm) on Top Layer And Via (146.583mm,54mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.082mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-30(140.518mm,55.749mm) on Top Layer And Pad U1-31(140.518mm,55.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-31(140.518mm,55.249mm) on Top Layer And Pad U1-32(140.518mm,54.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-32(140.518mm,54.749mm) on Top Layer And Pad U1-33(140.518mm,54.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-33(140.518mm,54.249mm) on Top Layer And Pad U1-34(140.518mm,53.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-34(140.518mm,53.749mm) on Top Layer And Pad U1-35(140.518mm,53.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-35(140.518mm,53.249mm) on Top Layer And Pad U1-36(140.518mm,52.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-36(140.518mm,52.749mm) on Top Layer And Pad U1-37(141.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-37(141.268mm,51.999mm) on Top Layer And Pad U1-38(141.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.225mm < 0.254mm) Between Pad U1-37(141.268mm,51.999mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.225mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-38(141.768mm,51.999mm) on Top Layer And Pad U1-39(142.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.107mm < 0.254mm) Between Pad U1-38(141.768mm,51.999mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.107mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-39(142.268mm,51.999mm) on Top Layer And Pad U1-40(142.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.136mm < 0.254mm) Between Pad U1-39(142.268mm,51.999mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.136mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-4(147.518mm,54.249mm) on Top Layer And Pad U1-5(147.518mm,54.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.082mm < 0.254mm) Between Pad U1-4(147.518mm,54.249mm) on Top Layer And Via (146.583mm,54mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.082mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-40(142.768mm,51.999mm) on Top Layer And Pad U1-41(143.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-41(143.268mm,51.999mm) on Top Layer And Pad U1-42(143.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-42(143.768mm,51.999mm) on Top Layer And Pad U1-43(144.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-43(144.268mm,51.999mm) on Top Layer And Pad U1-44(144.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-44(144.768mm,51.999mm) on Top Layer And Pad U1-45(145.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-45(145.268mm,51.999mm) on Top Layer And Pad U1-46(145.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-46(145.768mm,51.999mm) on Top Layer And Pad U1-47(146.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.081mm < 0.254mm) Between Pad U1-46(145.768mm,51.999mm) on Top Layer And Via (145.948mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.081mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-47(146.268mm,51.999mm) on Top Layer And Pad U1-48(146.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.088mm < 0.254mm) Between Pad U1-47(146.268mm,51.999mm) on Top Layer And Via (145.948mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.088mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.091mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.091mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.087mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.087mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.112mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (145.948mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.112mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.112mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (146.583mm,54mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.112mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-5(147.518mm,54.749mm) on Top Layer And Pad U1-6(147.518mm,55.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-6(147.518mm,55.249mm) on Top Layer And Pad U1-7(147.518mm,55.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-7(147.518mm,55.749mm) on Top Layer And Pad U1-8(147.518mm,56.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-8(147.518mm,56.249mm) on Top Layer And Pad U1-9(147.518mm,56.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.143mm < 0.254mm) Between Pad U2-2(171.501mm,54.813mm) on Bottom Layer And Via (171.45mm,52.984mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.143mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.215mm < 0.254mm) Between Pad U4-1(163.417mm,53.726mm) on Bottom Layer And Pad U4-2(164.367mm,53.726mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.215mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.231mm < 0.254mm) Between Pad U4-1(163.417mm,53.726mm) on Bottom Layer And Via (164.367mm,53.726mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.231mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.215mm < 0.254mm) Between Pad U4-2(164.367mm,53.726mm) on Bottom Layer And Pad U4-3(165.317mm,53.726mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.215mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.231mm < 0.254mm) Between Pad U4-3(165.317mm,53.726mm) on Bottom Layer And Via (164.367mm,53.726mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.231mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.195mm < 0.254mm) Between Pad U5-7(143.739mm,60.274mm) on Bottom Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.195mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.253mm < 0.254mm) Between Pad U6-11(166.624mm,50.292mm) on Top Layer And Via (166.827mm,52.248mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.253mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.177mm < 0.254mm) Between Via (148.107mm,51.486mm) from Top Layer to Bottom Layer And Via (148.742mm,50.876mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.177mm] / [Bottom Solder] Mask Sliver [0.177mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.156mm < 0.254mm) Between Via (148.742mm,50.876mm) from Top Layer to Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.156mm] / [Bottom Solder] Mask Sliver [0.156mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.162mm < 0.254mm) Between Via (156.616mm,56.972mm) from Top Layer to Bottom Layer And Via (156.667mm,57.836mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.162mm] / [Bottom Solder] Mask Sliver [0.162mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.217mm < 0.254mm) Between Via (157.353mm,56.007mm) from Top Layer to Bottom Layer And Via (158.064mm,55.423mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.217mm] / [Bottom Solder] Mask Sliver [0.217mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.177mm < 0.254mm) Between Via (158.818mm,52.9mm) from Top Layer to Bottom Layer And Via (159.461mm,52.299mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.177mm] / [Bottom Solder] Mask Sliver [0.177mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.253mm < 0.254mm) Between Via (166.827mm,52.248mm) from Top Layer to Bottom Layer And Via (167.005mm,53.188mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.253mm] / [Bottom Solder] Mask Sliver [0.253mm]
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Rule Violations :106
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Processing Rule : Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
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Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (143.739mm,51.922mm) on Bottom Overlay And Pad U5-1(143.739mm,52.654mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.09mm < 0.254mm) Between Arc (148.158mm,52.749mm) on Top Overlay And Pad U1-1(147.518mm,52.749mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0.09mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (162.699mm,53.878mm) on Bottom Overlay And Pad U4-1(163.417mm,53.726mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C12-1(172.237mm,49.773mm) on Bottom Layer And Track (171.637mm,50.673mm)(172.837mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C12-2(172.237mm,51.573mm) on Bottom Layer And Track (171.637mm,50.673mm)(172.837mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C13-1(169.596mm,49.773mm) on Bottom Layer And Track (168.996mm,50.673mm)(170.196mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.164mm < 0.254mm) Between Pad C13-2(169.596mm,51.573mm) on Bottom Layer And Text "U4" (168.605mm,51.867mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.164mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C13-2(169.596mm,51.573mm) on Bottom Layer And Track (168.996mm,50.673mm)(170.196mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C14-1(166.903mm,56.207mm) on Bottom Layer And Track (166.303mm,55.307mm)(167.503mm,55.307mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C14-2(166.903mm,54.407mm) on Bottom Layer And Track (166.303mm,55.307mm)(167.503mm,55.307mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C15-1(166.903mm,58.714mm) on Bottom Layer And Track (166.303mm,59.614mm)(167.503mm,59.614mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C15-2(166.903mm,60.514mm) on Bottom Layer And Track (166.303mm,59.614mm)(167.503mm,59.614mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.228mm < 0.254mm) Between Pad C18-1(140.64mm,53.391mm) on Bottom Layer And Text "TX" (142.392mm,54.356mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.228mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.249mm < 0.254mm) Between Pad P1-1(176.022mm,52.934mm) on Bottom Layer And Text "+" (175.336mm,51.206mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.249mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-1(176.022mm,52.934mm) on Bottom Layer And Track (176.787mm,51.425mm)(176.787mm,52.352mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-1(176.022mm,52.934mm) on Bottom Layer And Track (176.787mm,53.515mm)(176.787mm,53.602mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-2(176.022mm,54.183mm) on Bottom Layer And Track (176.787mm,53.515mm)(176.787mm,53.602mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-2(176.022mm,54.183mm) on Bottom Layer And Track (176.787mm,54.764mm)(176.787mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.007mm < 0.254mm) Between Pad P1-3(179.111mm,50.091mm) on Bottom Layer And Track (176.787mm,51.425mm)(180.487mm,51.425mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.007mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.018mm < 0.254mm) Between Pad P1-3(179.111mm,50.091mm) on Bottom Layer And Track (180.487mm,51.436mm)(180.487mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.018mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.112mm,57.033mm) on Bottom Layer And Track (176.787mm,55.703mm)(180.487mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.112mm,57.033mm) on Bottom Layer And Track (180.487mm,51.436mm)(180.487mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Track (148.163mm,49.345mm)(148.163mm,48.652mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Track (148.163mm,51.112mm)(148.163mm,51.805mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(144.052mm,50.229mm) on Bottom Layer And Track (144.011mm,49.345mm)(144.011mm,48.652mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(144.052mm,50.229mm) on Bottom Layer And Track (144.011mm,51.112mm)(144.011mm,51.805mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(175.728mm,60.261mm) on Bottom Layer And Track (175.687mm,58.685mm)(175.687mm,59.378mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(175.728mm,60.261mm) on Bottom Layer And Track (175.687mm,61.838mm)(175.687mm,61.145mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.798mm,60.261mm) on Bottom Layer And Track (179.839mm,58.685mm)(179.839mm,59.378mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.798mm,60.261mm) on Bottom Layer And Track (179.839mm,61.838mm)(179.839mm,61.145mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-1(164.166mm,60.745mm) on Bottom Layer And Track (162.702mm,55.119mm)(162.702mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-2(164.166mm,58.445mm) on Bottom Layer And Track (162.702mm,55.119mm)(162.702mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-3(164.166mm,56.145mm) on Bottom Layer And Track (162.702mm,55.119mm)(162.702mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.022mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Track (156.54mm,59.106mm)(157.175mm,59.106mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.022mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.022mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Track (157.175mm,51.994mm)(157.175mm,59.106mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.022mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Track (159.96mm,55.119mm)(159.96mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.211mm < 0.254mm) Between Pad U1-1(147.518mm,52.749mm) on Top Layer And Track (147.594mm,51.923mm)(147.594mm,52.419mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.211mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-12(147.518mm,58.249mm) on Top Layer And Track (147.594mm,58.58mm)(147.594mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-13(146.768mm,58.999mm) on Top Layer And Track (147.098mm,59.075mm)(147.594mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.215mm < 0.254mm) Between Pad U1-22(142.268mm,58.999mm) on Top Layer And Text "U1" (140.132mm,59.741mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.215mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.215mm < 0.254mm) Between Pad U1-23(141.768mm,58.999mm) on Top Layer And Text "U1" (140.132mm,59.741mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.215mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.21mm < 0.254mm) Between Pad U1-24(141.268mm,58.999mm) on Top Layer And Track (140.442mm,59.075mm)(140.938mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.21mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-25(140.518mm,58.249mm) on Top Layer And Track (140.442mm,58.58mm)(140.442mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-36(140.518mm,52.749mm) on Top Layer And Track (140.442mm,51.923mm)(140.442mm,52.419mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-37(141.268mm,51.999mm) on Top Layer And Track (140.442mm,51.923mm)(140.938mm,51.923mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-48(146.768mm,51.999mm) on Top Layer And Track (147.098mm,51.923mm)(147.594mm,51.923mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-1(173.801mm,54.813mm) on Bottom Layer And Track (168.1mm,56.274mm)(174.902mm,56.274mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-2(171.501mm,54.813mm) on Bottom Layer And Track (168.1mm,56.274mm)(174.902mm,56.274mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.076mm < 0.254mm) Between Pad U2-3(169.201mm,54.813mm) on Bottom Layer And Text "U4" (168.605mm,51.867mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.076mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-3(169.201mm,54.813mm) on Bottom Layer And Track (168.1mm,56.274mm)(174.902mm,56.274mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-4(171.501mm,60.528mm) on Bottom Layer And Track (168.1mm,59.067mm)(174.902mm,59.067mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.253mm < 0.254mm) Between Pad U4-4(165.317mm,51.431mm) on Bottom Layer And Track (163.911mm,51.677mm)(164.822mm,51.677mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.253mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U4-5(163.417mm,51.431mm) on Bottom Layer And Track (163.911mm,51.677mm)(164.822mm,51.677mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-1(143.739mm,52.654mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-10(149.484mm,60.274mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-11(149.484mm,59.004mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-12(149.484mm,57.734mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-13(149.484mm,56.464mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-14(149.484mm,55.194mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-15(149.484mm,53.924mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-16(149.484mm,52.654mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-2(143.739mm,53.924mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-3(143.739mm,55.194mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-4(143.739mm,56.464mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-4(143.739mm,56.464mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-5(143.739mm,57.734mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-5(143.739mm,57.734mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-6(143.739mm,59.004mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-6(143.739mm,59.004mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-7(143.739mm,60.274mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-7(143.739mm,60.274mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-8(143.739mm,61.544mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-9(149.484mm,61.544mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,50.292mm) on Top Overlay And Region (0 hole(s)) Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,50.292mm) on Top Overlay And Track (151.486mm,50.597mm)(151.486mm,53.384mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,50.292mm) on Top Overlay And Via (151.486mm,50.597mm) from Top Layer to Bottom Layer [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.196mm < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Region (0 hole(s)) Top Layer [Top Overlay] to [Top Solder] clearance [0.196mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Region (0 hole(s)) Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Track (150.038mm,61.544mm)(150.52mm,61.062mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0.124mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Track (151.13mm,59.995mm)(151.917mm,59.995mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.225mm < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Via (150.038mm,61.544mm) from Top Layer to Bottom Layer [Top Overlay] to [Top Solder] clearance [0.225mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Via (151.13mm,59.995mm) from Top Layer to Bottom Layer [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(174.244mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-(174.244mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(174.244mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(174.244mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-1(169.164mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-1(169.164mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-10(164.084mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-10(164.084mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-11(166.624mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-11(166.624mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-12(169.164mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-12(169.164mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-2(166.624mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-2(166.624mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-3(164.084mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-3(164.084mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-4(161.544mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-4(161.544mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-5(159.004mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-5(159.004mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-6(156.464mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-6(156.464mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-7(156.464mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-7(156.464mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-8(159.004mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-8(159.004mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-9(161.544mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-9(161.544mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
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Rule Violations :110
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Processing Rule : Silk to Silk (Clearance=0.254mm) (All),(All)
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Violation between Silk To Silk Clearance Constraint: (0.195mm < 0.254mm) Between Text "+" (175.336mm,51.206mm) on Bottom Overlay And Track (176.787mm,51.425mm)(176.787mm,52.352mm) on Bottom Overlay Silk Text to Silk Clearance [0.195mm]
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Violation between Silk To Silk Clearance Constraint: (0.07mm < 0.254mm) Between Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay And Track (142.494mm,54.737mm)(142.494mm,62.357mm) on Bottom Overlay Silk Text to Silk Clearance [0.07mm]
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Violation between Silk To Silk Clearance Constraint: (0.129mm < 0.254mm) Between Text "RESET" (180.645mm,62.103mm) on Bottom Overlay And Track (175.687mm,61.838mm)(179.839mm,61.838mm) on Bottom Overlay Silk Text to Silk Clearance [0.129mm]
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Violation between Silk To Silk Clearance Constraint: (0.14mm < 0.254mm) Between Text "RESET" (180.645mm,62.103mm) on Bottom Overlay And Track (179.839mm,61.838mm)(179.839mm,61.145mm) on Bottom Overlay Silk Text to Silk Clearance [0.14mm]
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Violation between Silk To Silk Clearance Constraint: (0.206mm < 0.254mm) Between Text "TX" (142.392mm,54.356mm) on Bottom Overlay And Track (139.954mm,54.737mm)(142.494mm,54.737mm) on Bottom Overlay Silk Text to Silk Clearance [0.206mm]
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Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "U4" (168.605mm,51.867mm) on Bottom Overlay And Track (165.918mm,51.677mm)(165.918mm,53.479mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
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Rule Violations :6
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Processing Rule : Net Antennae (Tolerance=0mm) (All)
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Rule Violations :0
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Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
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Rule Violations :0
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Violations Detected : 222
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Waived Violations : 0
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Time Elapsed : 00:00:01 |