添加ADC采集电压和RGB灯
This commit is contained in:
10
APP/foc.c
10
APP/foc.c
@ -5,7 +5,7 @@
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#define _constrain(amt,low,high) ((amt)<(low)?(low):((amt)>(high)?(high):(amt)))
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float Voltage_PowerSupply = 12;
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const float Voltage_PowerSupply = 12;
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float Pole_Pairs = 14;
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float Voltage_Limit = 6.9;
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float Velocity_Limit = 100;
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@ -17,15 +17,15 @@ FOCTypeDef FOCStruct_Y={0,0,0,0,0,0,0,0,0,0,0,0,0,0};
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void PID_Iint(void)
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{
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FOCStruct_X.ZT_KP = 4;
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FOCStruct_X.ZT_KP = 3.5;
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FOCStruct_X.ZT_KI = 0;
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FOCStruct_X.ZT_KD = 0.5;
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FOCStruct_X.V_KP = 0.1;
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FOCStruct_X.V_KI = 2;
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FOCStruct_X.V_KI = 1;
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FOCStruct_X.V_KD = 0;
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//2024/1/2 Y<><59>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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FOCStruct_Y.ZT_KP = 2;
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///////////
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FOCStruct_Y.ZT_KP = 3;
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FOCStruct_Y.ZT_KI = 0;
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FOCStruct_Y.ZT_KD = 0.5;
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31
APP/mymain.c
31
APP/mymain.c
@ -9,35 +9,40 @@ void mymain()
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HAL_UART_Receive_IT(&huart1, (uint8_t *)g_rx_buffer, RXBUFFERSIZE); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
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HAL_Delay(2000);
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led_init();
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adc_init();
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tle5012b_init();
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Init_ICM42688();
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imu_rest();
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// Init_ICM42688();
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// imu_rest();
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moto_Init();
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PID_Iint();
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setvbuf(stdout, NULL, _IONBF, 0); //<2F><><EFBFBD><EFBFBD>printfû<66><C3BB>\n<><6E><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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float x = 0,y=0;
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unsigned int i =0;
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HAL_TIM_Base_Start(&htim5); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>
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// while(i<3300*3)
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// while(i<2000*1)
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// {
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// Angel_closed_loop(motorx,&FOCStruct_X,-0.2);
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// Angel_closed_loop(motory,&FOCStruct_Y,2.3);
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//// MpuGetData();
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//// GetAngle(&ICM42688,&Angle);
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// Angel_closed_loop(motorx,&FOCStruct_X,3.0);
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// Angel_closed_loop(motory,&FOCStruct_Y,2.2);
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// i++;
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// }
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// i=0;
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LED_ON;
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// LED_ON;
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while(1)
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{
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MpuGetData();
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GetAngle(&ICM42688,&Angle);
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x = Angle.pitch;
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y = Angle.roll ;
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Zitai_closed_loop(motorx,&FOCStruct_X,x);
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Zitai_closed_loop(motory,&FOCStruct_Y,-y);
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commander_run();
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// MpuGetData();
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// GetAngle(&ICM42688,&Angle);
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// x = Angle.pitch;
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// y = Angle.roll;
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// Zitai_closed_loop(motorx,&FOCStruct_X,x);
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// Zitai_closed_loop(motory,&FOCStruct_Y,-y);
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// commander_run();
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// x = getAngle(motorx);
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// y = getAngle(motory);
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// x= get_VCC();
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// printf("%fY%f\n",x,y);
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// HAL_Delay(2);
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// speed_closed_loop(motorx,&FOCStruct_X,_2PI*5);
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// speed_closed_loop(motory,&FOCStruct_Y,_2PI*2);
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// printf("b%d\n",b);
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@ -16,6 +16,7 @@
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#include "main.h"
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#include "tim.h"
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#include "adc.h"
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#include "usart.h"
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#include "gpio.h"
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#include "tle5012b.h"
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@ -30,6 +31,7 @@
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#include "LED.h"
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#include "Usart1.h"
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#include "LED_RGB.h"
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#include "vcc_adc.h"
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void mymain();
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#endif //FOC_N_MYMAIN_H
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43
APP/vcc_adc.c
Normal file
43
APP/vcc_adc.c
Normal file
@ -0,0 +1,43 @@
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//
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// Created by hu123456 on 2024/3/8.
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//
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#include "vcc_adc.h"
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void adc_init(void)
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{
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HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED);
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}
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uint32_t adc_get_result(void)
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{
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ADC_ChannelConfTypeDef adc_ch_conf = {0};
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adc_ch_conf.Channel = ADC_CHANNEL_8;
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adc_ch_conf.Rank = ADC_REGULAR_RANK_1;
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adc_ch_conf.SamplingTime = ADC_SAMPLETIME_810CYCLES_5;
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adc_ch_conf.SingleDiff = ADC_SINGLE_ENDED;
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adc_ch_conf.OffsetNumber = ADC_OFFSET_NONE;
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adc_ch_conf.Offset = 0;
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HAL_ADC_ConfigChannel(&hadc1, &adc_ch_conf);
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HAL_ADC_Start(&hadc1);
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HAL_ADC_PollForConversion(&hadc1, 10);
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return HAL_ADC_GetValue(&hadc1);
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}
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float get_VCC(void)
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{
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uint32_t temp_val = 0;
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float vcc;
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for (uint8_t t = 0; t < 10; t++)
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{
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temp_val += adc_get_result();
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HAL_Delay(5);
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}
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vcc = temp_val/10.f/65535.f * 3.3 * 11.f;
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return vcc;
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}
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14
APP/vcc_adc.h
Normal file
14
APP/vcc_adc.h
Normal file
@ -0,0 +1,14 @@
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//
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// Created by hu123456 on 2024/3/8.
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//
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#ifndef FOC_N_VCC_ADC_H
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#define FOC_N_VCC_ADC_H
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#include "mymain.h"
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void adc_init(void);
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uint32_t adc_get_result(void);
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float get_VCC(void);
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#endif //FOC_N_VCC_ADC_H
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52
Core/Inc/adc.h
Normal file
52
Core/Inc/adc.h
Normal file
@ -0,0 +1,52 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file adc.h
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* @brief This file contains all the function prototypes for
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* the adc.c file
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2024 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __ADC_H__
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#define __ADC_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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extern ADC_HandleTypeDef hadc1;
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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void MX_ADC1_Init(void);
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/* USER CODE BEGIN Prototypes */
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/* USER CODE END Prototypes */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ADC_H__ */
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@ -34,7 +34,7 @@
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*/
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#define HAL_MODULE_ENABLED
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/* #define HAL_ADC_MODULE_ENABLED */
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#define HAL_ADC_MODULE_ENABLED
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/* #define HAL_FDCAN_MODULE_ENABLED */
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/* #define HAL_FMAC_MODULE_ENABLED */
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/* #define HAL_CEC_MODULE_ENABLED */
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163
Core/Src/adc.c
Normal file
163
Core/Src/adc.c
Normal file
@ -0,0 +1,163 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file adc.c
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* @brief This file provides code for the configuration
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* of the ADC instances.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2024 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "adc.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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ADC_HandleTypeDef hadc1;
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/* ADC1 init function */
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void MX_ADC1_Init(void)
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{
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/* USER CODE BEGIN ADC1_Init 0 */
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/* USER CODE END ADC1_Init 0 */
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ADC_MultiModeTypeDef multimode = {0};
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ADC_ChannelConfTypeDef sConfig = {0};
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/* USER CODE BEGIN ADC1_Init 1 */
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/* USER CODE END ADC1_Init 1 */
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/** Common config
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*/
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hadc1.Instance = ADC1;
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hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
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hadc1.Init.Resolution = ADC_RESOLUTION_16B;
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hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
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hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
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hadc1.Init.LowPowerAutoWait = DISABLE;
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hadc1.Init.ContinuousConvMode = DISABLE;
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hadc1.Init.NbrOfConversion = 1;
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hadc1.Init.DiscontinuousConvMode = DISABLE;
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hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
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hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
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hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
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hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
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hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
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hadc1.Init.OversamplingMode = DISABLE;
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if (HAL_ADC_Init(&hadc1) != HAL_OK)
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{
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Error_Handler();
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}
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/** Configure the ADC multi-mode
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*/
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multimode.Mode = ADC_MODE_INDEPENDENT;
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if (HAL_ADCEx_MultiModeConfigChannel(&hadc1, &multimode) != HAL_OK)
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{
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Error_Handler();
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}
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/** Configure Regular Channel
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*/
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sConfig.Channel = ADC_CHANNEL_8;
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sConfig.Rank = ADC_REGULAR_RANK_1;
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sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
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sConfig.SingleDiff = ADC_SINGLE_ENDED;
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sConfig.OffsetNumber = ADC_OFFSET_NONE;
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sConfig.Offset = 0;
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sConfig.OffsetSignedSaturation = DISABLE;
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if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN ADC1_Init 2 */
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/* USER CODE END ADC1_Init 2 */
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}
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void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
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if(adcHandle->Instance==ADC1)
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{
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/* USER CODE BEGIN ADC1_MspInit 0 */
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/* USER CODE END ADC1_MspInit 0 */
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/** Initializes the peripherals clock
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*/
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC;
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PeriphClkInitStruct.PLL2.PLL2M = 25;
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PeriphClkInitStruct.PLL2.PLL2N = 240;
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PeriphClkInitStruct.PLL2.PLL2P = 10;
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PeriphClkInitStruct.PLL2.PLL2Q = 2;
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PeriphClkInitStruct.PLL2.PLL2R = 2;
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PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_0;
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PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOWIDE;
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PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
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PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
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{
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Error_Handler();
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}
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/* ADC1 clock enable */
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__HAL_RCC_ADC12_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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/**ADC1 GPIO Configuration
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PC5 ------> ADC1_INP8
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*/
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GPIO_InitStruct.Pin = GPIO_PIN_5;
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GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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/* USER CODE BEGIN ADC1_MspInit 1 */
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/* USER CODE END ADC1_MspInit 1 */
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}
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}
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void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
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{
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if(adcHandle->Instance==ADC1)
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{
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/* USER CODE BEGIN ADC1_MspDeInit 0 */
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/* USER CODE END ADC1_MspDeInit 0 */
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/* Peripheral clock disable */
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__HAL_RCC_ADC12_CLK_DISABLE();
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/**ADC1 GPIO Configuration
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PC5 ------> ADC1_INP8
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*/
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HAL_GPIO_DeInit(GPIOC, GPIO_PIN_5);
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/* USER CODE BEGIN ADC1_MspDeInit 1 */
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/* USER CODE END ADC1_MspDeInit 1 */
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}
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
|
@ -42,9 +42,9 @@ void MX_GPIO_Init(void)
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/* GPIO Ports Clock Enable */
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__HAL_RCC_GPIOH_CLK_ENABLE();
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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}
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|
@ -18,6 +18,7 @@
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "adc.h"
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#include "spi.h"
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#include "tim.h"
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#include "usart.h"
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@ -94,10 +95,11 @@ int main(void)
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MX_SPI1_Init();
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MX_SPI2_Init();
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MX_TIM4_Init();
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MX_ADC1_Init();
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/* USER CODE BEGIN 2 */
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||||
/* USER CODE END 2 */
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mymain();
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/* USER CODE END 2 */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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while (1)
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@ -133,6 +135,10 @@ void SystemClock_Config(void)
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while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
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/** Macro to configure the PLL clock source
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*/
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__HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE);
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/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
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*/
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|
@ -109,7 +109,7 @@ void MX_TIM3_Init(void)
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htim3.Instance = TIM3;
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htim3.Init.Prescaler = 1 - 1;
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htim3.Init.CounterMode = TIM_COUNTERMODE_CENTERALIGNED1;
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htim3.Init.Period = 4800-1;
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htim3.Init.Period = 4800 - 1;
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htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
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htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
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if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
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@ -169,9 +169,9 @@ void MX_TIM4_Init(void)
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||||
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/* USER CODE END TIM4_Init 1 */
|
||||
htim4.Instance = TIM4;
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||||
htim4.Init.Prescaler = 240 - 1;
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htim4.Init.Prescaler = 1 - 1;
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htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
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htim4.Init.Period = 255;
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htim4.Init.Period = 255 - 1;
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htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
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htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
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if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
|
||||
|
1167
IMU/icm42688.c
1167
IMU/icm42688.c
File diff suppressed because it is too large
Load Diff
511
IMU/icm42688.h
511
IMU/icm42688.h
@ -1,212 +1,10 @@
|
||||
#ifndef _DMX_ICM42688_H_
|
||||
#define _DMX_ICM42688_H_
|
||||
#include "stm32h7xx_hal.h"
|
||||
#include "mymain.h"
|
||||
#define ICM42688_DELAY_MS(time) (HAL_Delay(time))
|
||||
|
||||
|
||||
enum icm42688_afs
|
||||
{
|
||||
ICM42688_AFS_16G,// default
|
||||
ICM42688_AFS_8G,
|
||||
ICM42688_AFS_4G,
|
||||
ICM42688_AFS_2G,
|
||||
NUM_ICM42688__AFS
|
||||
};
|
||||
|
||||
enum icm42688_aodr
|
||||
{
|
||||
ICM42688_AODR_32000HZ,
|
||||
ICM42688_AODR_16000HZ,
|
||||
ICM42688_AODR_8000HZ,
|
||||
ICM42688_AODR_4000HZ,
|
||||
ICM42688_AODR_2000HZ,
|
||||
ICM42688_AODR_1000HZ,// default
|
||||
ICM42688_AODR_200HZ,
|
||||
ICM42688_AODR_100HZ,
|
||||
ICM42688_AODR_50HZ,
|
||||
ICM42688_AODR_25HZ,
|
||||
ICM42688_AODR_12_5HZ,
|
||||
ICM42688_AODR_6_25HZ,
|
||||
ICM42688_AODR_3_125HZ,
|
||||
ICM42688_AODR_1_5625HZ,
|
||||
ICM42688_AODR_500HZ,
|
||||
NUM_ICM42688_AODR
|
||||
};
|
||||
|
||||
enum icm42688_gfs
|
||||
{
|
||||
ICM42688_GFS_2000DPS,// default
|
||||
ICM42688_GFS_1000DPS,
|
||||
ICM42688_GFS_500DPS,
|
||||
ICM42688_GFS_250DPS,
|
||||
ICM42688_GFS_125DPS,
|
||||
ICM42688_GFS_62_5DPS,
|
||||
ICM42688_GFS_31_25DPS,
|
||||
ICM42688_GFS_15_625DPS,
|
||||
NUM_ICM42688_GFS
|
||||
};
|
||||
enum icm42688_godr
|
||||
{
|
||||
ICM42688_GODR_32000HZ,
|
||||
ICM42688_GODR_16000HZ,
|
||||
ICM42688_GODR_8000HZ,
|
||||
ICM42688_GODR_4000HZ,
|
||||
ICM42688_GODR_2000HZ,
|
||||
ICM42688_GODR_1000HZ,// default
|
||||
ICM42688_GODR_200HZ,
|
||||
ICM42688_GODR_100HZ,
|
||||
ICM42688_GODR_50HZ,
|
||||
ICM42688_GODR_25HZ,
|
||||
ICM42688_GODR_12_5HZ,
|
||||
ICM42688_GODR_X0HZ,
|
||||
ICM42688_GODR_X1HZ,
|
||||
ICM42688_GODR_X2HZ,
|
||||
ICM42688_GODR_500HZ,
|
||||
NUM_ICM42688_GODR
|
||||
};
|
||||
|
||||
|
||||
// ICM42688Bank0<6B>ڲ<EFBFBD><DAB2><EFBFBD>ַ
|
||||
#define ICM42688_DEVICE_CONFIG 0x11
|
||||
#define ICM42688_DRIVE_CONFIG 0x13
|
||||
#define ICM42688_INT_CONFIG 0x14
|
||||
#define ICM42688_FIFO_CONFIG 0x16
|
||||
#define ICM42688_TEMP_DATA1 0x1D
|
||||
#define ICM42688_TEMP_DATA0 0x1E
|
||||
#define ICM42688_ACCEL_DATA_X1 0x1F
|
||||
#define ICM42688_ACCEL_DATA_X0 0x20
|
||||
#define ICM42688_ACCEL_DATA_Y1 0x21
|
||||
#define ICM42688_ACCEL_DATA_Y0 0x22
|
||||
#define ICM42688_ACCEL_DATA_Z1 0x23
|
||||
#define ICM42688_ACCEL_DATA_Z0 0x24
|
||||
#define ICM42688_GYRO_DATA_X1 0x25
|
||||
#define ICM42688_GYRO_DATA_X0 0x26
|
||||
#define ICM42688_GYRO_DATA_Y1 0x27
|
||||
#define ICM42688_GYRO_DATA_Y0 0x28
|
||||
#define ICM42688_GYRO_DATA_Z1 0x29
|
||||
#define ICM42688_GYRO_DATA_Z0 0x2A
|
||||
#define ICM42688_TMST_FSYNCH 0x2B
|
||||
#define ICM42688_TMST_FSYNCL 0x2C
|
||||
#define ICM42688_INT_STATUS 0x2D
|
||||
#define ICM42688_FIFO_COUNTH 0x2E
|
||||
#define ICM42688_FIFO_COUNTL 0x2F
|
||||
#define ICM42688_FIFO_DATA 0x30
|
||||
#define ICM42688_APEX_DATA0 0x31
|
||||
#define ICM42688_APEX_DATA1 0x32
|
||||
#define ICM42688_APEX_DATA2 0x33
|
||||
#define ICM42688_APEX_DATA3 0x34
|
||||
#define ICM42688_APEX_DATA4 0x35
|
||||
#define ICM42688_APEX_DATA5 0x36
|
||||
#define ICM42688_INT_STATUS2 0x37
|
||||
#define ICM42688_INT_STATUS3 0x38
|
||||
#define ICM42688_SIGNAL_PATH_RESET 0x4B
|
||||
#define ICM42688_INTF_CONFIG0 0x4C
|
||||
#define ICM42688_INTF_CONFIG1 0x4D
|
||||
#define ICM42688_PWR_MGMT0 0x4E
|
||||
#define ICM42688_GYRO_CONFIG0 0x4F
|
||||
#define ICM42688_ACCEL_CONFIG0 0x50
|
||||
#define ICM42688_GYRO_CONFIG1 0x51
|
||||
#define ICM42688_GYRO_ACCEL_CONFIG0 0x52
|
||||
#define ICM42688_ACCEL_CONFIG1 0x53
|
||||
#define ICM42688_TMST_CONFIG 0x54
|
||||
#define ICM42688_APEX_CONFIG0 0x56
|
||||
#define ICM42688_SMD_CONFIG 0x57
|
||||
#define ICM42688_FIFO_CONFIG1 0x5F
|
||||
#define ICM42688_FIFO_CONFIG2 0x60
|
||||
#define ICM42688_FIFO_CONFIG3 0x61
|
||||
#define ICM42688_FSYNC_CONFIG 0x62
|
||||
#define ICM42688_INT_CONFIG0 0x63
|
||||
#define ICM42688_INT_CONFIG1 0x64
|
||||
#define ICM42688_INT_SOURCE0 0x65
|
||||
#define ICM42688_INT_SOURCE1 0x66
|
||||
#define ICM42688_INT_SOURCE3 0x68
|
||||
#define ICM42688_INT_SOURCE4 0x69
|
||||
#define ICM42688_FIFO_LOST_PKT0 0x6C
|
||||
#define ICM42688_FIFO_LOST_PKT1 0x6D
|
||||
#define ICM42688_SELF_TEST_CONFIG 0x70
|
||||
#define ICM42688_WHO_AM_I 0x75
|
||||
#define ICM42688_REG_BANK_SEL 0x76 // Banks
|
||||
#define ICM42688_SENSOR_CONFIG0 0x03
|
||||
#define ICM42688_GYRO_CONFIG_STATIC2 0x0B
|
||||
#define ICM42688_GYRO_CONFIG_STATIC3 0x0C
|
||||
#define ICM42688_GYRO_CONFIG_STATIC4 0x0D
|
||||
#define ICM42688_GYRO_CONFIG_STATIC5 0x0E
|
||||
#define ICM42688_GYRO_CONFIG_STATIC6 0x0F
|
||||
#define ICM42688_GYRO_CONFIG_STATIC7 0x10
|
||||
#define ICM42688_GYRO_CONFIG_STATIC8 0x11
|
||||
#define ICM42688_GYRO_CONFIG_STATIC9 0x12
|
||||
#define ICM42688_GYRO_CONFIG_STATIC10 0x13
|
||||
#define ICM42688_XG_ST_DATA 0x5F
|
||||
#define ICM42688_YG_ST_DATA 0x60
|
||||
#define ICM42688_ZG_ST_DATA 0x61
|
||||
#define ICM42688_TMSTVAL0 0x62
|
||||
#define ICM42688_TMSTVAL1 0x63
|
||||
#define ICM42688_TMSTVAL2 0x64
|
||||
#define ICM42688_INTF_CONFIG4 0x7A
|
||||
#define ICM42688_INTF_CONFIG5 0x7B
|
||||
#define ICM42688_INTF_CONFIG6 0x7C
|
||||
|
||||
|
||||
static void Read_Datas_ICM42688(unsigned char reg, unsigned char *dat, unsigned int num);
|
||||
static void Write_Data_ICM42688(unsigned char reg, unsigned char dat);
|
||||
void Init_ICM42688(void);
|
||||
//void sys_gpio_pin_set(GPIO_TypeDef *p_gpiox, uint16_t pinx, uint8_t status);
|
||||
void Set_LowpassFilter_Range_ICM42688(enum icm42688_afs afs, enum icm42688_aodr aodr, enum icm42688_gfs gfs, enum icm42688_godr godr);
|
||||
uint8_t MpuGetData(void);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
//#ifndef _DMX_ICM42688_H_
|
||||
//#define _DMX_ICM42688_H_
|
||||
//#include "stm32h7xx_hal.h"
|
||||
//#include "mymain.h"
|
||||
//#define ICM42688_DELAY_MS(time) (HAL_Delay(time))
|
||||
//
|
||||
//extern float icm42688_acc_x, icm42688_acc_y, icm42688_acc_z ; // <20><><EFBFBD><EFBFBD>ICM42688<38><38><EFBFBD>ٶȼ<D9B6><C8BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
//extern float icm42688_gyro_x, icm42688_gyro_y, icm42688_gyro_z ; // <20><><EFBFBD><EFBFBD>ICM42688<38>Ǽ<EFBFBD><C7BC>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD><EFBFBD>
|
||||
//static void Read_Datas_ICM42688(unsigned char reg, unsigned char *dat, unsigned int num);
|
||||
//static void Write_Data_ICM42688(unsigned char reg, unsigned char dat);
|
||||
//
|
||||
//enum icm42688_afs
|
||||
//{
|
||||
// ICM42688_AFS_16G,// default
|
||||
@ -268,58 +66,7 @@ uint8_t MpuGetData(void);
|
||||
// NUM_ICM42688_GODR
|
||||
//};
|
||||
//
|
||||
//void gpio_init(void);
|
||||
//
|
||||
///**
|
||||
//*
|
||||
//* @brief ICM42688<38><38><EFBFBD><EFBFBD><EFBFBD>dz<EFBFBD>ʼ<EFBFBD><CABC>
|
||||
//* @param
|
||||
//* @return void
|
||||
//* @notes <20>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
//* Example: Init_ICM42688();
|
||||
//*
|
||||
//**/
|
||||
//void Init_ICM42688(void);
|
||||
////void get_IMU(float accx,float accy,float accz,float *pitch,float *roll);
|
||||
//void get_IMU(float *pitch,float *roll);
|
||||
//uint8_t sys_gpio_pin_get(GPIO_TypeDef *p_gpiox, uint16_t pinx);
|
||||
//void sys_gpio_pin_set(GPIO_TypeDef *p_gpiox, uint16_t pinx, uint8_t status);
|
||||
///**
|
||||
//*
|
||||
//* @brief <20><><EFBFBD>ICM42688<38><38><EFBFBD><EFBFBD><EFBFBD>Ǽ<EFBFBD><C7BC>ٶ<EFBFBD>
|
||||
//* @param
|
||||
//* @return void
|
||||
//* @notes <20><>λ:g(m/s^2),<2C>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
//* Example: Get_Acc_ICM42688();
|
||||
//*
|
||||
//**/
|
||||
//void Get_Acc_ICM42688(void);
|
||||
//
|
||||
///**
|
||||
//*
|
||||
//* @brief <20><><EFBFBD>ICM42688<38><38><EFBFBD><EFBFBD><EFBFBD>ǽǼ<C7BD><C7BC>ٶ<EFBFBD>
|
||||
//* @param
|
||||
//* @return void
|
||||
//* @notes <20><>λΪ:<3A><>/s,<2C>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
//* Example: Get_Gyro_ICM42688();
|
||||
//*
|
||||
//**/
|
||||
//void Get_Gyro_ICM42688(void);
|
||||
//
|
||||
///**
|
||||
//*
|
||||
//* @brief <20><><EFBFBD><EFBFBD>ICM42688<38><38><EFBFBD><EFBFBD><EFBFBD>ǵ<EFBFBD>ͨ<EFBFBD>˲<EFBFBD><CBB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//* @param afs // <20><><EFBFBD>ٶȼ<D9B6><C8BC><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>dmx_icm42688.h<>ļ<EFBFBD><C4BC><EFBFBD>ö<EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD>в鿴
|
||||
//* @param aodr // <20><><EFBFBD>ٶȼ<D9B6><C8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>dmx_icm42688.h<>ļ<EFBFBD><C4BC><EFBFBD>ö<EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD>в鿴
|
||||
//* @param gfs // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>dmx_icm42688.h<>ļ<EFBFBD><C4BC><EFBFBD>ö<EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD>в鿴
|
||||
//* @param godr // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>dmx_icm42688.h<>ļ<EFBFBD><C4BC><EFBFBD>ö<EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD>в鿴
|
||||
//* @return void
|
||||
//* @notes ICM42688.c<>ļ<EFBFBD><C4BC>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>,<2C>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ó<EFBFBD><C3B3><EFBFBD>
|
||||
//* Example: Set_LowpassFilter_Range_ICM42688(ICM42688_AFS_16G,ICM42688_AODR_32000HZ,ICM42688_GFS_2000DPS,ICM42688_GODR_32000HZ);
|
||||
//*
|
||||
//**/
|
||||
//void Set_LowpassFilter_Range_ICM42688(enum icm42688_afs afs, enum icm42688_aodr aodr, enum icm42688_gfs gfs, enum icm42688_godr godr);
|
||||
//uint8_t MpuGetData(void);
|
||||
//// ICM42688Bank0<6B>ڲ<EFBFBD><DAB2><EFBFBD>ַ
|
||||
//#define ICM42688_DEVICE_CONFIG 0x11
|
||||
//#define ICM42688_DRIVE_CONFIG 0x13
|
||||
@ -400,4 +147,258 @@ uint8_t MpuGetData(void);
|
||||
//#define ICM42688_INTF_CONFIG5 0x7B
|
||||
//#define ICM42688_INTF_CONFIG6 0x7C
|
||||
//
|
||||
//#endif
|
||||
//
|
||||
//static void Read_Datas_ICM42688(unsigned char reg, unsigned char *dat, unsigned int num);
|
||||
//static void Write_Data_ICM42688(unsigned char reg, unsigned char dat);
|
||||
//void Init_ICM42688(void);
|
||||
////void sys_gpio_pin_set(GPIO_TypeDef *p_gpiox, uint16_t pinx, uint8_t status);
|
||||
//void Set_LowpassFilter_Range_ICM42688(enum icm42688_afs afs, enum icm42688_aodr aodr, enum icm42688_gfs gfs, enum icm42688_godr godr);
|
||||
//uint8_t MpuGetData(void);
|
||||
//
|
||||
//
|
||||
//#endif
|
||||
//
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#ifndef _DMX_ICM42688_H_
|
||||
#define _DMX_ICM42688_H_
|
||||
#include "stm32h7xx_hal.h"
|
||||
#include "mymain.h"
|
||||
#define ICM42688_DELAY_MS(time) (HAL_Delay(time))
|
||||
|
||||
extern float icm42688_acc_x, icm42688_acc_y, icm42688_acc_z ; // <20><><EFBFBD><EFBFBD>ICM42688<38><38><EFBFBD>ٶȼ<D9B6><C8BC><EFBFBD><EFBFBD><EFBFBD>
|
||||
extern float icm42688_gyro_x, icm42688_gyro_y, icm42688_gyro_z ; // <20><><EFBFBD><EFBFBD>ICM42688<38>Ǽ<EFBFBD><C7BC>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD><EFBFBD>
|
||||
static void Read_Datas_ICM42688(unsigned char reg, unsigned char *dat, unsigned int num);
|
||||
static void Write_Data_ICM42688(unsigned char reg, unsigned char dat);
|
||||
enum icm42688_afs
|
||||
{
|
||||
ICM42688_AFS_16G,// default
|
||||
ICM42688_AFS_8G,
|
||||
ICM42688_AFS_4G,
|
||||
ICM42688_AFS_2G,
|
||||
NUM_ICM42688__AFS
|
||||
};
|
||||
|
||||
enum icm42688_aodr
|
||||
{
|
||||
ICM42688_AODR_32000HZ,
|
||||
ICM42688_AODR_16000HZ,
|
||||
ICM42688_AODR_8000HZ,
|
||||
ICM42688_AODR_4000HZ,
|
||||
ICM42688_AODR_2000HZ,
|
||||
ICM42688_AODR_1000HZ,// default
|
||||
ICM42688_AODR_200HZ,
|
||||
ICM42688_AODR_100HZ,
|
||||
ICM42688_AODR_50HZ,
|
||||
ICM42688_AODR_25HZ,
|
||||
ICM42688_AODR_12_5HZ,
|
||||
ICM42688_AODR_6_25HZ,
|
||||
ICM42688_AODR_3_125HZ,
|
||||
ICM42688_AODR_1_5625HZ,
|
||||
ICM42688_AODR_500HZ,
|
||||
NUM_ICM42688_AODR
|
||||
};
|
||||
|
||||
enum icm42688_gfs
|
||||
{
|
||||
ICM42688_GFS_2000DPS,// default
|
||||
ICM42688_GFS_1000DPS,
|
||||
ICM42688_GFS_500DPS,
|
||||
ICM42688_GFS_250DPS,
|
||||
ICM42688_GFS_125DPS,
|
||||
ICM42688_GFS_62_5DPS,
|
||||
ICM42688_GFS_31_25DPS,
|
||||
ICM42688_GFS_15_625DPS,
|
||||
NUM_ICM42688_GFS
|
||||
};
|
||||
enum icm42688_godr
|
||||
{
|
||||
ICM42688_GODR_32000HZ,
|
||||
ICM42688_GODR_16000HZ,
|
||||
ICM42688_GODR_8000HZ,
|
||||
ICM42688_GODR_4000HZ,
|
||||
ICM42688_GODR_2000HZ,
|
||||
ICM42688_GODR_1000HZ,// default
|
||||
ICM42688_GODR_200HZ,
|
||||
ICM42688_GODR_100HZ,
|
||||
ICM42688_GODR_50HZ,
|
||||
ICM42688_GODR_25HZ,
|
||||
ICM42688_GODR_12_5HZ,
|
||||
ICM42688_GODR_X0HZ,
|
||||
ICM42688_GODR_X1HZ,
|
||||
ICM42688_GODR_X2HZ,
|
||||
ICM42688_GODR_500HZ,
|
||||
NUM_ICM42688_GODR
|
||||
};
|
||||
|
||||
void gpio_init(void);
|
||||
|
||||
/**
|
||||
*
|
||||
* @brief ICM42688<38><38><EFBFBD><EFBFBD><EFBFBD>dz<EFBFBD>ʼ<EFBFBD><CABC>
|
||||
* @param
|
||||
* @return void
|
||||
* @notes <20>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Example: Init_ICM42688();
|
||||
*
|
||||
**/
|
||||
void Init_ICM42688(void);
|
||||
//void get_IMU(float accx,float accy,float accz,float *pitch,float *roll);
|
||||
void get_IMU(float *pitch,float *roll);
|
||||
uint8_t sys_gpio_pin_get(GPIO_TypeDef *p_gpiox, uint16_t pinx);
|
||||
void sys_gpio_pin_set(GPIO_TypeDef *p_gpiox, uint16_t pinx, uint8_t status);
|
||||
/**
|
||||
*
|
||||
* @brief <20><><EFBFBD>ICM42688<38><38><EFBFBD><EFBFBD><EFBFBD>Ǽ<EFBFBD><C7BC>ٶ<EFBFBD>
|
||||
* @param
|
||||
* @return void
|
||||
* @notes <20><>λ:g(m/s^2),<2C>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Example: Get_Acc_ICM42688();
|
||||
*
|
||||
**/
|
||||
void Get_Acc_ICM42688(void);
|
||||
|
||||
/**
|
||||
*
|
||||
* @brief <20><><EFBFBD>ICM42688<38><38><EFBFBD><EFBFBD><EFBFBD>ǽǼ<C7BD><C7BC>ٶ<EFBFBD>
|
||||
* @param
|
||||
* @return void
|
||||
* @notes <20><>λΪ:<3A><>/s,<2C>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD>
|
||||
* Example: Get_Gyro_ICM42688();
|
||||
*
|
||||
**/
|
||||
void Get_Gyro_ICM42688(void);
|
||||
|
||||
/**
|
||||
*
|
||||
* @brief <20><><EFBFBD><EFBFBD>ICM42688<38><38><EFBFBD><EFBFBD><EFBFBD>ǵ<EFBFBD>ͨ<EFBFBD>˲<EFBFBD><CBB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
* @param afs // <20><><EFBFBD>ٶȼ<D9B6><C8BC><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>dmx_icm42688.h<>ļ<EFBFBD><C4BC><EFBFBD>ö<EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD>в鿴
|
||||
* @param aodr // <20><><EFBFBD>ٶȼ<D9B6><C8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>dmx_icm42688.h<>ļ<EFBFBD><C4BC><EFBFBD>ö<EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD>в鿴
|
||||
* @param gfs // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>dmx_icm42688.h<>ļ<EFBFBD><C4BC><EFBFBD>ö<EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD>в鿴
|
||||
* @param godr // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>,<2C><><EFBFBD><EFBFBD>dmx_icm42688.h<>ļ<EFBFBD><C4BC><EFBFBD>ö<EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD>в鿴
|
||||
* @return void
|
||||
* @notes ICM42688.c<>ļ<EFBFBD><C4BC>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>,<2C>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ó<EFBFBD><C3B3><EFBFBD>
|
||||
* Example: Set_LowpassFilter_Range_ICM42688(ICM42688_AFS_16G,ICM42688_AODR_32000HZ,ICM42688_GFS_2000DPS,ICM42688_GODR_32000HZ);
|
||||
*
|
||||
**/
|
||||
void Set_LowpassFilter_Range_ICM42688(enum icm42688_afs afs, enum icm42688_aodr aodr, enum icm42688_gfs gfs, enum icm42688_godr godr);
|
||||
uint8_t MpuGetData(void);
|
||||
// ICM42688Bank0<6B>ڲ<EFBFBD><DAB2><EFBFBD>ַ
|
||||
#define ICM42688_DEVICE_CONFIG 0x11
|
||||
#define ICM42688_DRIVE_CONFIG 0x13
|
||||
#define ICM42688_INT_CONFIG 0x14
|
||||
#define ICM42688_FIFO_CONFIG 0x16
|
||||
#define ICM42688_TEMP_DATA1 0x1D
|
||||
#define ICM42688_TEMP_DATA0 0x1E
|
||||
#define ICM42688_ACCEL_DATA_X1 0x1F
|
||||
#define ICM42688_ACCEL_DATA_X0 0x20
|
||||
#define ICM42688_ACCEL_DATA_Y1 0x21
|
||||
#define ICM42688_ACCEL_DATA_Y0 0x22
|
||||
#define ICM42688_ACCEL_DATA_Z1 0x23
|
||||
#define ICM42688_ACCEL_DATA_Z0 0x24
|
||||
#define ICM42688_GYRO_DATA_X1 0x25
|
||||
#define ICM42688_GYRO_DATA_X0 0x26
|
||||
#define ICM42688_GYRO_DATA_Y1 0x27
|
||||
#define ICM42688_GYRO_DATA_Y0 0x28
|
||||
#define ICM42688_GYRO_DATA_Z1 0x29
|
||||
#define ICM42688_GYRO_DATA_Z0 0x2A
|
||||
#define ICM42688_TMST_FSYNCH 0x2B
|
||||
#define ICM42688_TMST_FSYNCL 0x2C
|
||||
#define ICM42688_INT_STATUS 0x2D
|
||||
#define ICM42688_FIFO_COUNTH 0x2E
|
||||
#define ICM42688_FIFO_COUNTL 0x2F
|
||||
#define ICM42688_FIFO_DATA 0x30
|
||||
#define ICM42688_APEX_DATA0 0x31
|
||||
#define ICM42688_APEX_DATA1 0x32
|
||||
#define ICM42688_APEX_DATA2 0x33
|
||||
#define ICM42688_APEX_DATA3 0x34
|
||||
#define ICM42688_APEX_DATA4 0x35
|
||||
#define ICM42688_APEX_DATA5 0x36
|
||||
#define ICM42688_INT_STATUS2 0x37
|
||||
#define ICM42688_INT_STATUS3 0x38
|
||||
#define ICM42688_SIGNAL_PATH_RESET 0x4B
|
||||
#define ICM42688_INTF_CONFIG0 0x4C
|
||||
#define ICM42688_INTF_CONFIG1 0x4D
|
||||
#define ICM42688_PWR_MGMT0 0x4E
|
||||
#define ICM42688_GYRO_CONFIG0 0x4F
|
||||
#define ICM42688_ACCEL_CONFIG0 0x50
|
||||
#define ICM42688_GYRO_CONFIG1 0x51
|
||||
#define ICM42688_GYRO_ACCEL_CONFIG0 0x52
|
||||
#define ICM42688_ACCEL_CONFIG1 0x53
|
||||
#define ICM42688_TMST_CONFIG 0x54
|
||||
#define ICM42688_APEX_CONFIG0 0x56
|
||||
#define ICM42688_SMD_CONFIG 0x57
|
||||
#define ICM42688_FIFO_CONFIG1 0x5F
|
||||
#define ICM42688_FIFO_CONFIG2 0x60
|
||||
#define ICM42688_FIFO_CONFIG3 0x61
|
||||
#define ICM42688_FSYNC_CONFIG 0x62
|
||||
#define ICM42688_INT_CONFIG0 0x63
|
||||
#define ICM42688_INT_CONFIG1 0x64
|
||||
#define ICM42688_INT_SOURCE0 0x65
|
||||
#define ICM42688_INT_SOURCE1 0x66
|
||||
#define ICM42688_INT_SOURCE3 0x68
|
||||
#define ICM42688_INT_SOURCE4 0x69
|
||||
#define ICM42688_FIFO_LOST_PKT0 0x6C
|
||||
#define ICM42688_FIFO_LOST_PKT1 0x6D
|
||||
#define ICM42688_SELF_TEST_CONFIG 0x70
|
||||
#define ICM42688_WHO_AM_I 0x75
|
||||
#define ICM42688_REG_BANK_SEL 0x76 // Banks
|
||||
#define ICM42688_SENSOR_CONFIG0 0x03
|
||||
#define ICM42688_GYRO_CONFIG_STATIC2 0x0B
|
||||
#define ICM42688_GYRO_CONFIG_STATIC3 0x0C
|
||||
#define ICM42688_GYRO_CONFIG_STATIC4 0x0D
|
||||
#define ICM42688_GYRO_CONFIG_STATIC5 0x0E
|
||||
#define ICM42688_GYRO_CONFIG_STATIC6 0x0F
|
||||
#define ICM42688_GYRO_CONFIG_STATIC7 0x10
|
||||
#define ICM42688_GYRO_CONFIG_STATIC8 0x11
|
||||
#define ICM42688_GYRO_CONFIG_STATIC9 0x12
|
||||
#define ICM42688_GYRO_CONFIG_STATIC10 0x13
|
||||
#define ICM42688_XG_ST_DATA 0x5F
|
||||
#define ICM42688_YG_ST_DATA 0x60
|
||||
#define ICM42688_ZG_ST_DATA 0x61
|
||||
#define ICM42688_TMSTVAL0 0x62
|
||||
#define ICM42688_TMSTVAL1 0x63
|
||||
#define ICM42688_TMSTVAL2 0x64
|
||||
#define ICM42688_INTF_CONFIG4 0x7A
|
||||
#define ICM42688_INTF_CONFIG5 0x7B
|
||||
#define ICM42688_INTF_CONFIG6 0x7C
|
||||
|
||||
#endif
|
||||
|
||||
|
91
foc_n.ioc
91
foc_n.ioc
@ -1,48 +1,58 @@
|
||||
#MicroXplorer Configuration settings - do not modify
|
||||
ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_8
|
||||
ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSignedSaturation-0\#ChannelRegularConversion,NbrOfConversionFlag,master
|
||||
ADC1.NbrOfConversionFlag=1
|
||||
ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
|
||||
ADC1.OffsetSignedSaturation-0\#ChannelRegularConversion=DISABLE
|
||||
ADC1.Rank-0\#ChannelRegularConversion=1
|
||||
ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_1CYCLE_5
|
||||
ADC1.master=1
|
||||
File.Version=6
|
||||
GPIO.groupedBy=
|
||||
KeepUserPlacement=false
|
||||
Mcu.CPN=STM32H750VBT6
|
||||
Mcu.Family=STM32H7
|
||||
Mcu.IP0=CORTEX_M7
|
||||
Mcu.IP1=NVIC
|
||||
Mcu.IP10=USART1
|
||||
Mcu.IP2=RCC
|
||||
Mcu.IP3=SPI1
|
||||
Mcu.IP4=SPI2
|
||||
Mcu.IP5=SYS
|
||||
Mcu.IP6=TIM2
|
||||
Mcu.IP7=TIM3
|
||||
Mcu.IP8=TIM4
|
||||
Mcu.IP9=TIM5
|
||||
Mcu.IPNb=11
|
||||
Mcu.IP0=ADC1
|
||||
Mcu.IP1=CORTEX_M7
|
||||
Mcu.IP10=TIM5
|
||||
Mcu.IP11=USART1
|
||||
Mcu.IP2=NVIC
|
||||
Mcu.IP3=RCC
|
||||
Mcu.IP4=SPI1
|
||||
Mcu.IP5=SPI2
|
||||
Mcu.IP6=SYS
|
||||
Mcu.IP7=TIM2
|
||||
Mcu.IP8=TIM3
|
||||
Mcu.IP9=TIM4
|
||||
Mcu.IPNb=12
|
||||
Mcu.Name=STM32H750VBTx
|
||||
Mcu.Package=LQFP100
|
||||
Mcu.Pin0=PH0-OSC_IN (PH0)
|
||||
Mcu.Pin1=PH1-OSC_OUT (PH1)
|
||||
Mcu.Pin10=PB15
|
||||
Mcu.Pin11=PD12
|
||||
Mcu.Pin12=PD13
|
||||
Mcu.Pin13=PD14
|
||||
Mcu.Pin14=PC6
|
||||
Mcu.Pin15=PC7
|
||||
Mcu.Pin16=PC8
|
||||
Mcu.Pin17=PA9
|
||||
Mcu.Pin18=PA10
|
||||
Mcu.Pin19=VP_SYS_VS_Systick
|
||||
Mcu.Pin10=PB14
|
||||
Mcu.Pin11=PB15
|
||||
Mcu.Pin12=PD12
|
||||
Mcu.Pin13=PD13
|
||||
Mcu.Pin14=PD14
|
||||
Mcu.Pin15=PC6
|
||||
Mcu.Pin16=PC7
|
||||
Mcu.Pin17=PC8
|
||||
Mcu.Pin18=PA9
|
||||
Mcu.Pin19=PA10
|
||||
Mcu.Pin2=PA0
|
||||
Mcu.Pin20=VP_TIM2_VS_ClockSourceINT
|
||||
Mcu.Pin21=VP_TIM3_VS_ClockSourceINT
|
||||
Mcu.Pin22=VP_TIM4_VS_ClockSourceINT
|
||||
Mcu.Pin23=VP_TIM5_VS_ClockSourceINT
|
||||
Mcu.Pin20=VP_SYS_VS_Systick
|
||||
Mcu.Pin21=VP_TIM2_VS_ClockSourceINT
|
||||
Mcu.Pin22=VP_TIM3_VS_ClockSourceINT
|
||||
Mcu.Pin23=VP_TIM4_VS_ClockSourceINT
|
||||
Mcu.Pin24=VP_TIM5_VS_ClockSourceINT
|
||||
Mcu.Pin3=PA1
|
||||
Mcu.Pin4=PA2
|
||||
Mcu.Pin5=PA5
|
||||
Mcu.Pin6=PA6
|
||||
Mcu.Pin7=PA7
|
||||
Mcu.Pin8=PB13
|
||||
Mcu.Pin9=PB14
|
||||
Mcu.PinsNb=24
|
||||
Mcu.Pin8=PC5
|
||||
Mcu.Pin9=PB13
|
||||
Mcu.PinsNb=25
|
||||
Mcu.ThirdPartyNb=0
|
||||
Mcu.UserConstants=
|
||||
Mcu.UserName=STM32H750VBTx
|
||||
@ -90,6 +100,8 @@ PB14.Signal=SPI2_MISO
|
||||
PB15.Locked=true
|
||||
PB15.Mode=Full_Duplex_Master
|
||||
PB15.Signal=SPI2_MOSI
|
||||
PC5.Locked=true
|
||||
PC5.Signal=ADCx_INP8
|
||||
PC6.Locked=true
|
||||
PC6.Signal=S_TIM3_CH1
|
||||
PC7.Locked=true
|
||||
@ -134,8 +146,8 @@ ProjectManager.StackSize=0x400
|
||||
ProjectManager.TargetToolchain=STM32CubeIDE
|
||||
ProjectManager.ToolChainLocation=
|
||||
ProjectManager.UnderRoot=true
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_TIM2_Init-TIM2-false-HAL-true,4-MX_TIM3_Init-TIM3-false-HAL-true,5-MX_TIM5_Init-TIM5-false-HAL-true,6-MX_USART1_UART_Init-USART1-false-HAL-true,7-MX_SPI1_Init-SPI1-false-HAL-true,8-MX_SPI2_Init-SPI2-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
||||
RCC.ADCFreq_Value=50390625
|
||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_TIM2_Init-TIM2-false-HAL-true,4-MX_TIM3_Init-TIM3-false-HAL-true,5-MX_TIM5_Init-TIM5-false-HAL-true,6-MX_USART1_UART_Init-USART1-false-HAL-true,7-MX_SPI1_Init-SPI1-false-HAL-true,8-MX_SPI2_Init-SPI2-false-HAL-true,9-MX_TIM4_Init-TIM4-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
||||
RCC.ADCFreq_Value=24000000
|
||||
RCC.AHB12Freq_Value=240000000
|
||||
RCC.AHB4Freq_Value=240000000
|
||||
RCC.APB1Freq_Value=120000000
|
||||
@ -155,16 +167,19 @@ RCC.D3PPRE=RCC_APB4_DIV2
|
||||
RCC.DFSDMACLkFreq_Value=160000000
|
||||
RCC.DFSDMFreq_Value=120000000
|
||||
RCC.DIVM1=5
|
||||
RCC.DIVM2=25
|
||||
RCC.DIVN1=192
|
||||
RCC.DIVN2=240
|
||||
RCC.DIVP1Freq_Value=480000000
|
||||
RCC.DIVP2Freq_Value=50390625
|
||||
RCC.DIVP2=10
|
||||
RCC.DIVP2Freq_Value=24000000
|
||||
RCC.DIVP3Freq_Value=50390625
|
||||
RCC.DIVQ1=6
|
||||
RCC.DIVQ1Freq_Value=160000000
|
||||
RCC.DIVQ2Freq_Value=50390625
|
||||
RCC.DIVQ2Freq_Value=120000000
|
||||
RCC.DIVQ3Freq_Value=50390625
|
||||
RCC.DIVR1Freq_Value=480000000
|
||||
RCC.DIVR2Freq_Value=50390625
|
||||
RCC.DIVR2Freq_Value=120000000
|
||||
RCC.DIVR3Freq_Value=50390625
|
||||
RCC.FDCANFreq_Value=160000000
|
||||
RCC.FMCFreq_Value=240000000
|
||||
@ -175,7 +190,7 @@ RCC.HPRE=RCC_HCLK_DIV2
|
||||
RCC.HRTIMFreq_Value=240000000
|
||||
RCC.I2C123Freq_Value=120000000
|
||||
RCC.I2C4Freq_Value=120000000
|
||||
RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVN1,DIVP1Freq_Value,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLSourceVirtual,ProductRev,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
|
||||
RCC.IPParameters=ADCFreq_Value,AHB12Freq_Value,AHB4Freq_Value,APB1Freq_Value,APB2Freq_Value,APB3Freq_Value,APB4Freq_Value,AXIClockFreq_Value,CECFreq_Value,CKPERFreq_Value,CortexFreq_Value,CpuClockFreq_Value,D1CPREFreq_Value,D1PPRE,D2PPRE1,D2PPRE2,D3PPRE,DFSDMACLkFreq_Value,DFSDMFreq_Value,DIVM1,DIVM2,DIVN1,DIVN2,DIVP1Freq_Value,DIVP2,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3Freq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLK3ClockFreq_Value,HCLKFreq_Value,HPRE,HRTIMFreq_Value,I2C123Freq_Value,I2C4Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM345Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,PLLSourceVirtual,ProductRev,QSPIFreq_Value,RNGFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI23Freq_Value,SAI4AFreq_Value,SAI4BFreq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI123Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SWPMI1Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,Tim1OutputFreq_Value,Tim2OutputFreq_Value,TraceFreq_Value,USART16Freq_Value,USART234578Freq_Value,USBFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value
|
||||
RCC.LPTIM1Freq_Value=120000000
|
||||
RCC.LPTIM2Freq_Value=120000000
|
||||
RCC.LPTIM345Freq_Value=120000000
|
||||
@ -207,11 +222,13 @@ RCC.USART16Freq_Value=120000000
|
||||
RCC.USART234578Freq_Value=120000000
|
||||
RCC.USBFreq_Value=160000000
|
||||
RCC.VCO1OutputFreq_Value=960000000
|
||||
RCC.VCO2OutputFreq_Value=100781250
|
||||
RCC.VCO2OutputFreq_Value=240000000
|
||||
RCC.VCO3OutputFreq_Value=100781250
|
||||
RCC.VCOInput1Freq_Value=5000000
|
||||
RCC.VCOInput2Freq_Value=781250
|
||||
RCC.VCOInput2Freq_Value=1000000
|
||||
RCC.VCOInput3Freq_Value=781250
|
||||
SH.ADCx_INP8.0=ADC1_INP8,IN8-Single-Ended
|
||||
SH.ADCx_INP8.ConfNb=1
|
||||
SH.S_TIM2_CH1_ETR.0=TIM2_CH1,PWM Generation1 CH1
|
||||
SH.S_TIM2_CH1_ETR.ConfNb=1
|
||||
SH.S_TIM2_CH2.0=TIM2_CH2,PWM Generation2 CH2
|
||||
|
Reference in New Issue
Block a user