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NEW: release DJI Payload-SDK version 3.13.0

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Signed-off-by: martin <dev@dji.com>
This commit is contained in:
martin
2025-08-28 17:41:24 +08:00
parent d25a173770
commit c32e00bd9f
70 changed files with 20574 additions and 440 deletions
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22
README.md
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@ -1,8 +1,8 @@
# DJI Payload SDK (PSDK)
![](https://img.shields.io/badge/version-V3.12.1-cyan.svg)
![](https://img.shields.io/badge/platform-linux_|_rtos-purple.svg)
![](https://img.shields.io/badge/license-MIT-yellow.svg)
![](https://img.shields.io/badge/version-V3.13.0-blue.svg)
![](https://img.shields.io/badge/platform-linux_|_rtos-pink.svg)
![](https://img.shields.io/badge/license-MIT-green.svg)
## What is the DJI Payload SDK?
@ -23,13 +23,19 @@ to get the latest version information.
## Latest Release
The latest release version of PSDK is 3.12.1. This version of Payload SDK mainly add some new features support and fixed some
The latest release version of PSDK is 3.13.0. This version of Payload SDK mainly add some new features support and fixed some
bugs. Please refer to the release notes for detailed changes list.
* Fixed an issue where the Matrice 400 could not use precise positioning.
* Fixed an issue where the Matrice 400 gimbal payload experienced a timeout when relinquishing control while using absolute angles.
* Fixed an issue where the Matrice 400 could not enable the FTS PWM trigger via the `DjiFlightController_SelectFtsPwmTrigger` API.
* Fixed an issue where the Matrice 400 and Manifold 3 models were unable to perform PSDK-to-MSDK small-data transmission.
### Manifold 3 Support
- **Supports M4D series drone dock versions (DJI Pilot app temporarily unsupported)**
- **Enables PSDK advanced features for M4D**
- **Enables MOP function for M400**
- **Supports installation/uninstallation of Manifold 3 apps via DJI FlightHub**
- **Enables rendering of Manifold 3 AI app recognition results in DJI FlightHub**
### Fixes and Optimizations
- **Fixed M300 PSDK low-speed data transmission failure from payload port to onboard port**
- **Fixed M350 drone's inability to acquire real-time streams from Zenmuse P1 and Zenmuse L1**
## License

36
psdk_lib/include/dji_camera_manager.h
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@ -682,6 +682,7 @@ typedef struct {
E_DjiCameraManagerStreamSource streamSource[16];
E_DjiCameraManagerStreamStorage streamStorage[16];
E_DjiCameraManagerNightSceneMode nightSceneMode[16];
E_DjiCameraManagerMeteringMode meteringMode[16];
};
uint32_t minValue;
uint32_t maxValue;
@ -850,7 +851,7 @@ T_DjiReturnCode DjiCameraManager_SetPhotoBurstCount(E_DjiMountPosition position,
/**
* @brief Set the parameters for INTERVAL shooting mode.
* @note In this mode, the camera captures a photo, waits a specified interval
* of time, then captures another photo, continuing until the set number of
* of time, then captures another photo, continuing until the set number of
* photos is reached. Supported by thermal imaging cameras, too.
* @param position: camera mounted position
* @param intervalSetting: refer to T_DjiCameraPhotoTimeIntervalSettings.
@ -991,7 +992,7 @@ T_DjiReturnCode DjiCameraManager_GetTapZoomEnabled(E_DjiMountPosition position,
/**
* @brief Set camera's tap-zoom multiplier of the selected camera mounted position.
* @note The final zoom scale during a tap-zoom action will be:
* @note The final zoom scale during a tap-zoom action will be:
* Current Zoom Scale x Multiplier.
* @param position: camera mounted position
* @param tapZoomMultiplier: The multiplier range is [1,5]. A multiplier of 1 will not change the zoom.
@ -1603,6 +1604,15 @@ T_DjiReturnCode DjiCameraManager_SetInfraredCameraGainMode(E_DjiMountPosition po
T_DjiReturnCode DjiCameraManager_GetInfraredCameraGainModeTemperatureRange(E_DjiMountPosition position,
T_DjiCameraManagerIrTempMeterRange *tempRange);
/**
* @brief Get metergin mode range of infrared camera.
* @param position: camera mounted position.
* @param tempRange: returned value of metering range.
* @return Execution result.
*/
T_DjiReturnCode DjiCameraManager_GetMeteringModeRange(E_DjiMountPosition position,
T_DjiCameraManagerRangeList *rangeList);
/**
* @brief Set camera metering mode.
* @param position: camera mounted position
@ -1640,6 +1650,16 @@ T_DjiReturnCode DjiCameraManager_GetMeteringPointRegionRange(E_DjiMountPosition
T_DjiReturnCode DjiCameraManager_SetMeteringPoint(E_DjiMountPosition position,
uint8_t x, uint8_t y);
/**
* @brief Set metering point normalize.
* @param position: camera mounted position
* @param x: Normalized horizontal coordinate, value ranges in 0 ~ 1.
* @param y: Normalized Vertical coordinate, value ranges in 0 ~ 1.
* @return Execution result.
*/
T_DjiReturnCode DjiCameraManager_SetMeteringPointNormalized(E_DjiMountPosition position,
dji_f32_t x, dji_f32_t y);
/**
* @brief Get camera metering mode.
* @param position: camera mounted position
@ -1651,6 +1671,18 @@ T_DjiReturnCode DjiCameraManager_GetMeteringPoint(E_DjiMountPosition position,
uint8_t *x, uint8_t *y);
/**
* @brief Get camera metering mode.
* @param position: camera mounted position
* @param x: a pointer to a float (dji_f32_t) that will receive the normalized x-coordinate of the
* metering point.
* @param y: a pointer to a float (dji_f32_t) that will receive the normalized y-coordinate of the
* metering point.
* @return Execution result.
*/
T_DjiReturnCode DjiCameraManager_GetMeteringPointNormalized(E_DjiMountPosition position,
dji_f32_t *x, dji_f32_t *y);
/**
* @brief Start to record point cloud of the selected camera mounted position.
* @param position: camera mounted position

2
psdk_lib/include/dji_flight_controller.h
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@ -292,7 +292,7 @@ typedef struct {
} T_DjiFtsPwmTriggerStatus;
typedef struct {
T_DjiFtsPwmTriggerStatus ESC[4]; /* trigger tatus of the two ESCs, M4/M4D only ESC[0] and ESC[1], M400 for alls */
T_DjiFtsPwmTriggerStatus ESC[4]; /* trigger status of the two ESCs */
} T_DjiFtsPwmEscTriggerStatus;
/* Exported functions --------------------------------------------------------*/

2
psdk_lib/include/dji_typedef.h
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@ -129,6 +129,7 @@ typedef enum {
DJI_AIRCRAFT_TYPE_M3E = 77, /*!< Aircraft type is Mavic 3E. */
DJI_AIRCRAFT_TYPE_FC30 = 78, /* !<Aircraft type is FlyCart 30> */
DJI_AIRCRAFT_TYPE_M3T = 79, /*!< Aircraft type is Mavic 3T. */
DJI_AIRCRAFT_TYPE_M3TA = 80, /*!< Aircraft type is Mavic 3TA. */
DJI_AIRCRAFT_TYPE_M350_RTK = 89, /*!< Aircraft type is Matrice 350 RTK. */
DJI_AIRCRAFT_TYPE_M3D = 91, /*!< Aircraft type is Matrice 3D. */
DJI_AIRCRAFT_TYPE_M3TD = 93, /*!< Aircraft type is Matrice 3TD. */
@ -158,6 +159,7 @@ typedef enum {
DJI_CAMERA_TYPE_M30T = 53, /*!< Camera type is M30T. */
DJI_CAMERA_TYPE_M3E = 66, /*!< Camera type is M3E. */
DJI_CAMERA_TYPE_M3T = 67, /*!< Camera type is M3T. */
DJI_CAMERA_TYPE_M3TA = 68, /*!< Camera type is M3T. */
DJI_CAMERA_TYPE_M3D = 80, /*!< Camera type is Matrice 3D. */
DJI_CAMERA_TYPE_M3TD = 81, /*!< Camera type is Matrice 3TD. */
DJI_CAMERA_TYPE_H30 = 82, /*!< Camera type is H30. */

6
psdk_lib/include/dji_version.h
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@ -34,10 +34,10 @@ extern "C" {
/* Exported constants --------------------------------------------------------*/
#define DJI_VERSION_MAJOR 3 /*!< DJI SDK major version num, when have incompatible API changes. Range from 0 to 99. */
#define DJI_VERSION_MINOR 12 /*!< DJI SDK minor version num, when add functionality in a backwards compatible manner changes. Range from 0 to 99. */
#define DJI_VERSION_MODIFY 1 /*!< DJI SDK modify version num, when have backwards compatible bug fixes changes. Range from 0 to 99. */
#define DJI_VERSION_MINOR 13 /*!< DJI SDK minor version num, when add functionality in a backwards compatible manner changes. Range from 0 to 99. */
#define DJI_VERSION_MODIFY 0 /*!< DJI SDK modify version num, when have backwards compatible bug fixes changes. Range from 0 to 99. */
#define DJI_VERSION_BETA 0 /*!< DJI SDK version beta info, release version will be 0, when beta version release changes. Range from 0 to 255. */
#define DJI_VERSION_BUILD 2262 /*!< DJI SDK version build info, when jenkins trigger build changes. Range from 0 to 65535. */
#define DJI_VERSION_BUILD 2270 /*!< DJI SDK version build info, when jenkins trigger build changes. Range from 0 to 65535. */
/* Exported types ------------------------------------------------------------*/

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psdk_lib/lib/aarch64-linux-gnu-gcc/libpayloadsdk.a
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psdk_lib/lib/arm-linux-gnueabi-gcc/libpayloadsdk.a
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psdk_lib/lib/arm-linux-gnueabihf-gcc/libpayloadsdk.a
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psdk_lib/lib/armcc_cortex-m33/libpayload.lib Normal file
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psdk_lib/lib/armcc_cortex-m4/libpayload.lib
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psdk_lib/lib/x86_64-linux-gnu-gcc/libpayloadsdk.a
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27
samples/sample_c++/module_sample/liveview/dji_liveview_object_detection.cpp
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@ -23,10 +23,13 @@
/* Includes ------------------------------------------------------------------*/
#include <iostream>
#include <dji_logger.h>
#include <sys/stat.h>
#include <sys/types.h>
#include "test_liveview_entry.hpp"
#include "dji_liveview_object_detection.hpp"
#include "dji_payload_camera.h"
#include "dji_high_speed_data_channel.h"
#include "dji_aircraft_info.h"
#include <string>
#include <vector>
#include "dji_typedef.h"
@ -79,6 +82,7 @@ static const char* s_invalidLables[] = {
static std::ofstream outFileH264;
static std::ofstream outFileYUV;
static std::string getCurrentTimestamp();
static T_DjiAircraftInfoBaseInfo aircraftInfoBaseInfo;
static void outH264Tofile(const uint8_t *buf, int32_t len);
static void outYUVTofile(const uint8_t *buf, int32_t len);
static void DjiLiveview_RcvImageCallback(E_DjiLiveViewCameraPosition position, const uint8_t *buf, uint32_t len ,T_DjiLiveviewImageInfo imageInfo);
@ -377,7 +381,9 @@ void DjiUser_RunCameraAiDetectionSample()
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
if (pos < 1 || pos > 3 || (mediaSource != 0 &&mediaSource != 1 && mediaSource != 7))
USER_LOG_INFO("Input cammera sourece(1:1080p, 3:M4 serials 4K, 7:H30 serials 4K): ");
std::cin >> mediaSource;
if (pos < 1 || pos > 3 || mediaSource > 7)
{
USER_LOG_ERROR("invalid param");
return;
@ -385,7 +391,9 @@ void DjiUser_RunCameraAiDetectionSample()
std::string timestamp = getCurrentTimestamp();
std::string h264FileName = "output_" + timestamp + ".h264";
// avoid miss dir error
mkdir ("data", 0755);
std::string h264FileName = "data/output_" + timestamp + ".h264";
outFileH264.open(h264FileName, std::ios::out | std::ios::binary | std::ios::app);
if (!outFileH264) {
std::cerr << "cant open " << h264FileName << std::endl;
@ -422,6 +430,12 @@ void DjiUser_RunCameraAiDetectionSample()
goto init_failed;
}
returnCode = DjiAircraftInfo_GetBaseInfo(&aircraftInfoBaseInfo);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("get aircraft base info error");
return;
}
#ifdef OPEN_CV_INSTALLED
returnCode = DjiLiveview_RegUserAiTargetLableList(YOLO_LABLES_NUM, s_classLables);
#else
@ -597,10 +611,13 @@ static void DjiLiveview_EncoderUseCallback(const uint8_t *buf, uint32_t len)
{
T_DjiReturnCode returnCode;
outH264Tofile(buf, len);
returnCode = DjiPayloadCamera_SendVideoStream(buf, len);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS)
if (aircraftInfoBaseInfo.aircraftSeries != DJI_AIRCRAFT_SERIES_M4D)
{
USER_LOG_ERROR("failed to send video to pilot, ret: 0x%08llX", returnCode);
returnCode = DjiPayloadCamera_SendVideoStream(buf, len);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS)
{
USER_LOG_ERROR("failed to send video to pilot, ret: 0x%08llX", returnCode);
}
}
}

0
samples/sample_c++/module_sample/liveview/test_liveview_entry.cpp Executable file → Normal file
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8
samples/sample_c++/platform/linux/manifold3/application/main.cpp
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@ -46,6 +46,7 @@
#include "camera_manager/test_camera_manager_entry.h"
#include <hms_manager/hms_manager_entry.h>
#include <liveview/dji_liveview_object_detection.hpp>
#include "liveview/test_liveview.h"
#include <signal.h>
/* Private constants ---------------------------------------------------------*/
@ -63,6 +64,7 @@ int main(int argc, char **argv)
char inputChar;
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
T_DjiReturnCode returnCode;
E_DjiMountPosition mountPosition = DJI_MOUNT_POSITION_PAYLOAD_PORT_NO1;
start:
std::cout
@ -80,7 +82,8 @@ start:
<< "| [i] Run manifold3 AI sample - request h.264 bitstream data, codec it and display it on pilot |\n"
<< "| [j] Run Hms Enhance sample - shake motor and play sound on pilot |\n"
<< "| [l] Run widget states manager sample, control widget states on other payload |\n"
<< "| [m] Run Open Ar sample - draw ar gragh\n"
<< "| [m] Run Open Ar sample - draw ar gragh |\n"
<< "| [n] Run H.264 liveview sample - save H.264 files in the current directory |\n"
<< std::endl;
std::cin >> inputChar;
@ -129,6 +132,9 @@ start:
case 'm':
DjiUser_RunOpenArSample();
break;
case 'n':
DjiTest_LiveviewRunSample(mountPosition);
break;
case 'q':
break;
default:

118
samples/sample_c/module_sample/camera_manager/test_camera_manager.c
View File

@ -70,6 +70,7 @@ static const T_DjiTestCameraTypeStr s_cameraTypeStrList[] = {
{DJI_CAMERA_TYPE_M30T, "M30T Camera"},
{DJI_CAMERA_TYPE_M3E, "M3E Camera"},
{DJI_CAMERA_TYPE_M3T, "M3T Camera"},
{DJI_CAMERA_TYPE_M3TA, "M3TA Camera"},
{DJI_CAMERA_TYPE_M3D, "M3D Camera"},
{DJI_CAMERA_TYPE_M3TD, "M3TD Camera"},
{DJI_CAMERA_TYPE_H30, "H30 Camera"},
@ -80,6 +81,7 @@ static const T_DjiTestCameraTypeStr s_cameraTypeStrList[] = {
{DJI_CAMERA_TYPE_M4D, "M4D Camera"},
};
#ifndef SYSTEM_ARCH_RTOS
static FILE *s_downloadMediaFile = NULL;
static T_DjiCameraManagerFileList s_meidaFileList;
static uint32_t downloadStartMs = 0;
@ -88,18 +90,23 @@ static char downloadFileName[TEST_CAMERA_MANAGER_MEDIA_FILE_NAME_MAX_SIZE] = {0}
static uint32_t s_nextDownloadFileIndex = 0;
static T_DjiMopChannelHandle s_mopChannelHandle;
static char s_pointCloudFilePath[TEST_CAMEAR_POINT_CLOUD_FILE_PATH_STR_MAX_SIZE];
#endif
/* Private functions declaration ---------------------------------------------*/
static uint8_t DjiTest_CameraManagerGetCameraTypeIndex(E_DjiCameraType cameraType);
#ifdef SYSTEM_ARCH_LINUX
static T_DjiReturnCode DjiTest_CameraManagerMediaDownloadAndDeleteMediaFile(E_DjiMountPosition position);
static T_DjiReturnCode DjiTest_CameraManagerMediaDownloadFileListBySlices(E_DjiMountPosition position);
static T_DjiReturnCode DjiTest_CameraManagerDownloadFileDataCallback(T_DjiDownloadFilePacketInfo packetInfo,
const uint8_t *data, uint16_t len);
#endif
static T_DjiReturnCode DjiTest_CameraManagerGetAreaThermometryData(E_DjiMountPosition position);
static T_DjiReturnCode DjiTest_CameraManagerGetPointThermometryData(E_DjiMountPosition position);
static T_DjiReturnCode DjiTest_CameraManagerGetLidarRangingInfo(E_DjiMountPosition position);
#ifndef SYSTEM_ARCH_RTOS
T_DjiReturnCode DjiTest_CameraManagerSubscribePointCloud(E_DjiMountPosition position);
#endif
/* Exported functions definition ---------------------------------------------*/
/*! @brief Sample to set EV for camera, using async api
@ -854,6 +861,7 @@ T_DjiReturnCode DjiTest_CameraManagerRunSample(E_DjiMountPosition mountPosition,
|| DJI_CAMERA_TYPE_H20N == cameraType
|| DJI_CAMERA_TYPE_M30 == cameraType || DJI_CAMERA_TYPE_M30T == cameraType
|| DJI_CAMERA_TYPE_M3E == cameraType || DJI_CAMERA_TYPE_M3T == cameraType
|| DJI_CAMERA_TYPE_M3TA == cameraType
|| DJI_CAMERA_TYPE_M3D == cameraType || DJI_CAMERA_TYPE_M3TD == cameraType
|| DJI_CAMERA_TYPE_M4T == cameraType || DJI_CAMERA_TYPE_M4TD == cameraType
|| DJI_CAMERA_TYPE_H30 == cameraType || DJI_CAMERA_TYPE_H30T == cameraType
@ -900,6 +908,7 @@ T_DjiReturnCode DjiTest_CameraManagerRunSample(E_DjiMountPosition mountPosition,
|| DJI_CAMERA_TYPE_H20N == cameraType
|| DJI_CAMERA_TYPE_M30 == cameraType || DJI_CAMERA_TYPE_M30T == cameraType
|| DJI_CAMERA_TYPE_M3E == cameraType || DJI_CAMERA_TYPE_M3T == cameraType
|| DJI_CAMERA_TYPE_M3TA == cameraType
|| DJI_CAMERA_TYPE_M3D == cameraType || DJI_CAMERA_TYPE_M3TD == cameraType
|| DJI_CAMERA_TYPE_M4T == cameraType || DJI_CAMERA_TYPE_M4TD == cameraType
|| DJI_CAMERA_TYPE_M4E == cameraType || DJI_CAMERA_TYPE_H30 == cameraType
@ -1094,9 +1103,7 @@ T_DjiReturnCode DjiTest_CameraManagerRunSample(E_DjiMountPosition mountPosition,
case E_DJI_TEST_CAMERA_MANAGER_SAMPLE_SELECT_SHOOT_INTERVAL_PHOTO: {
USER_LOG_INFO("--> Function k: Shoot Interval photo with 3s intervals in 15s");
DjiTest_WidgetLogAppend("--> Function k: Shoot Interval photo with 3s intervals in 15s");
T_DjiCameraPhotoTimeIntervalSettings intervalData;
intervalData.captureCount = 255;
intervalData.timeIntervalSeconds = 3;
T_DjiCameraPhotoTimeIntervalSettings intervalData = {.captureCount = 255, .timeIntervalSeconds = 3, .timeIntervalMilliseconds = 0};
returnCode = DjiTest_CameraManagerStartShootIntervalPhoto(mountPosition, intervalData);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
@ -1203,6 +1210,7 @@ T_DjiReturnCode DjiTest_CameraManagerRunSample(E_DjiMountPosition mountPosition,
|| DJI_CAMERA_TYPE_P1 == cameraType
|| DJI_CAMERA_TYPE_L1 == cameraType || DJI_CAMERA_TYPE_L2 == cameraType
|| DJI_CAMERA_TYPE_M3E == cameraType || DJI_CAMERA_TYPE_M3T == cameraType
|| DJI_CAMERA_TYPE_M3TA == cameraType
|| DJI_CAMERA_TYPE_M3D == cameraType || DJI_CAMERA_TYPE_M3TD == cameraType
|| DJI_CAMERA_TYPE_M4T == cameraType || DJI_CAMERA_TYPE_M4E == cameraType
|| DJI_CAMERA_TYPE_M4TD == cameraType || DJI_CAMERA_TYPE_M4D == cameraType
@ -1551,6 +1559,7 @@ T_DjiReturnCode DjiTest_CameraManagerRunSample(E_DjiMountPosition mountPosition,
cameraType == DJI_CAMERA_TYPE_H20N || cameraType == DJI_CAMERA_TYPE_M30 ||
cameraType == DJI_CAMERA_TYPE_M30T || cameraType == DJI_CAMERA_TYPE_M3E ||
cameraType == DJI_CAMERA_TYPE_M3T || cameraType == DJI_CAMERA_TYPE_H30 ||
cameraType == DJI_CAMERA_TYPE_M3TA ||
cameraType == DJI_CAMERA_TYPE_H30T) {
returnCode = DjiCameraManager_SetStreamSource(mountPosition, DJI_CAMERA_MANAGER_SOURCE_ZOOM_CAM);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
@ -1612,7 +1621,9 @@ T_DjiReturnCode DjiTest_CameraManagerRunSample(E_DjiMountPosition mountPosition,
cameraType == DJI_CAMERA_TYPE_H20T || cameraType == DJI_CAMERA_TYPE_M30 ||
cameraType == DJI_CAMERA_TYPE_M30T || cameraType == DJI_CAMERA_TYPE_M3E ||
cameraType == DJI_CAMERA_TYPE_M3T || cameraType == DJI_CAMERA_TYPE_H30 ||
cameraType == DJI_CAMERA_TYPE_H30T) {
cameraType == DJI_CAMERA_TYPE_M3TA ||
cameraType == DJI_CAMERA_TYPE_H30T)
{
USER_LOG_INFO("Set camera stream source to zoom camera.");
returnCode = DjiCameraManager_SetStreamSource(mountPosition, DJI_CAMERA_MANAGER_SOURCE_ZOOM_CAM);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
@ -1834,60 +1845,51 @@ T_DjiReturnCode DjiTest_CameraManagerRunSample(E_DjiMountPosition mountPosition,
}
case E_DJI_TEST_CAMERA_MANAGER_SAMPLE_SELECT_SET_METERING_MODE: {
E_DjiCameraManagerMeteringMode meteringMode;
T_DjiCameraManagerRangeList rangeList = {0};
USER_LOG_INFO("Set metering mode as %d", DJI_CAMERA_MANAGER_METERING_MODE_AVERAGE);
returnCode = DjiCameraManager_SetMeteringMode(mountPosition, DJI_CAMERA_MANAGER_METERING_MODE_AVERAGE);
returnCode = DjiCameraManager_GetMeteringModeRange(mountPosition, &rangeList);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Set camera metering mode %d failed", DJI_CAMERA_MANAGER_METERING_MODE_AVERAGE);
USER_LOG_ERROR("Failed to get metering mode range of camera on position %d, return code 0x%08X",
mountPosition, returnCode);
goto exitCameraModule;
}
osalHandler->TaskSleepMs(200);
USER_LOG_INFO("Avaliable metering mode num is %d", rangeList.size);
returnCode = DjiCameraManager_GetMeteringMode(mountPosition, &meteringMode);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Get camera metering mode failed.");
goto exitCameraModule;
for (uint8_t i = 0; i < rangeList.size; i++) {
USER_LOG_INFO("[%d] Set metering mode as %d (%s)",
i,
rangeList.meteringMode[i],
rangeList.meteringMode[i] == DJI_CAMERA_MANAGER_METERING_MODE_CENTRAL ? "centeral" :
rangeList.meteringMode[i] == DJI_CAMERA_MANAGER_METERING_MODE_AVERAGE ? "average" :
rangeList.meteringMode[i] == DJI_CAMERA_MANAGER_METERING_MODE_SPOT ? "spot" :
"error mode"
);
returnCode = DjiCameraManager_SetMeteringMode(mountPosition, rangeList.meteringMode[i]);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Set camera metering mode %d failed", DJI_CAMERA_MANAGER_METERING_MODE_AVERAGE);
goto exitCameraModule;
}
osalHandler->TaskSleepMs(200);
returnCode = DjiCameraManager_GetMeteringMode(mountPosition, &meteringMode);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Get camera metering mode failed.");
goto exitCameraModule;
}
USER_LOG_INFO("[%d] Current mode is %d (%s)",
i,
rangeList.meteringMode[i],
rangeList.meteringMode[i] == DJI_CAMERA_MANAGER_METERING_MODE_CENTRAL ? "centeral" :
rangeList.meteringMode[i] == DJI_CAMERA_MANAGER_METERING_MODE_AVERAGE ? "average" :
rangeList.meteringMode[i] == DJI_CAMERA_MANAGER_METERING_MODE_SPOT ? "spot" :
"error mode"
);
osalHandler->TaskSleepMs(2000);
}
USER_LOG_INFO("Current metering mode is %d", meteringMode);
USER_LOG_INFO("Sleep 2s...");
osalHandler->TaskSleepMs(2000);
USER_LOG_INFO("Set metering mode as %d", DJI_CAMERA_MANAGER_METERING_MODE_SPOT);
returnCode = DjiCameraManager_SetMeteringMode(mountPosition, DJI_CAMERA_MANAGER_METERING_MODE_SPOT);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Set camera metering mode %d failed", DJI_CAMERA_MANAGER_METERING_MODE_SPOT);
goto exitCameraModule;
}
osalHandler->TaskSleepMs(200);
returnCode = DjiCameraManager_GetMeteringMode(mountPosition, &meteringMode);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Get camera metering mode failed.");
goto exitCameraModule;
}
USER_LOG_INFO("Current metering mode is %d", meteringMode);
USER_LOG_INFO("Sleep 2s...");
osalHandler->TaskSleepMs(2000);
USER_LOG_INFO("Set metering mode as %d", DJI_CAMERA_MANAGER_METERING_MODE_CENTRAL);
returnCode = DjiCameraManager_SetMeteringMode(mountPosition, DJI_CAMERA_MANAGER_METERING_MODE_CENTRAL);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Set camera metering mode %d failed", DJI_CAMERA_MANAGER_METERING_MODE_CENTRAL);
goto exitCameraModule;
}
osalHandler->TaskSleepMs(200);
returnCode = DjiCameraManager_GetMeteringMode(mountPosition, &meteringMode);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Get camera metering mode failed.");
goto exitCameraModule;
}
USER_LOG_INFO("Current metering mode is %d", meteringMode);
break;
}
@ -1903,7 +1905,8 @@ T_DjiReturnCode DjiTest_CameraManagerRunSample(E_DjiMountPosition mountPosition,
}
returnCode = DjiCameraManager_GetMeteringPointRegionRange(mountPosition, &horizonRegionNum, &viticalRegionNum);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS)
{
USER_LOG_ERROR("Get metering point region range failed!");
goto exitCameraModule;
}
@ -1916,7 +1919,8 @@ T_DjiReturnCode DjiTest_CameraManagerRunSample(E_DjiMountPosition mountPosition,
USER_LOG_INFO("Try to set metering point as (%d, %d)", (uint8_t)x, (uint8_t)y);
returnCode = DjiCameraManager_SetMeteringPoint(mountPosition, x, y);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS)
{
USER_LOG_ERROR("Set metering point failed");
goto exitCameraModule;
}
@ -1924,7 +1928,8 @@ T_DjiReturnCode DjiTest_CameraManagerRunSample(E_DjiMountPosition mountPosition,
osalHandler->TaskSleepMs(500);
returnCode = DjiCameraManager_GetMeteringPoint(mountPosition, &getX, &getY);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS)
{
USER_LOG_ERROR("Get metering point failed");
goto exitCameraModule;
}
@ -2123,6 +2128,7 @@ static uint8_t DjiTest_CameraManagerGetCameraTypeIndex(E_DjiCameraType cameraTyp
return 0;
}
#ifdef SYSTEM_ARCH_LINUX
static T_DjiReturnCode DjiTest_CameraManagerMediaDownloadAndDeleteMediaFile(E_DjiMountPosition position)
{
T_DjiReturnCode returnCode;
@ -2142,6 +2148,7 @@ static T_DjiReturnCode DjiTest_CameraManagerMediaDownloadAndDeleteMediaFile(E_Dj
returnCode = DjiCameraManager_ObtainDownloaderRights(position);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Obtain downloader rights failed, error code: 0x%08X.", returnCode);
return returnCode;
}
returnCode = DjiCameraManager_DownloadFileList(position, &s_meidaFileList);
@ -2202,7 +2209,7 @@ static T_DjiReturnCode DjiTest_CameraManagerMediaDownloadAndDeleteMediaFile(E_Dj
returnCode = DjiCameraManager_DownloadFileByIndex(position, s_meidaFileList.fileListInfo[i].fileIndex);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Download media file by index failed, error code: 0x%08X.", returnCode);
s_nextDownloadFileIndex--;
if(s_nextDownloadFileIndex > 0)s_nextDownloadFileIndex--;
goto redownload;
}
if (s_meidaFileList.fileListInfo[i].type == DJI_CAMERA_FILE_TYPE_LDRT) {
@ -2450,6 +2457,7 @@ static T_DjiReturnCode DjiTest_CameraManagerDownloadFileDataCallback(T_DjiDownlo
return DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS;
}
#endif
static T_DjiReturnCode DjiTest_CameraManagerGetPointThermometryData(E_DjiMountPosition position)
{

3
samples/sample_c/module_sample/cloud_api/test_cloud_api_by_web_socket.c
View File

@ -82,10 +82,9 @@ static void *DjiTest_CloudApiByWebSocketSendTask(void *arg)
/* Exported functions definition ---------------------------------------------*/
T_DjiReturnCode DjiTest_CloudApiByWebSocketStartService(void)
{
T_DjiReturnCode returnCode;
T_DjiReturnCode returnCode = DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS;
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
USER_LOG_INFO("cloud_api over mop send task create error, stat:0x%08llX.", returnCode);
returnCode = osalHandler->TaskCreate("CloudApiByWebSocket", DjiTest_CloudApiByWebSocketSendTask,
2048, NULL, &s_testCloudApiByWebSocketSendTask);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {

8
samples/sample_c/module_sample/data_transmission/test_data_transmission.c
View File

@ -83,12 +83,13 @@ T_DjiReturnCode DjiTest_DataTransmissionStartService(void)
return DJI_ERROR_SYSTEM_MODULE_CODE_UNKNOWN;
}
if (s_aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M30 ||
if ((s_aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M30 ||
s_aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M30T ||
s_aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M3D ||
s_aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M3TD ||
s_aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M4D ||
s_aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M4TD) {
s_aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M4D ||
s_aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M4TD) &&
s_aircraftInfoBaseInfo.mountPositionType != DJI_MOUNT_POSITION_TYPE_MANIFOLD3_ONBOARD) {
channelAddress = DJI_CHANNEL_ADDRESS_CLOUD_API;
djiStat = DjiLowSpeedDataChannel_RegRecvDataCallback(channelAddress, ReceiveDataFromCloud);
if (djiStat != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
@ -99,6 +100,7 @@ T_DjiReturnCode DjiTest_DataTransmissionStartService(void)
if (s_aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M400) {
USER_LOG_INFO("Only supports small data transmission between PSDK and MSDK.");
return DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS;
} else if (s_aircraftInfoBaseInfo.mountPosition == DJI_MOUNT_POSITION_PAYLOAD_PORT_NO1 ||
s_aircraftInfoBaseInfo.mountPosition == DJI_MOUNT_POSITION_PAYLOAD_PORT_NO2 ||
s_aircraftInfoBaseInfo.mountPosition == DJI_MOUNT_POSITION_PAYLOAD_PORT_NO3) {

2
samples/sample_c/module_sample/fc_subscription/test_fc_subscription.c
View File

@ -32,7 +32,7 @@
/* Private constants ---------------------------------------------------------*/
#define FC_SUBSCRIPTION_TASK_FREQ (1)
#define FC_SUBSCRIPTION_TASK_STACK_SIZE (1024)
#define FC_SUBSCRIPTION_TASK_STACK_SIZE (2048)
/* Private types -------------------------------------------------------------*/

1
samples/sample_c/module_sample/flight_control/test_flight_control.c
View File

@ -1366,6 +1366,7 @@ bool DjiTest_FlightControlGoHomeAndConfirmLanding(void)
s_osalHandler->TaskSleepMs(1000);
if (DJI_AIRCRAFT_TYPE_M3E == aircraftInfoBaseInfo.aircraftType || DJI_AIRCRAFT_TYPE_M3T == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M3D == aircraftInfoBaseInfo.aircraftType || DJI_AIRCRAFT_TYPE_M3TD == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M3TA == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M4T == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M4TD == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M4D == aircraftInfoBaseInfo.aircraftType

10
samples/sample_c/module_sample/hms/test_hms.c
View File

@ -59,7 +59,9 @@ static bool isHmsManagerInit = false;
static T_DjiHmsFileBinaryArray s_EnHmsTextConfigFileBinaryArrayList[] = {
{hms_text_config_json_fileName, hms_text_config_json_fileSize, hms_text_config_json_fileBinaryArray},
};
#ifdef SYSTEM_ARCH_LINUX
static uint8_t *s_hmsJsonData = NULL;
#endif
static E_DjiMobileAppLanguage s_hmsLanguage = DJI_MOBILE_APP_LANGUAGE_ENGLISH;
static bool s_isHmsConfigFileDirPathConfigured = false;
static char s_hmsConfigFileDirPath[DJI_FILE_PATH_SIZE_MAX] = {0};
@ -70,7 +72,9 @@ static T_DjiReturnCode DjiTest_HmsManagerDeInit(void);
static T_DjiFcSubscriptionFlightStatus DjiTest_GetValueOfFlightStatus(void);
static bool DjiTest_ReplaceStr(char *buffer, uint32_t bufferMaxLen, const char *target, const char *dest);
static bool DjiTest_MarchErrCodeInfoTable(T_DjiHmsInfoTable hmsInfoTable);
#ifdef SYSTEM_ARCH_LINUX
static bool DjiTest_MarchErrCodeInfoTableByJson(T_DjiHmsInfoTable hmsInfoTable);
#endif
static T_DjiReturnCode DjiTest_HmsInfoCallback(T_DjiHmsInfoTable hmsInfoTable);
/* Exported functions definition ---------------------------------------------*/
@ -210,11 +214,13 @@ T_DjiReturnCode DjiTest_HmsCustomizationSetConfigFilePath(const char *path)
static T_DjiReturnCode DjiTest_HmsManagerInit(void)
{
T_DjiReturnCode returnCode;
#ifdef SYSTEM_ARCH_LINUX
char curFileDirPath[HMS_DIR_PATH_LEN_MAX];
char tempFileDirPath[HMS_DIR_PATH_LEN_MAX];
uint32_t fileSize = 0;
uint32_t readRealSize = 0;
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
#endif
returnCode = DjiFcSubscription_Init();
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
@ -265,7 +271,9 @@ static T_DjiReturnCode DjiTest_HmsManagerInit(void)
static T_DjiReturnCode DjiTest_HmsManagerDeInit(void)
{
T_DjiReturnCode returnCode;
#ifdef SYSTEM_ARCH_LINUX
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
#endif
returnCode = DjiFcSubscription_DeInit();
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
@ -392,6 +400,7 @@ static bool DjiTest_MarchErrCodeInfoTable(T_DjiHmsInfoTable hmsInfoTable)
return true;
}
#ifdef SYSTEM_ARCH_LINUX
static bool DjiTest_MarchErrCodeInfoTableByJson(T_DjiHmsInfoTable hmsInfoTable)
{
cJSON *hmsJsonRoot = NULL;
@ -444,6 +453,7 @@ static bool DjiTest_MarchErrCodeInfoTableByJson(T_DjiHmsInfoTable hmsInfoTable)
cJSON_Delete(hmsJsonRoot);
}
#endif
static T_DjiReturnCode DjiTest_HmsInfoCallback(T_DjiHmsInfoTable hmsInfoTable)
{

36
samples/sample_c/module_sample/liveview/test_liveview.c
View File

@ -98,6 +98,21 @@ T_DjiReturnCode DjiTest_LiveviewRunSample(E_DjiMountPosition mountPosition)
}
}
if (aircraftInfoBaseInfo.aircraftSeries == DJI_AIRCRAFT_SERIES_M400
&& aircraftInfoBaseInfo.mountPositionType == DJI_MOUNT_POSITION_TYPE_MANIFOLD3_ONBOARD)
{
// XXX: On MANIFOLD3, FPV and MAIN CAMERA SOURCE_DEFAULT streams cannot be subscribed to at the same time.
for (int i = 0; i < TEST_LIVEVIEW_STREAM_STROING_TIME_IN_SECONDS; ++i) {
USER_LOG_INFO("Storing camera h264 stream, second: %d.", i + 1);
osalHandler->TaskSleepMs(1000);
}
returnCode = DjiLiveview_StopH264Stream(DJI_LIVEVIEW_CAMERA_POSITION_FPV, DJI_LIVEVIEW_CAMERA_SOURCE_DEFAULT);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Request to stop h264 of fpv failed, error code: 0x%08X", returnCode);
goto out;
}
}
localTime = localtime(&currentTime);
sprintf(s_payloadCameraStreamFilePath, "payload%d_default_stream_%04d%02d%02d_%02d-%02d-%02d.h264",
mountPosition, localTime->tm_year + 1900, localTime->tm_mon + 1, localTime->tm_mday,
@ -113,12 +128,17 @@ T_DjiReturnCode DjiTest_LiveviewRunSample(E_DjiMountPosition mountPosition)
for (int i = 0; i < TEST_LIVEVIEW_STREAM_STROING_TIME_IN_SECONDS; ++i) {
USER_LOG_INFO("Storing camera h264 stream, second: %d.", i + 1);
#if TEST_LIVEVIEW_STREAM_REQUEST_I_FRAME_ON
if (i % TEST_LIVEVIEW_STREAM_REQUEST_I_FRAME_TICK_IN_SECONDS == 0) {
returnCode = DjiLiveview_RequestIntraframeFrameData((E_DjiLiveViewCameraPosition) mountPosition,
DJI_LIVEVIEW_CAMERA_SOURCE_DEFAULT);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Request stream I frame of payload %d failed, error code: 0x%08X", mountPosition,
returnCode);
if (aircraftInfoBaseInfo.mountPositionType != DJI_MOUNT_POSITION_TYPE_MANIFOLD3_ONBOARD)
{
if (i % TEST_LIVEVIEW_STREAM_REQUEST_I_FRAME_TICK_IN_SECONDS == 0)
{
returnCode = DjiLiveview_RequestIntraframeFrameData((E_DjiLiveViewCameraPosition)mountPosition,
DJI_LIVEVIEW_CAMERA_SOURCE_DEFAULT);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS)
{
USER_LOG_ERROR("Request stream I frame of payload %d failed, error code: 0x%08X", mountPosition,
returnCode);
}
}
}
#endif
@ -130,7 +150,8 @@ T_DjiReturnCode DjiTest_LiveviewRunSample(E_DjiMountPosition mountPosition)
if (aircraftInfoBaseInfo.aircraftSeries == DJI_AIRCRAFT_SERIES_M300 ||
aircraftInfoBaseInfo.aircraftSeries == DJI_AIRCRAFT_SERIES_M350 ||
aircraftInfoBaseInfo.aircraftSeries == DJI_AIRCRAFT_SERIES_M30 ||
aircraftInfoBaseInfo.aircraftSeries == DJI_AIRCRAFT_SERIES_M400) {
(aircraftInfoBaseInfo.aircraftSeries == DJI_AIRCRAFT_SERIES_M400
&& aircraftInfoBaseInfo.mountPositionType != DJI_MOUNT_POSITION_TYPE_MANIFOLD3_ONBOARD)) {
returnCode = DjiLiveview_StopH264Stream(DJI_LIVEVIEW_CAMERA_POSITION_FPV, DJI_LIVEVIEW_CAMERA_SOURCE_DEFAULT);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Request to stop h264 of fpv failed, error code: 0x%08X", returnCode);
@ -146,6 +167,7 @@ T_DjiReturnCode DjiTest_LiveviewRunSample(E_DjiMountPosition mountPosition)
}
if (DJI_AIRCRAFT_TYPE_M3T == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M3TA == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M3TD == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M4T == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M4TD == aircraftInfoBaseInfo.aircraftType

6
samples/sample_c/module_sample/positioning/test_positioning.c
View File

@ -58,8 +58,10 @@ static T_DjiReturnCode DjiTest_ReceiveRtkBaseStationRtcmDataCallback(uint8_t ind
/* Private variables ---------------------------------------------------------*/
static T_DjiTaskHandle s_userPositioningThread;
static int32_t s_eventIndex = 0;
#ifdef SYSTEM_ARCH_LINUX
static char s_rtkOnAircraftRtcmFilePath[TEST_RTCM_FILE_PATH_STR_MAX_SIZE];
static char s_rtkBaseStationRtcmFilePath[TEST_RTCM_FILE_PATH_STR_MAX_SIZE];
#endif
/* Exported functions definition ---------------------------------------------*/
T_DjiReturnCode DjiTest_PositioningStartService(void)
@ -198,9 +200,9 @@ static void *DjiTest_PositioningTask(void *arg)
#pragma GCC diagnostic pop
#endif
#ifdef SYSTEM_ARCH_LINUX
static int32_t DjiTest_SaveRtcmData(char *filePath, const uint8_t *data, uint32_t len)
{
#ifdef SYSTEM_ARCH_LINUX
FILE *fp = NULL;
size_t size;
@ -218,9 +220,9 @@ static int32_t DjiTest_SaveRtcmData(char *filePath, const uint8_t *data, uint32_
fflush(fp);
fclose(fp);
#endif
return 0;
}
#endif
static T_DjiReturnCode DjiTest_ReceiveRtkOnAircraftRtcmDataCallback(uint8_t index, const uint8_t *data,
uint16_t dataLen)

3
samples/sample_c/module_sample/tethered_battery/test_tethered_battery.c
View File

@ -68,7 +68,6 @@ T_DjiReturnCode DjiTest_TetheredBatteryStartService(void)
static void *DjiTest_TetheredBatteryTask(void *arg)
{
uint32_t sysTimeMs = 0;
T_DjiReturnCode returnCode;
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
T_DjiTetherLineStatus tetherLineStatus = {0};
@ -103,6 +102,8 @@ static void *DjiTest_TetheredBatteryTask(void *arg)
osalHandler->TaskSleepMs(100);
}
return NULL;
}
/****************** (C) COPYRIGHT DJI Innovations *****END OF FILE****/

5
samples/sample_c/module_sample/utils/dji_config_manager.c
View File

@ -90,6 +90,7 @@ bool DjiUserConfigManager_IsEnable(void)
/* Private functions definition-----------------------------------------------*/
static T_DjiReturnCode DjiUserConfigManager_GetAppInfoInner(const char *path, T_DjiUserInfo *userInfo)
{
#ifdef SYSTEM_ARCH_LINUX
T_DjiReturnCode returnCode;
uint32_t fileSize = 0;
uint32_t readRealSize = 0;
@ -99,7 +100,6 @@ static T_DjiReturnCode DjiUserConfigManager_GetAppInfoInner(const char *path, T_
cJSON *jsonItem = NULL;
cJSON *jsonValue = NULL;
#ifdef SYSTEM_ARCH_LINUX
returnCode = UtilFile_GetFileSizeByPath(path, &fileSize);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Get file size by path failed, stat = 0x%08llX", returnCode);
@ -191,6 +191,7 @@ jsonDataFree:
static T_DjiReturnCode DjiUserConfigManager_GetLinkConfigInner(const char *path, T_DjiUserLinkConfig *linkConfig)
{
#ifdef SYSTEM_ARCH_LINUX
T_DjiReturnCode returnCode;
uint32_t fileSize = 0;
uint32_t readRealSize = 0;
@ -202,8 +203,6 @@ static T_DjiReturnCode DjiUserConfigManager_GetLinkConfigInner(const char *path,
cJSON *jsonConfig = NULL;
int32_t configValue;
#ifdef SYSTEM_ARCH_LINUX
returnCode = UtilFile_GetFileSizeByPath(path, &fileSize);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Get file size by path failed, stat = 0x%08llX", returnCode);

8
samples/sample_c/module_sample/waypoint_v3/test_waypoint_v3.c
View File

@ -37,22 +37,26 @@
/* Private types -------------------------------------------------------------*/
/* Private values -------------------------------------------------------------*/
#ifdef SYSTEM_ARCH_LINUX
static T_DjiWaypointV3MissionState s_lastWaypointV3MissionState = {0};
#endif
/* Private functions declaration ---------------------------------------------*/
#ifdef SYSTEM_ARCH_LINUX
static T_DjiReturnCode DjiTest_WaypointV3MissionStateCallback(T_DjiWaypointV3MissionState missionState);
static T_DjiReturnCode DjiTest_WaypointV3ActionStateCallback(T_DjiWaypointV3ActionState actionState);
#endif
static T_DjiReturnCode DjiTest_WaypointV3WaitEndFlightStatus(T_DjiFcSubscriptionFlightStatus status);
/* Exported functions definition ---------------------------------------------*/
T_DjiReturnCode DjiTest_WaypointV3RunSample(void)
{
T_DjiReturnCode returnCode;
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
T_DjiFcSubscriptionFlightStatus flightStatus = 0;
T_DjiDataTimestamp flightStatusTimestamp = {0};
#ifdef SYSTEM_ARCH_LINUX
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
FILE *kmzFile = NULL;
uint32_t kmzFileSize = 0;
uint8_t *kmzFileBuf;
@ -209,6 +213,7 @@ out:
}
/* Private functions definition-----------------------------------------------*/
#ifdef SYSTEM_ARCH_LINUX
static T_DjiReturnCode DjiTest_WaypointV3MissionStateCallback(T_DjiWaypointV3MissionState missionState)
{
if (s_lastWaypointV3MissionState.state == missionState.state
@ -235,6 +240,7 @@ static T_DjiReturnCode DjiTest_WaypointV3ActionStateCallback(T_DjiWaypointV3Acti
return DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS;
}
#endif
static T_DjiReturnCode DjiTest_WaypointV3WaitEndFlightStatus(T_DjiFcSubscriptionFlightStatus status) {
T_DjiReturnCode returnCode;

23
samples/sample_c/module_sample/widget/test_widget_speaker.c
View File

@ -71,10 +71,13 @@
static T_DjiWidgetSpeakerHandler s_speakerHandler = {0};
static T_DjiMutexHandle s_speakerMutex = {0};
static T_DjiWidgetSpeakerState s_speakerState = {0};
#ifdef SYSTEM_ARCH_LINUX
static T_DjiTaskHandle s_widgetSpeakerTestThread;
static FILE *s_ttsFile = NULL;
#endif
static FILE *s_audioFile = NULL;
static FILE *s_ttsFile = NULL;
static bool s_isDecodeFinished = true;
static uint16_t s_decodeBitrate = 0;
@ -323,6 +326,7 @@ static T_DjiReturnCode DjiTest_PlayTtsData(void)
if (DJI_AIRCRAFT_TYPE_M3E == aircraftInfoBaseInfo.aircraftType || DJI_AIRCRAFT_TYPE_M3T == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M3D == aircraftInfoBaseInfo.aircraftType || DJI_AIRCRAFT_TYPE_M3TD == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M3TA == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M4T == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M4TD == aircraftInfoBaseInfo.aircraftType
|| DJI_AIRCRAFT_TYPE_M4D == aircraftInfoBaseInfo.aircraftType
@ -517,7 +521,9 @@ static T_DjiReturnCode SetPlayMode(E_DjiWidgetSpeakerPlayMode playMode)
static T_DjiReturnCode StartPlay(void)
{
#ifdef SYSTEM_ARCH_LINUX
uint32_t pid;
#endif
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
#ifdef SYSTEM_ARCH_LINUX
@ -538,7 +544,9 @@ static T_DjiReturnCode StopPlay(void)
{
T_DjiReturnCode returnCode;
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
#ifdef SYSTEM_ARCH_LINUX
uint32_t pid;
#endif
returnCode = osalHandler->MutexLock(s_speakerMutex);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
@ -569,9 +577,11 @@ static T_DjiReturnCode SetVolume(uint8_t volume)
{
T_DjiReturnCode returnCode;
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
char cmdStr[128];
int32_t ret = 0;
#ifdef PLATFORM_ARCH_x86_64
float realVolume;
int32_t ret = 0;
char cmdStr[128];
#endif
returnCode = osalHandler->MutexLock(s_speakerMutex);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
@ -579,7 +589,6 @@ static T_DjiReturnCode SetVolume(uint8_t volume)
return returnCode;
}
realVolume = 1.5f * (float) volume;
s_speakerState.volume = volume;
USER_LOG_INFO("Set widget speaker volume: %d", volume);
@ -589,6 +598,7 @@ static T_DjiReturnCode SetVolume(uint8_t volume)
ret = system(cmdStr);
if (ret == DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
memset(cmdStr, 0, sizeof(cmdStr));
realVolume = 1.5f * (float) volume;
snprintf(cmdStr, sizeof(cmdStr), "pactl set-sink-volume %s %d%%", WIDGET_SPEAKER_USB_AUDIO_DEVICE_NAME,
(int32_t) realVolume);
@ -615,8 +625,10 @@ static T_DjiReturnCode SetVolume(uint8_t volume)
static T_DjiReturnCode ReceiveTtsData(E_DjiWidgetTransmitDataEvent event,
uint32_t offset, uint8_t *buf, uint16_t size)
{
#ifdef SYSTEM_ARCH_LINUX
uint16_t writeLen;
T_DjiReturnCode returnCode;
#endif
if (event == DJI_WIDGET_TRANSMIT_DATA_EVENT_START) {
USER_LOG_INFO("Create tts file.");
@ -667,8 +679,11 @@ static T_DjiReturnCode ReceiveTtsData(E_DjiWidgetTransmitDataEvent event,
static T_DjiReturnCode ReceiveAudioData(E_DjiWidgetTransmitDataEvent event,
uint32_t offset, uint8_t *buf, uint16_t size)
{
#ifdef SYSTEM_ARCH_LINUX
uint16_t writeLen;
T_DjiReturnCode returnCode;
#endif
T_DjiWidgetTransDataContent transDataContent = {0};
if (event == DJI_WIDGET_TRANSMIT_DATA_EVENT_START) {

2
samples/sample_c/platform/linux/manifold3/application/dji_sdk_config.h
View File

@ -71,6 +71,8 @@ extern "C" {
#define CONFIG_MODULE_SAMPLE_CLOUD_API_ON
#define CONFIG_MODULE_SAMPLE_MOP_CHANNEL_ON true
/* Exported types ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/

89
samples/sample_c/platform/linux/manifold3/application/main.c
View File

@ -97,9 +97,9 @@ int main(int argc, char **argv)
T_DjiAircraftInfoBaseInfo aircraftInfoBaseInfo;
T_DjiAircraftVersion aircraftInfoVersion;
T_DjiFirmwareVersion firmwareVersion = {
.majorVersion = 1,
.majorVersion = 0,
.minorVersion = 0,
.modifyVersion = 0,
.modifyVersion = 7,
.debugVersion = 0,
};
@ -203,25 +203,14 @@ int main(int argc, char **argv)
#endif
#ifdef CONFIG_MODULE_SAMPLE_DATA_TRANSMISSION_ON
returnCode = DjiTest_DataTransmissionStartService();
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("data tramsmission sample init error");
if(aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M400) {
returnCode = DjiTest_DataTransmissionStartService();
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("data tramsmission sample init error");
}
}
#endif
if (aircraftInfoBaseInfo.mountPosition == DJI_MOUNT_POSITION_EXTENSION_PORT &&
(aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M300_RTK ||
aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M350_RTK)) {
returnCode = DjiTest_WidgetInteractionStartService();
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("widget interaction sample init error");
}
returnCode = DjiTest_WidgetSpeakerStartService();
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("widget speaker test init error");
}
} else {
#ifdef CONFIG_MODULE_SAMPLE_CAMERA_EMU_ON
returnCode = DjiTest_CameraEmuBaseStartService();
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
@ -243,64 +232,13 @@ int main(int argc, char **argv)
}
#endif
#ifdef CONFIG_MODULE_SAMPLE_GIMBAL_EMU_ON
if (aircraftInfoBaseInfo.djiAdapterType == DJI_SDK_ADAPTER_TYPE_SKYPORT_V2 ||
aircraftInfoBaseInfo.djiAdapterType == DJI_SDK_ADAPTER_TYPE_EPORT_V2_RIBBON_CABLE ||
aircraftInfoBaseInfo.djiAdapterType == DJI_SDK_ADAPTER_TYPE_SKYPORT_V3 ||
aircraftInfoBaseInfo.djiAdapterType == DJI_SDK_ADAPTER_TYPE_NONE) {
if (DjiTest_GimbalStartService() != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("psdk gimbal init error");
}
}
#endif
#ifdef CONFIG_MODULE_SAMPLE_XPORT_ON
if (aircraftInfoBaseInfo.djiAdapterType == DJI_SDK_ADAPTER_TYPE_XPORT) {
if (DjiTest_XPortStartService() != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("psdk xport init error");
}
}
#endif
#ifdef CONFIG_MODULE_SAMPLE_CLOUD_API_ON
if(aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M400) {
returnCode = DjiTest_CloudApiByWebSocketStartService();
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("CloudApiByWebSocket send data sample start error");
}
#endif
#ifdef CONFIG_MODULE_SAMPLE_PAYLOAD_COLLABORATION_ON
if (aircraftInfoBaseInfo.djiAdapterType == DJI_SDK_ADAPTER_TYPE_SKYPORT_V2 ||
aircraftInfoBaseInfo.djiAdapterType == DJI_SDK_ADAPTER_TYPE_XPORT) {
returnCode = DjiTest_PayloadCollaborationStartService();
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Payload collaboration sample init error\n");
}
}
#endif
#ifdef CONFIG_MODULE_SAMPLE_UPGRADE_ON
T_DjiTestUpgradePlatformOpt linuxUpgradePlatformOpt = {
.rebootSystem = DjiUpgradePlatformLinux_RebootSystem,
.cleanUpgradeProgramFileStoreArea = DjiUpgradePlatformLinux_CleanUpgradeProgramFileStoreArea,
.createUpgradeProgramFile = DjiUpgradePlatformLinux_CreateUpgradeProgramFile,
.writeUpgradeProgramFile = DjiUpgradePlatformLinux_WriteUpgradeProgramFile,
.readUpgradeProgramFile = DjiUpgradePlatformLinux_ReadUpgradeProgramFile,
.closeUpgradeProgramFile = DjiUpgradePlatformLinux_CloseUpgradeProgramFile,
.replaceOldProgram = DjiUpgradePlatformLinux_ReplaceOldProgram,
.setUpgradeRebootState = DjiUpgradePlatformLinux_SetUpgradeRebootState,
.getUpgradeRebootState = DjiUpgradePlatformLinux_GetUpgradeRebootState,
.cleanUpgradeRebootState = DjiUpgradePlatformLinux_CleanUpgradeRebootState,
};
T_DjiTestUpgradeConfig testUpgradeConfig = {
.firmwareVersion = firmwareVersion,
.transferType = DJI_FIRMWARE_TRANSFER_TYPE_DCFTP,
.needReplaceProgramBeforeReboot = true
};
if (DjiTest_UpgradeStartService(&linuxUpgradePlatformOpt, testUpgradeConfig) !=
DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("psdk upgrade init error");
}
}
#endif
#ifdef CONFIG_MODULE_SAMPLE_HMS_CUSTOMIZATION_ON
@ -309,7 +247,16 @@ int main(int argc, char **argv)
USER_LOG_ERROR("hms test init error");
}
#endif
#ifdef CONFIG_MODULE_SAMPLE_MOP_CHANNEL_ON
if(aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M400) {
USER_LOG_INFO("DjiTest_MopChannelStartService();");
returnCode = DjiTest_MopChannelStartService();
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("mop channel sample init error");
}
}
#endif
if (pthread_create(&s_monitorThread, NULL, DjiUser_MonitorTask, NULL) != 0) {
USER_LOG_ERROR("create monitor task fail.");

2
samples/sample_c/platform/linux/raspberry_pi/application/main.c
View File

@ -208,7 +208,7 @@ int main(int argc, char **argv)
if (aircraftInfoBaseInfo.mountPosition == DJI_MOUNT_POSITION_EXTENSION_PORT &&
(aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M300_RTK ||
aircraftInfoBaseInfo.aircraftType == DJI_AIRCRAFT_TYPE_M350_RTK)) {
// TODO: something is no support on E-Port of M300/M350 ???
} else {
#if CONFIG_MODULE_SAMPLE_CAMERA_EMU_ON
returnCode = DjiTest_CameraEmuBaseStartService();

4
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/README.txt
View File

@ -10,8 +10,8 @@ Library Manager: ArmAr.exe V5.06 update 6 (build 750)
Hex Converter: FromElf.exe V5.06 update 6 (build 750)
Pin Definition:
Console UART: PA9(TX), PA10(RX)
Communication UART: PA2(TX), PA3(RX)
Console UART: PC10(TX), PC11(RX)
Communication UART: PA9(TX), PA10(RX)
Interactive UART: PD8(TX), PD9(RX)
PPS PIN: PD2

48
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/application/application.c
View File

@ -37,6 +37,7 @@
#include "application.h"
#include "hal_uart.h"
#include "hal_i2c.h"
#include "osal.h"
#include "dji_sdk_app_info.h"
#include "dji_sdk_config.h"
@ -112,6 +113,12 @@ void DjiUser_StartTask(void const *argument)
.UartGetStatus = HalUart_GetStatus,
.UartGetDeviceInfo = HalUart_GetDeviceInfo,
};
T_DjiHalI2cHandler i2CHandler = {
.I2cInit = HalI2c_Init,
.I2cDeInit = HalI2c_DeInit,
.I2cWriteData = HalI2c_WriteData,
.I2cReadData = HalI2c_ReadData,
};
T_DjiFirmwareVersion firmwareVersion = {
.majorVersion = USER_FIRMWARE_MAJOR_VERSION,
.minorVersion = USER_FIRMWARE_MINOR_VERSION,
@ -131,6 +138,13 @@ void DjiUser_StartTask(void const *argument)
goto out;
}
USER_LOG_INFO("Register hal i2c handler.");
returnCode = DjiPlatform_RegHalI2cHandler(&i2CHandler);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
printf("register hal i2c handler error");
goto out;
}
returnCode = DjiLogger_AddConsole(&printConsole);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
printf("add printf console error");
@ -143,8 +157,22 @@ void DjiUser_StartTask(void const *argument)
goto out;
}
returnCode = DjiCore_SetFirmwareVersion(firmwareVersion);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("set firmware version error");
goto out;
}
returnCode = DjiCore_SetSerialNumber("PSDK12345678XX");
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("set serial number error");
goto out;
}
returnCode = DjiCore_Init(&userInfo);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
osalHandler.TaskSleepMs(200);
USER_LOG_ERROR("core init error");
goto out;
}
@ -161,17 +189,6 @@ void DjiUser_StartTask(void const *argument)
goto out;
}
returnCode = DjiCore_SetFirmwareVersion(firmwareVersion);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("set firmware version error");
goto out;
}
returnCode = DjiCore_SetSerialNumber("PSDK12345678XX");
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("set serial number error");
goto out;
}
#ifdef CONFIG_MODULE_SAMPLE_POWER_MANAGEMENT_ON
T_DjiTestApplyHighPowerHandler applyHighPowerHandler = {
@ -244,6 +261,8 @@ void DjiUser_StartTask(void const *argument)
USER_LOG_WARN("Not support gimbal emu sample.");
} else {
if (aircraftInfoBaseInfo.djiAdapterType == DJI_SDK_ADAPTER_TYPE_SKYPORT_V2 ||
aircraftInfoBaseInfo.djiAdapterType == DJI_SDK_ADAPTER_TYPE_EPORT_V2_RIBBON_CABLE ||
aircraftInfoBaseInfo.djiAdapterType == DJI_SDK_ADAPTER_TYPE_SKYPORT_V3 ||
aircraftInfoBaseInfo.djiAdapterType == DJI_SDK_ADAPTER_TYPE_NONE) {
if (DjiTest_GimbalStartService() != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("psdk gimbal init error");
@ -335,6 +354,13 @@ void DjiUser_StartTask(void const *argument)
s_isApplicationStart = true;
#ifdef CONFIG_MODULE_SAMPLE_FC_SUBSCRIPTION_ON
returnCode = DjiTest_FcSubscriptionRunSample();
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
USER_LOG_ERROR("Fc subcription run sample failed, 0x%08X", returnCode);
}
#endif
while (1) {
Osal_TaskSleepMs(500);
Led_Trigger(LED_GREEN);

10
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/application/dji_sdk_config.h
View File

@ -42,13 +42,13 @@ extern "C" {
#define CONFIG_MODULE_SAMPLE_DATA_TRANSMISSION_ON
// #define CONFIG_MODULE_SAMPLE_FC_SUBSCRIPTION_ON
#define CONFIG_MODULE_SAMPLE_FC_SUBSCRIPTION_ON
// #define CONFIG_MODULE_SAMPLE_GIMBAL_EMU_ON
#define CONFIG_MODULE_SAMPLE_GIMBAL_EMU_ON
// #define CONFIG_MODULE_SAMPLE_CAMERA_ON
#define CONFIG_MODULE_SAMPLE_CAMERA_ON
// #define CONFIG_MODULE_SAMPLE_XPORT_ON
#define CONFIG_MODULE_SAMPLE_XPORT_ON
#define CONFIG_MODULE_SAMPLE_UPGRADE_ON
@ -60,7 +60,7 @@ extern "C" {
// #define CONFIG_MODULE_SAMPLE_POSITIONING_ON
// #define CONFIG_MODULE_SAMPLE_TETHERED_BATTERY_ON
#define CONFIG_MODULE_SAMPLE_TETHERED_BATTERY_ON
#define USER_FIRMWARE_MAJOR_VERSION (1)
#define USER_FIRMWARE_MINOR_VERSION (0)

22
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/application/main.c
View File

@ -38,6 +38,7 @@
#include "task.h"
#include "usb_device.h"
#include "osal.h"
#include "flash_if.h"
/* Private constants ---------------------------------------------------------*/
#define BSP_INIT_TASK_STACK_SIZE 512
@ -52,7 +53,6 @@
/* Private values -------------------------------------------------------------*/
static TaskHandle_t bspInitTask;
static TaskHandle_t startTask;
static TaskHandle_t runIndicateTask;
/* Private functions declaration ---------------------------------------------*/
static void DjiUser_BspInitTask(void const *argument);
@ -72,10 +72,6 @@ int main(void)
xTaskCreate((TaskFunction_t)DjiUser_StartTask, "start_task", USER_START_TASK_STACK_SIZE,
NULL, USER_START_TASK_PRIORITY, (TaskHandle_t *)startTask);
/* Create runIndicate task */
// xTaskCreate((TaskFunction_t)DjiUser_MonitorTask, "monitor_task", USER_RUN_INDICATE_TASK_STACK_SIZE,
// NULL, USER_RUN_INDICATE_TASK_PRIORITY, (TaskHandle_t *)runIndicateTask);
/* start scheduler */
vTaskStartScheduler();
@ -86,8 +82,6 @@ int main(void)
void DjiUser_BspInitTask(void const *argument)
{
uint32_t cnt = 0;
// LED Init
Led_Init(LED_RED);
Led_Init(LED_GREEN);
@ -96,6 +90,8 @@ void DjiUser_BspInitTask(void const *argument)
// Debug UART Init
UART_Init(DJI_CONSOLE_UART_NUM, DJI_CONSOLE_UART_BAUD);
printf("\r\n========Payload sdk app firmware start!========\r\n");
// Force Loader button Init
Button_Init(BUTTON_KEY1, BUTTON_MODE_GPIO);
@ -126,3 +122,15 @@ int fputc(int ch, FILE *f)
return ch;
}
int __io_putchar(int ch)
{
usart_data_transmit(UART3, (uint8_t)ch);
while (RESET == usart_flag_get(UART3, USART_FLAG_TBE));
return 1;
}
int __io_getchar(void)
{
return 0;
}

20
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/bootloader/main.c
View File

@ -65,6 +65,9 @@
#define USER_LED_TASK_STACK_SIZE 1024
#define USER_LED_TASK_PRIORITY 0
#define SRAM_START_ADDR ((uint32_t)0x20000000)
#define SRAM_SIZE ((uint32_t)0x100000)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
extern pFunction JumpToApplication;
@ -109,6 +112,8 @@ static void PsdkUser_StartTask(void const *argument)
bool isUpgradeReboot;
T_DjiUpgradeEndInfo upgradeEndInfo;
T_DjiReturnCode returnCode;
extern uint32_t __RAM_START;
extern uint32_t __RAM_SIZE;
/* attention : Delay for power on button state check mistake */
Osal_TaskSleepMs(50);
@ -121,6 +126,9 @@ static void PsdkUser_StartTask(void const *argument)
IAP_Init();
printf("RAM Start: 0x%08lX\r\n", SRAM_START_ADDR);
printf("RAM Size: 0x%08lX\r\n", SRAM_SIZE);
/* Test if Key push-button1 is pressed */
if (Button_GetState(BUTTON_KEY1) == 1) {
/* Execute the IAP driver in order to reprogram the Flash */
@ -128,7 +136,7 @@ static void PsdkUser_StartTask(void const *argument)
Main_Menu();
} else {
returnCode = DjiUpgradePlatformGd32_GetUpgradeRebootState(&isUpgradeReboot, &upgradeEndInfo);
printf("Reboot from upgrade flag is %d.\r\n", isUpgradeReboot);
printf("Reboot from upgrade flag is %d, upgrade end state is 0x%x.\r\n", isUpgradeReboot, upgradeEndInfo.upgradeEndState);
Osal_TaskSleepMs(5);
if (returnCode == DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS && isUpgradeReboot == true &&
@ -144,13 +152,13 @@ static void PsdkUser_StartTask(void const *argument)
}
}
uint32_t addr = ((*(__IO uint32_t *) APPLICATION_ADDRESS) & 0x2FFE0000);
uint32_t spValue = (*(__IO uint32_t *) APPLICATION_ADDRESS);
/* Test if user code is programmed starting from address "APPLICATION_ADDRESS" */
printf("the initial SP of app is %08X\r\n", (*(__IO uint32_t *) APPLICATION_ADDRESS));
printf("The initial sp of app is 0x%08X\r\n", spValue);
Osal_TaskSleepMs(5);
if (((*(__IO uint32_t *) APPLICATION_ADDRESS) & 0x2FFE0000) == 0x20020000) {
printf("jump to app at 0x%08X\r\n", APPLICATION_ADDRESS);
if (spValue >= SRAM_START_ADDR && (spValue < SRAM_START_ADDR + SRAM_SIZE)) {
printf("Jump to app at 0x%08X\r\n", APPLICATION_ADDRESS);
Osal_TaskSleepMs(5);
__disable_irq();
__disable_fiq();
@ -160,6 +168,8 @@ static void PsdkUser_StartTask(void const *argument)
/* Initialize user application's Stack Pointer */
__set_MSP(*(__IO uint32_t *) APPLICATION_ADDRESS);
JumpToApplication();
} else {
printf("Invalid initial sp value\r\n");
}
}

61
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/BSP/can.c
View File

@ -64,7 +64,6 @@ static T_DjiMutexHandle s_can0Mutex;
static T_RingBuffer s_can1ReadRingBuffer;
static T_CanBufferState s_can1ReadBufferState;
static T_RingBuffer s_can1WriteRingBuffer;
static T_CanBufferState s_can1WriteBufferState;
static uint8_t s_can1ReadBuf[CAN1_READ_BUF_SIZE];
static uint8_t s_can1WriteBuf[CAN1_WRITE_BUF_SIZE];
static T_DjiMutexHandle s_can1Mutex;
@ -229,14 +228,12 @@ int CAN_Read(E_CanNum canNum, uint8_t *buf, uint16_t readSize)
*/
int CAN_Write(E_CanNum canNum, const uint8_t *buf, uint16_t writeSize)
{
int writeRealLen;
uint16_t usedCapacityOfBuffer = 0;
int writeRealLen = 0;
can_trasnmit_message_struct transmit_message;
int32_t i = 0;
int32_t j = 0;
uint32_t packageCnt = 0;
uint32_t LastpackageSize = 0;
uint8_t mailBoxNum = 0;
switch (canNum)
{
@ -244,6 +241,8 @@ int CAN_Write(E_CanNum canNum, const uint8_t *buf, uint16_t writeSize)
#ifdef USING_CAN0
case UART_NUM_1:
{
uint16_t usedCapacityOfBuffer = 0;
Osal_MutexLock(s_uart1Mutex);
writeRealLen = RingBuf_Put(&s_uart1WriteRingBuffer, buf, writeSize);
@ -262,8 +261,6 @@ int CAN_Write(E_CanNum canNum, const uint8_t *buf, uint16_t writeSize)
#ifdef USING_CAN1
case CAN_NUM_1:
{
// Osal_MutexLock(s_can1Mutex);
can_struct_para_init(CAN_TX_MESSAGE_STRUCT, &transmit_message);
transmit_message.tx_efid = 0x00;
transmit_message.tx_ft = CAN_FT_DATA;
@ -280,7 +277,7 @@ int CAN_Write(E_CanNum canNum, const uint8_t *buf, uint16_t writeSize)
}
transmit_message.tx_sfid = 0x21;
transmit_message.tx_dlen = 8;
mailBoxNum = can_message_transmit(CAN1, &transmit_message);
can_message_transmit(CAN1, &transmit_message);
Osal_TaskSleepMs(1);
}
@ -293,21 +290,9 @@ int CAN_Write(E_CanNum canNum, const uint8_t *buf, uint16_t writeSize)
transmit_message.tx_sfid = 0x21;
transmit_message.tx_dlen = LastpackageSize;
mailBoxNum = can_message_transmit(CAN1, &transmit_message);
can_message_transmit(CAN1, &transmit_message);
Osal_TaskSleepMs(1);
}
// Osal_MutexUnlock(s_can1Mutex);
// writeRealLen = RingBuf_Put(&s_can1WriteRingBuffer, buf, writeSize);
// usedCapacityOfBuffer = CAN1_WRITE_BUF_SIZE - RingBuf_GetUnusedSize(&s_can1WriteRingBuffer);
// s_can1WriteBufferState.maxUsedCapacityOfBuffer =
// usedCapacityOfBuffer > s_can1WriteBufferState.maxUsedCapacityOfBuffer ? usedCapacityOfBuffer
// : s_can1WriteBufferState.maxUsedCapacityOfBuffer;
// s_can1WriteBufferState.countOfLostData += writeSize - writeRealLen;
// printf("Enable tmeie interrupt");
// can_interrupt_enable(CAN1, CAN_INTEN_TMEIE);
}
break;
#endif
@ -319,32 +304,6 @@ int CAN_Write(E_CanNum canNum, const uint8_t *buf, uint16_t writeSize)
return writeRealLen;
}
// void UART_GetBufferState(E_UartNum uartNum, T_CanBufferState *readBufferState, T_CanBufferState *writeBufferState)
// {
// switch (uartNum) {
// #ifdef USING_UART_PORT_1
// case UART_NUM_1:
// memcpy(readBufferState, &s_uart1ReadBufferState, sizeof(T_CanBufferState));
// memcpy(writeBufferState, &s_uart1WriteBufferState, sizeof(T_CanBufferState));
// break;
// #endif
// #ifdef USING_UART_PORT_2
// case UART_NUM_2:
// memcpy(readBufferState, &s_can1ReadBufferState, sizeof(T_CanBufferState));
// memcpy(writeBufferState, &s_can1WriteBufferState, sizeof(T_CanBufferState));
// break;
// #endif
// #ifdef USING_UART_PORT_3
// case UART_NUM_3:
// memcpy(readBufferState, &s_uart3ReadBufferState, sizeof(T_CanBufferState));
// memcpy(writeBufferState, &s_uart3WriteBufferState, sizeof(T_CanBufferState));
// break;
// #endif
// default:
// break;
// }
// }
/**
* @brief UART1 interrupt request handler fucntion.
*/
@ -426,7 +385,7 @@ void CAN1_TX_IRQHandler(void)
// {
// can_interrupt_flag_clear(CAN1, CAN_INT_FLAG_MTF2);
// // printf("\r\nMTF2 data transmmit success\r\n");
// }
// }
// Osal_SemaphorePost(s_can1Sema);
@ -466,18 +425,12 @@ void CAN1_RX0_IRQHandler(void)
/* check the receive message */
can_message_receive(CAN1, CAN_FIFO0, &receive_message);
realCountPutBuffer = RingBuf_Put(&s_can1ReadRingBuffer, &receive_message.rx_data, receive_message.rx_dlen);
realCountPutBuffer = RingBuf_Put(&s_can1ReadRingBuffer, (const uint8_t *)receive_message.rx_data, receive_message.rx_dlen);
usedCapacityOfBuffer = CAN1_READ_BUF_SIZE - RingBuf_GetUnusedSize(&s_can1ReadRingBuffer);
s_can1ReadBufferState.maxUsedCapacityOfBuffer =
usedCapacityOfBuffer > s_can1ReadBufferState.maxUsedCapacityOfBuffer ? usedCapacityOfBuffer
: s_can1ReadBufferState.maxUsedCapacityOfBuffer;
s_can1ReadBufferState.countOfLostData += 1 - realCountPutBuffer;
// int i = 0 ;
// printf("\r\n can1 receive data:");
// for(i = 0; i < receive_message.rx_dlen; i++) {
// printf(" %02x", receive_message.rx_data[i]);
// }
}
#endif

5
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/BSP/flash_if.c
View File

@ -187,7 +187,6 @@ static int32_t Flash_If_GetSectorNum(uint32_t address)
uint32_t FLASH_If_Init(void)
{
int32_t result = 0;
uint32_t borValue = 0;
#if ENABLE_BOR
fmc_unlock();
@ -216,7 +215,6 @@ uint32_t FLASH_If_Init(void)
*/
uint32_t FLASH_If_Erase(uint32_t startAddress, uint32_t endAddress)
{
uint32_t sectorNum = 0;
uint8_t isNeedErase[FLASH_SECTOR_NUM] = {0};
int32_t startSectorNum = 0;
int32_t endSectorNum = 0;
@ -308,7 +306,7 @@ uint32_t FLASH_If_Write(uint32_t FlashAddress, const uint8_t *Data, uint32_t Dat
dataLenDoubleWord = DataLength / 8;
for(i = 0; (i < dataLenDoubleWord) && (writeAddress <= (FLASH_END_ADDRESS - 8)); i++) {
if(FMC_READY == fmc_doubleword_program(writeAddress, *(uint64_t *)(Data + i * 8))) {
if(FMC_READY == fmc_doubleword_program(writeAddress, (uint32_t *)(Data + i * 8))) {
writeAddress += 8;
} else {
ret = FLASHIF_WRITING_ERROR;
@ -369,7 +367,6 @@ uint16_t FLASH_If_GetWriteProtectionStatus(void)
*/
int32_t FLASH_If_WriteProtectionConfig(bool enableWriteProtection)
{
uint32_t ProtectedSECTOR = 0xFFF;
int32_t result;
fmc_unlock();

537
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/BSP/startup_gd32f5xx_armgcc.s Normal file
View File

@ -0,0 +1,537 @@
.syntax unified
.cpu cortex-m33
.fpu softvfp
.thumb
.global Default_Handler
/* necessary symbols defined in linker script to initialize data */
.word _sidata
.word _sdata
.word _edata
.word _sbss
.word _ebss
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
/* reset Handler */
Reset_Handler:
LDR r0, =0x1FFF7A20
LDR r2, [r0]
LDR r0, = 0x0000FFFF
AND r2, r2, r0
SUBS r2, r2, 0x40
LSL r2, r2, #10
LDR r1, =0x20000000
MOV r0, #0x00
SRAM_INIT:
STM r1!, {r0}
SUBS r2, r2, #4
CMP r2, #0x00
BNE SRAM_INIT
movs r1, #0
b DataInit
CopyData:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
DataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyData
ldr r2, =_sbss
b Zerobss
FillZerobss:
movs r3, #0
str r3, [r2], #4
Zerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call SystemInit function */
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/*Call the main function */
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
.section .vectors,"a",%progbits
.global __gVectors
__gVectors:
.word _sp /* Top of Stack */
.word Reset_Handler /* Reset Handler */
.word NMI_Handler /* NMI Handler */
.word HardFault_Handler /* Hard Fault Handler */
.word MemManage_Handler /* MPU Fault Handler */
.word BusFault_Handler /* Bus Fault Handler */
.word UsageFault_Handler /* Usage Fault Handler */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word SVC_Handler /* SVCall Handler */
.word DebugMon_Handler /* Debug Monitor Handler */
.word 0 /* Reserved */
.word PendSV_Handler /* PendSV Handler */
.word SysTick_Handler /* SysTick Handler */
/* External interrupts handler */
.word WWDGT_IRQHandler /* Vector Number 16,Window Watchdog Timer */
.word LVD_IRQHandler /* Vector Number 17,LVD through EXTI Line detect */
.word TAMPER_STAMP_IRQHandler /* Vector Number 18,Tamper and TimeStamp through EXTI Line detect */
.word RTC_WKUP_IRQHandler /* Vector Number 19,RTC Wakeup through EXTI Line */
.word FMC_IRQHandler /* Vector Number 20,FMC */
.word RCU_CTC_IRQHandler /* Vector Number 21,RCU and CTC */
.word EXTI0_IRQHandler /* Vector Number 22,EXTI Line 0 */
.word EXTI1_IRQHandler /* Vector Number 23,EXTI Line 1 */
.word EXTI2_IRQHandler /* Vector Number 24,EXTI Line 2 */
.word EXTI3_IRQHandler /* Vector Number 25,EXTI Line 3 */
.word EXTI4_IRQHandler /* Vector Number 26,EXTI Line 4 */
.word DMA0_Channel0_IRQHandler /* Vector Number 27,DMA0 Channel0 */
.word DMA0_Channel1_IRQHandler /* Vector Number 28,DMA0 Channel1 */
.word DMA0_Channel2_IRQHandler /* Vector Number 29,DMA0 Channel2 */
.word DMA0_Channel3_IRQHandler /* Vector Number 30,DMA0 Channel3 */
.word DMA0_Channel4_IRQHandler /* Vector Number 31,DMA0 Channel4 */
.word DMA0_Channel5_IRQHandler /* Vector Number 32,DMA0 Channel5 */
.word DMA0_Channel6_IRQHandler /* Vector Number 33,DMA0 Channel6 */
.word ADC_IRQHandler /* Vector Number 34,ADC */
.word CAN0_TX_IRQHandler /* Vector Number 35,CAN0 TX */
.word CAN0_RX0_IRQHandler /* Vector Number 36,CAN0 RX0 */
.word CAN0_RX1_IRQHandler /* Vector Number 37,CAN0 RX1 */
.word CAN0_EWMC_IRQHandler /* Vector Number 38,CAN0 EWMC */
.word EXTI5_9_IRQHandler /* Vector Number 39,EXTI5 to EXTI9 */
.word TIMER0_BRK_TIMER8_IRQHandler /* Vector Number 40,TIMER0 Break and TIMER8 */
.word TIMER0_UP_TIMER9_IRQHandler /* Vector Number 41,TIMER0 Update and TIMER9 */
.word TIMER0_TRG_CMT_TIMER10_IRQHandler /* Vector Number 42,TIMER0 Trigger and Commutation and TIMER10 */
.word TIMER0_Channel_IRQHandler /* Vector Number 43,TIMER0 Capture Compare */
.word TIMER1_IRQHandler /* Vector Number 44,TIMER1 */
.word TIMER2_IRQHandler /* Vector Number 45,TIMER2 */
.word TIMER3_IRQHandler /* Vector Number 46,TIMER3 */
.word I2C0_EV_IRQHandler /* Vector Number 47,I2C0 Event */
.word I2C0_ER_IRQHandler /* Vector Number 48,I2C0 Error */
.word I2C1_EV_IRQHandler /* Vector Number 49,I2C1 Event */
.word I2C1_ER_IRQHandler /* Vector Number 50,I2C1 Error */
.word SPI0_IRQHandler /* Vector Number 51,SPI0 */
.word SPI1_IRQHandler /* Vector Number 52,SPI1 */
.word USART0_IRQHandler /* Vector Number 53,USART0 */
.word USART1_IRQHandler /* Vector Number 54,USART1 */
.word USART2_IRQHandler /* Vector Number 55,USART2 */
.word EXTI10_15_IRQHandler /* Vector Number 56,EXTI10 to EXTI15 */
.word RTC_Alarm_IRQHandler /* Vector Number 57,RTC Alarm */
.word USBFS_WKUP_IRQHandler /* Vector Number 58,USBFS Wakeup */
.word TIMER7_BRK_TIMER11_IRQHandler /* Vector Number 59,TIMER7 Break and TIMER11 */
.word TIMER7_UP_TIMER12_IRQHandler /* Vector Number 60,TIMER7 Update and TIMER12 */
.word TIMER7_TRG_CMT_TIMER13_IRQHandler /* Vector Number 61,TIMER7 Trigger and Commutation and TIMER13 */
.word TIMER7_Channel_IRQHandler /* Vector Number 62,TIMER7 Channel Capture Compare */
.word DMA0_Channel7_IRQHandler /* Vector Number 63,DMA0 Channel7 */
.word EXMC_IRQHandler /* Vector Number 64,EXMC */
.word SDIO_IRQHandler /* Vector Number 65,SDIO */
.word TIMER4_IRQHandler /* Vector Number 66,TIMER4 */
.word SPI2_IRQHandler /* Vector Number 67,SPI2 */
.word UART3_IRQHandler /* Vector Number 68,UART3 */
.word UART4_IRQHandler /* Vector Number 69,UART4 */
.word TIMER5_DAC_IRQHandler /* Vector Number 70,TIMER5 and DAC0 DAC1 Underrun error */
.word TIMER6_IRQHandler /* Vector Number 71,TIMER6 */
.word DMA1_Channel0_IRQHandler /* Vector Number 72,DMA1 Channel0 */
.word DMA1_Channel1_IRQHandler /* Vector Number 73,DMA1 Channel1 */
.word DMA1_Channel2_IRQHandler /* Vector Number 74,DMA1 Channel2 */
.word DMA1_Channel3_IRQHandler /* Vector Number 75,DMA1 Channel3 */
.word DMA1_Channel4_IRQHandler /* Vector Number 76,DMA1 Channel4 */
.word ENET_IRQHandler /* Vector Number 77,Ethernet */
.word ENET_WKUP_IRQHandler /* Vector Number 78,Ethernet Wakeup through EXTI Line */
.word CAN1_TX_IRQHandler /* Vector Number 79,CAN1 TX */
.word CAN1_RX0_IRQHandler /* Vector Number 80,CAN1 RX0 */
.word CAN1_RX1_IRQHandler /* Vector Number 81,CAN1 RX1 */
.word CAN1_EWMC_IRQHandler /* Vector Number 82,CAN1 EWMC */
.word USBFS_IRQHandler /* Vector Number 83,USBFS */
.word DMA1_Channel5_IRQHandler /* Vector Number 84,DMA1 Channel5 */
.word DMA1_Channel6_IRQHandler /* Vector Number 85,DMA1 Channel6 */
.word DMA1_Channel7_IRQHandler /* Vector Number 86,DMA1 Channel7 */
.word USART5_IRQHandler /* Vector Number 87,USART5 */
.word I2C2_EV_IRQHandler /* Vector Number 88,I2C2 Event */
.word I2C2_ER_IRQHandler /* Vector Number 89,I2C2 Error */
.word USBHS_EP1_Out_IRQHandler /* Vector Number 90,USBHS Endpoint 1 Out */
.word USBHS_EP1_In_IRQHandler /* Vector Number 91,USBHS Endpoint 1 in */
.word USBHS_WKUP_IRQHandler /* Vector Number 92,USBHS Wakeup through EXTI Line */
.word USBHS_IRQHandler /* Vector Number 93,USBHS */
.word DCI_IRQHandler /* Vector Number 94,DCI */
.word 0 /* Vector Number 95,Reserved */
.word TRNG_IRQHandler /* Vector Number 96,TRNG */
.word FPU_IRQHandler /* Vector Number 97,FPU */
.word UART6_IRQHandler /* Vector Number 98,UART6 */
.word UART7_IRQHandler /* Vector Number 99,UART7 */
.word SPI3_IRQHandler /* Vector Number 100,SPI3 */
.word SPI4_IRQHandler /* Vector Number 101,SPI4 */
.word SPI5_IRQHandler /* Vector Number 102,SPI5 */
.word SAI_IRQHandler /* Vector Number 103,SAI */
.word TLI_IRQHandler /* Vector Number 104,TLI */
.word TLI_ER_IRQHandler /* Vector Number 105,TLI Error */
.word IPA_IRQHandler /* Vector Number 106,IPA */
.word PKCAU_IRQHandler /* Vector Number 107,PKCAU */
.word I2C3_EV_IRQHandler /* Vector Number 108,I2C3 Event */
.word I2C3_ER_IRQHandler /* Vector Number 109,I2C3 Error */
.word I2C4_EV_IRQHandler /* Vector Number 110,I2C4 Event */
.word I2C4_ER_IRQHandler /* Vector Number 111,I2C4 Error */
.word I2C5_EV_IRQHandler /* Vector Number 112,I2C5 Event */
.word I2C5_ER_IRQHandler /* Vector Number 113,I2C5 Error */
.word I2C3_WKUP_IRQHandler /* Vector Number 114,I2C3 Wakeup through EXTI Line */
.word I2C4_WKUP_IRQHandler /* Vector Number 115,I2C4 Wakeup through EXTI Line */
.word I2C5_WKUP_IRQHandler /* Vector Number 116,I2C5 Wakeup through EXTI Line */
.word SYSCFG_SRAM_ECC_ER_IRQHandler /* Vector Number 117,SYSCFG SRAM ECC Error */
.word HAU_IRQHandler /* Vector Number 118,HAU */
.word CAU_IRQHandler /* Vector Number 119,CAU */
.size __gVectors, . - __gVectors
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDGT_IRQHandler
.thumb_set WWDGT_IRQHandler,Default_Handler
.weak LVD_IRQHandler
.thumb_set LVD_IRQHandler,Default_Handler
.weak TAMPER_STAMP_IRQHandler
.thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
.weak RTC_WKUP_IRQHandler
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
.weak FMC_IRQHandler
.thumb_set FMC_IRQHandler,Default_Handler
.weak RCU_CTC_IRQHandler
.thumb_set RCU_CTC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA0_Channel0_IRQHandler
.thumb_set DMA0_Channel0_IRQHandler,Default_Handler
.weak DMA0_Channel1_IRQHandler
.thumb_set DMA0_Channel1_IRQHandler,Default_Handler
.weak DMA0_Channel2_IRQHandler
.thumb_set DMA0_Channel2_IRQHandler,Default_Handler
.weak DMA0_Channel3_IRQHandler
.thumb_set DMA0_Channel3_IRQHandler,Default_Handler
.weak DMA0_Channel4_IRQHandler
.thumb_set DMA0_Channel4_IRQHandler,Default_Handler
.weak DMA0_Channel5_IRQHandler
.thumb_set DMA0_Channel5_IRQHandler,Default_Handler
.weak DMA0_Channel6_IRQHandler
.thumb_set DMA0_Channel6_IRQHandler,Default_Handler
.weak ADC_IRQHandler
.thumb_set ADC_IRQHandler,Default_Handler
.weak CAN0_TX_IRQHandler
.thumb_set CAN0_TX_IRQHandler,Default_Handler
.weak CAN0_RX0_IRQHandler
.thumb_set CAN0_RX0_IRQHandler,Default_Handler
.weak CAN0_RX1_IRQHandler
.thumb_set CAN0_RX1_IRQHandler,Default_Handler
.weak CAN0_EWMC_IRQHandler
.thumb_set CAN0_EWMC_IRQHandler,Default_Handler
.weak EXTI5_9_IRQHandler
.thumb_set EXTI5_9_IRQHandler,Default_Handler
.weak TIMER0_BRK_TIMER8_IRQHandler
.thumb_set TIMER0_BRK_TIMER8_IRQHandler,Default_Handler
.weak TIMER0_UP_TIMER9_IRQHandler
.thumb_set TIMER0_UP_TIMER9_IRQHandler,Default_Handler
.weak TIMER0_TRG_CMT_TIMER10_IRQHandler
.thumb_set TIMER0_TRG_CMT_TIMER10_IRQHandler,Default_Handler
.weak TIMER0_Channel_IRQHandler
.thumb_set TIMER0_Channel_IRQHandler,Default_Handler
.weak TIMER1_IRQHandler
.thumb_set TIMER1_IRQHandler,Default_Handler
.weak TIMER2_IRQHandler
.thumb_set TIMER2_IRQHandler,Default_Handler
.weak TIMER3_IRQHandler
.thumb_set TIMER3_IRQHandler,Default_Handler
.weak I2C0_EV_IRQHandler
.thumb_set I2C0_EV_IRQHandler,Default_Handler
.weak I2C0_ER_IRQHandler
.thumb_set I2C0_ER_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak SPI0_IRQHandler
.thumb_set SPI0_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak USART0_IRQHandler
.thumb_set USART0_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak EXTI10_15_IRQHandler
.thumb_set EXTI10_15_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak USBFS_WKUP_IRQHandler
.thumb_set USBFS_WKUP_IRQHandler,Default_Handler
.weak TIMER7_BRK_TIMER11_IRQHandler
.thumb_set TIMER7_BRK_TIMER11_IRQHandler,Default_Handler
.weak TIMER7_UP_TIMER12_IRQHandler
.thumb_set TIMER7_UP_TIMER12_IRQHandler,Default_Handler
.weak TIMER7_TRG_CMT_TIMER13_IRQHandler
.thumb_set TIMER7_TRG_CMT_TIMER13_IRQHandler,Default_Handler
.weak TIMER7_Channel_IRQHandler
.thumb_set TIMER7_Channel_IRQHandler,Default_Handler
.weak DMA0_Channel7_IRQHandler
.thumb_set DMA0_Channel7_IRQHandler,Default_Handler
.weak EXMC_IRQHandler
.thumb_set EXMC_IRQHandler,Default_Handler
.weak SDIO_IRQHandler
.thumb_set SDIO_IRQHandler,Default_Handler
.weak TIMER4_IRQHandler
.thumb_set TIMER4_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak UART3_IRQHandler
.thumb_set UART3_IRQHandler,Default_Handler
.weak UART4_IRQHandler
.thumb_set UART4_IRQHandler,Default_Handler
.weak TIMER5_DAC_IRQHandler
.thumb_set TIMER5_DAC_IRQHandler,Default_Handler
.weak TIMER6_IRQHandler
.thumb_set TIMER6_IRQHandler,Default_Handler
.weak DMA1_Channel0_IRQHandler
.thumb_set DMA1_Channel0_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_IRQHandler
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
.weak DMA1_Channel3_IRQHandler
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
.weak DMA1_Channel4_IRQHandler
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
.weak ENET_IRQHandler
.thumb_set ENET_IRQHandler,Default_Handler
.weak ENET_WKUP_IRQHandler
.thumb_set ENET_WKUP_IRQHandler,Default_Handler
.weak CAN1_TX_IRQHandler
.thumb_set CAN1_TX_IRQHandler,Default_Handler
.weak CAN1_RX0_IRQHandler
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
.weak CAN1_RX1_IRQHandler
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
.weak CAN1_EWMC_IRQHandler
.thumb_set CAN1_EWMC_IRQHandler,Default_Handler
.weak USBFS_IRQHandler
.thumb_set USBFS_IRQHandler,Default_Handler
.weak DMA1_Channel5_IRQHandler
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
.weak DMA1_Channel6_IRQHandler
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
.weak DMA1_Channel7_IRQHandler
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
.weak USART5_IRQHandler
.thumb_set USART5_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak USBHS_EP1_Out_IRQHandler
.thumb_set USBHS_EP1_Out_IRQHandler,Default_Handler
.weak USBHS_EP1_In_IRQHandler
.thumb_set USBHS_EP1_In_IRQHandler,Default_Handler
.weak USBHS_WKUP_IRQHandler
.thumb_set USBHS_WKUP_IRQHandler,Default_Handler
.weak USBHS_IRQHandler
.thumb_set USBHS_IRQHandler,Default_Handler
.weak DCI_IRQHandler
.thumb_set DCI_IRQHandler,Default_Handler
.weak TRNG_IRQHandler
.thumb_set TRNG_IRQHandler,Default_Handler
.weak FPU_IRQHandler
.thumb_set FPU_IRQHandler,Default_Handler
.weak UART6_IRQHandler
.thumb_set UART6_IRQHandler,Default_Handler
.weak UART7_IRQHandler
.thumb_set UART7_IRQHandler,Default_Handler
.weak SPI3_IRQHandler
.thumb_set SPI3_IRQHandler,Default_Handler
.weak SPI4_IRQHandler
.thumb_set SPI4_IRQHandler,Default_Handler
.weak SPI5_IRQHandler
.thumb_set SPI5_IRQHandler,Default_Handler
.weak SAI_IRQHandler
.thumb_set SAI_IRQHandler,Default_Handler
.weak TLI_IRQHandler
.thumb_set TLI_IRQHandler,Default_Handler
.weak TLI_ER_IRQHandler
.thumb_set TLI_ER_IRQHandler,Default_Handler
.weak IPA_IRQHandler
.thumb_set IPA_IRQHandler,Default_Handler
.weak PKCAU_IRQHandler
.thumb_set PKCAU_IRQHandler,Default_Handler
.weak I2C3_EV_IRQHandler
.thumb_set I2C3_EV_IRQHandler,Default_Handler
.weak I2C3_ER_IRQHandler
.thumb_set I2C3_ER_IRQHandler,Default_Handler
.weak I2C4_EV_IRQHandler
.thumb_set I2C4_EV_IRQHandler,Default_Handler
.weak I2C4_ER_IRQHandler
.thumb_set I2C4_ER_IRQHandler,Default_Handler
.weak I2C5_EV_IRQHandler
.thumb_set I2C5_EV_IRQHandler,Default_Handler
.weak I2C5_ER_IRQHandler
.thumb_set I2C5_ER_IRQHandler,Default_Handler
.weak I2C3_WKUP_IRQHandler
.thumb_set I2C3_WKUP_IRQHandler,Default_Handler
.weak I2C4_WKUP_IRQHandler
.thumb_set I2C4_WKUP_IRQHandler,Default_Handler
.weak I2C5_WKUP_IRQHandler
.thumb_set I2C5_WKUP_IRQHandler,Default_Handler
.weak SYSCFG_SRAM_ECC_ER_IRQHandler
.thumb_set SYSCFG_SRAM_ECC_ER_IRQHandler,Default_Handler
.weak HAU_IRQHandler
.thumb_set HAU_IRQHandler,Default_Handler
.weak CAU_IRQHandler
.thumb_set CAU_IRQHandler,Default_Handler

79
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/BSP/uart.c
View File

@ -145,18 +145,6 @@ void UART_Init(E_UartNum uartNum, uint32_t baudRate)
case UART_NUM_2: {
RingBuf_Init(&s_uart2ReadRingBuffer, s_uart2ReadBuf, UART2_READ_BUF_SIZE);
RingBuf_Init(&s_uart2WriteRingBuffer, s_uart2WriteBuf, UART2_WRITE_BUF_SIZE);
// s_uart2Handle.Instance = USART2;
// s_uart2Handle.Init.BaudRate = baudRate;
// s_uart2Handle.Init.WordLength = UART_WORDLENGTH_8B;
// s_uart2Handle.Init.StopBits = UART_STOPBITS_1;
// s_uart2Handle.Init.Parity = UART_PARITY_NONE;
// s_uart2Handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
// s_uart2Handle.Init.Mode = UART_MODE_TX_RX;
// s_uart2Handle.Init.OverSampling = UART_OVERSAMPLING_16;
// HAL_UART_Init(&s_uart2Handle);
// __HAL_UART_ENABLE_IT(&s_uart2Handle, UART_IT_RXNE);
Osal_MutexCreate(&s_uart2Mutex);
}
break;
@ -266,7 +254,7 @@ int UART_Write(E_UartNum uartNum, const uint8_t *buf, uint16_t writeSize)
case UART_NUM_1: {
Osal_MutexLock(s_uart1Mutex);
writeRealLen = RingBuf_Put(&s_uart1WriteRingBuffer, buf, writeSize);
/* enable USART TBE interrupt */
usart_interrupt_enable(USART0, USART_INT_TBE);
usedCapacityOfBuffer = UART1_WRITE_BUF_SIZE - RingBuf_GetUnusedSize(&s_uart1WriteRingBuffer);
@ -298,7 +286,7 @@ int UART_Write(E_UartNum uartNum, const uint8_t *buf, uint16_t writeSize)
case UART_NUM_3: {
Osal_MutexLock(s_uart3Mutex);
writeRealLen = RingBuf_Put(&s_uart3WriteRingBuffer, buf, writeSize);
/* enable USART TBE interrupt */
usart_interrupt_enable(UART3, USART_INT_TBE);
usedCapacityOfBuffer = UART3_WRITE_BUF_SIZE - RingBuf_GetUnusedSize(&s_uart3WriteRingBuffer);
@ -374,27 +362,6 @@ void USART0_IRQHandler(void)
usart_interrupt_disable(USART0, USART_INT_TBE);
}
}
// if (__HAL_USART_GET_IT_SOURCE(&s_uart1Handle, USART_IT_RXNE) != RESET &&
// __HAL_USART_GET_FLAG(&s_uart1Handle, USART_FLAG_RXNE) != RESET) {
// data = (uint8_t) ((uint16_t) (s_uart1Handle.Instance->DR & (uint16_t) 0x01FF) & (uint16_t) 0x00FF);
// realCountPutBuffer = RingBuf_Put(&s_uart1ReadRingBuffer, &data, 1);
// usedCapacityOfBuffer = UART1_READ_BUF_SIZE - RingBuf_GetUnusedSize(&s_uart1ReadRingBuffer);
// s_uart1ReadBufferState.maxUsedCapacityOfBuffer =
// usedCapacityOfBuffer > s_uart1ReadBufferState.maxUsedCapacityOfBuffer ? usedCapacityOfBuffer
// : s_uart1ReadBufferState.maxUsedCapacityOfBuffer;
// s_uart1ReadBufferState.countOfLostData += 1 - realCountPutBuffer;
// }
// if (__HAL_USART_GET_IT_SOURCE(&s_uart1Handle, USART_IT_TXE) != RESET &&
// __HAL_USART_GET_FLAG(&s_uart1Handle, USART_FLAG_TXE) != RESET) {
// if (RingBuf_Get(&s_uart1WriteRingBuffer, &data, 1)) {
// /* Transmit Data */
// s_uart1Handle.Instance->DR = ((uint16_t) data & (uint16_t) 0x01FF);
// } else {
// __HAL_USART_DISABLE_IT(&s_uart1Handle, USART_IT_TXE);
// }
// }
}
#endif
@ -409,27 +376,6 @@ void USART2_IRQHandler(void)
uint8_t data;
uint16_t usedCapacityOfBuffer = 0;
uint16_t realCountPutBuffer = 0;
// if (__HAL_USART_GET_IT_SOURCE(&s_uart2Handle, USART_IT_RXNE) != RESET &&
// __HAL_USART_GET_FLAG(&s_uart2Handle, USART_FLAG_RXNE) != RESET) {
// data = (uint8_t) ((uint16_t) (s_uart2Handle.Instance->DR & (uint16_t) 0x01FF) & (uint16_t) 0x00FF);
// realCountPutBuffer = RingBuf_Put(&s_uart2ReadRingBuffer, &data, 1);
// usedCapacityOfBuffer = UART2_READ_BUF_SIZE - RingBuf_GetUnusedSize(&s_uart2ReadRingBuffer);
// s_uart2ReadBufferState.maxUsedCapacityOfBuffer =
// usedCapacityOfBuffer > s_uart2ReadBufferState.maxUsedCapacityOfBuffer ? usedCapacityOfBuffer
// : s_uart2ReadBufferState.maxUsedCapacityOfBuffer;
// s_uart2ReadBufferState.countOfLostData += 1 - realCountPutBuffer;
// }
// if (__HAL_USART_GET_IT_SOURCE(&s_uart2Handle, USART_IT_TXE) != RESET &&
// __HAL_USART_GET_FLAG(&s_uart2Handle, USART_FLAG_TXE) != RESET) {
// if (RingBuf_Get(&s_uart2WriteRingBuffer, &data, 1)) {
// /* Transmit Data */
// s_uart2Handle.Instance->DR = ((uint16_t) data & (uint16_t) 0x01FF);
// } else {
// __HAL_USART_DISABLE_IT(&s_uart2Handle, USART_IT_TXE);
// }
// }
}
#endif
@ -464,27 +410,6 @@ void UART3_IRQHandler(void)
usart_interrupt_disable(UART3, USART_INT_TBE);
}
}
// if (__HAL_USART_GET_IT_SOURCE(&s_uart3Handle, USART_IT_RXNE) != RESET &&
// __HAL_USART_GET_FLAG(&s_uart3Handle, USART_FLAG_RXNE) != RESET) {
// data = (uint8_t) ((uint16_t) (s_uart3Handle.Instance->DR & (uint16_t) 0x01FF) & (uint16_t) 0x00FF);
// realCountPutBuffer = RingBuf_Put(&s_uart3ReadRingBuffer, &data, 1);
// usedCapacityOfBuffer = UART3_READ_BUF_SIZE - RingBuf_GetUnusedSize(&s_uart3ReadRingBuffer);
// s_uart3ReadBufferState.maxUsedCapacityOfBuffer =
// usedCapacityOfBuffer > s_uart3ReadBufferState.maxUsedCapacityOfBuffer ? usedCapacityOfBuffer
// : s_uart3ReadBufferState.maxUsedCapacityOfBuffer;
// s_uart3ReadBufferState.countOfLostData += 1 - realCountPutBuffer;
// }
// if (__HAL_USART_GET_IT_SOURCE(&s_uart3Handle, USART_IT_TXE) != RESET &&
// __HAL_USART_GET_FLAG(&s_uart3Handle, USART_FLAG_TXE) != RESET) {
// if (RingBuf_Get(&s_uart3WriteRingBuffer, &data, 1)) {
// /* Transmit Data */
// s_uart3Handle.Instance->DR = ((uint16_t) data & (uint16_t) 0x01FF);
// } else {
// __HAL_USART_DISABLE_IT(&s_uart3Handle, USART_IT_TXE);
// }
// }
}
#endif

1
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/BSP/uart.h
View File

@ -33,7 +33,6 @@
/* Exported constants --------------------------------------------------------*/
#define USING_UART_PORT_1
#define USING_UART_PORT_2
#define USING_UART_PORT_3
#define UART_ERROR (-1)

2
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/BSP/upgrade_platform_opt_gd32.c
View File

@ -130,7 +130,7 @@ T_DjiReturnCode DjiUpgradePlatformGd32_ReplaceOldProgram(void)
T_DjiReturnCode DjiUpgradePlatformGd32_SetUpgradeRebootState(const T_DjiUpgradeEndInfo *upgradeEndInfo)
{
uint32_t result;
T_DjiTestUpgradeRebootParam upgradeRebootParam;
T_DjiTestUpgradeRebootParam upgradeRebootParam = {0};
upgradeRebootParam.upgradeRebootKey = DJI_TEST_UPGRADE_REBOOT_KEY;
upgradeRebootParam.upgradeEndInfo = *upgradeEndInfo;

7
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/BSP/usb_device.c
View File

@ -45,9 +45,7 @@
/* Private values -------------------------------------------------------------*/
static T_RingBuffer s_usbDeviceReadRingBuffer;
static T_UsbDeviceBufferState s_usbDeviceReadBufferState;
static T_RingBuffer s_usbDeviceWriteRingBuffer;
static T_UsbDeviceBufferState s_usbDeviceWriteBufferState;
static uint8_t s_usbDeviceReadBuf[USB_DEVICE_READ_BUF_SIZE];
static uint8_t s_usbDeviceWriteBuf[USB_DEVICE_WRITE_BUF_SIZE];
static T_DjiMutexHandle s_usbDeviceMutex;
@ -119,7 +117,6 @@ T_DjiReturnCode USBD_CDC_WriteData(const uint8_t *buf, uint32_t len, uint32_t *r
void USBD_CDC_Handle(void)
{
uint16_t usedCapacityOfBuffer = 0;
uint16_t realCountPutBuffer = 0;
uint32_t readRealLen = 0;
uint8_t readBuf[USB_DEVICE_READ_DATA_SIZE] = {0};
@ -132,7 +129,11 @@ void USBD_CDC_Handle(void)
if (readRealLen > 0) {
Osal_MutexLock(s_usbDeviceMutex);
realCountPutBuffer = RingBuf_Put(&s_usbDeviceReadRingBuffer, readBuf, readRealLen);
Osal_MutexUnlock(s_usbDeviceMutex);
if (realCountPutBuffer < readRealLen) {
USER_LOG_ERROR("failed to put data, %u/%u", realCountPutBuffer, readRealLen);
}
USER_LOG_DEBUG("Rececive cdc data finished, dataLen: %d", readRealLen);
}

162
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/CMSIS/GD/GD32F5xx/Source/syscalls.c Normal file
View File

@ -0,0 +1,162 @@
/* Support files for GNU libc. Files in the system namespace go here.
Files in the C namespace (ie those that do not start with an
underscore) go in .c. */
#include <_ansi.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/fcntl.h>
#include <stdio.h>
#include <string.h>
#include <time.h>
#include <sys/time.h>
#include <sys/times.h>
#include <errno.h>
#include <reent.h>
#include <unistd.h>
#include <sys/wait.h>
#undef errno
extern int errno;
extern int __io_putchar(int ch) __attribute__((weak));
extern int __io_getchar(void) __attribute__((weak));
caddr_t _sbrk(int incr)
{
extern char _end[];
extern char _heap_end[];
static char *curbrk = _end;
if ((curbrk + incr < _end) || (curbrk + incr > _heap_end))
return NULL - 1;
curbrk += incr;
return curbrk - incr;
}
/*
* _gettimeofday primitive (Stub function)
* */
int _gettimeofday (struct timeval * tp, struct timezone * tzp)
{
/* Return fixed data for the timezone. */
if (tzp)
{
tzp->tz_minuteswest = 0;
tzp->tz_dsttime = 0;
}
return 0;
}
void initialise_monitor_handles()
{
}
int _getpid(void)
{
return 1;
}
int _kill(int pid, int sig)
{
errno = EINVAL;
return -1;
}
void _exit (int status)
{
_kill(status, -1);
while (1) {}
}
int _write(int file, char *ptr, int len)
{
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
__io_putchar( *ptr++ );
}
return len;
}
int _close(int file)
{
return -1;
}
int _fstat(int file, struct stat *st)
{
st->st_mode = S_IFCHR;
return 0;
}
int _isatty(int file)
{
return 1;
}
int _lseek(int file, int ptr, int dir)
{
return 0;
}
int _read(int file, char *ptr, int len)
{
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
*ptr++ = __io_getchar();
}
return len;
}
int _open(char *path, int flags, ...)
{
/* Pretend like we always fail */
return -1;
}
int _wait(int *status)
{
errno = ECHILD;
return -1;
}
int _unlink(char *name)
{
errno = ENOENT;
return -1;
}
int _times(struct tms *buf)
{
return -1;
}
int _stat(char *file, struct stat *st)
{
st->st_mode = S_IFCHR;
return 0;
}
int _link(char *old, char *new)
{
errno = EMLINK;
return -1;
}
int _fork(void)
{
errno = EAGAIN;
return -1;
}
int _execve(char *name, char **argv, char **env)
{
errno = ENOMEM;
return -1;
}

869
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/CMSIS/include/cmsis_armcc.h Normal file
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@ -0,0 +1,869 @@
/**************************************************************************//**
* @file cmsis_armcc.h
* @brief CMSIS compiler ARMCC (Arm Compiler 5) header file
* @version V5.0.5
* @date 14. December 2018
******************************************************************************/
/*
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __CMSIS_ARMCC_H
#define __CMSIS_ARMCC_H
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
#error "Please use Arm Compiler Toolchain V4.0.677 or later!"
#endif
/* CMSIS compiler control architecture macros */
#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
(defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
#define __ARM_ARCH_6M__ 1
#endif
#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
#define __ARM_ARCH_7M__ 1
#endif
#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
#define __ARM_ARCH_7EM__ 1
#endif
/* __ARM_ARCH_8M_BASE__ not applicable */
/* __ARM_ARCH_8M_MAIN__ not applicable */
/* CMSIS compiler control DSP macros */
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __ARM_FEATURE_DSP 1
#endif
/* CMSIS compiler specific defines */
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE __inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE static __forceinline
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __declspec(noreturn)
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT __packed struct
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION __packed union
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
#define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
#endif
#ifndef __UNALIGNED_UINT16_WRITE
#define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
#define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
#endif
#ifndef __UNALIGNED_UINT32_WRITE
#define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
#define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
/* ########################### Core Function Access ########################### */
/** \ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
@{
*/
/**
\brief Enable IRQ Interrupts
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __enable_irq(); */
/**
\brief Disable IRQ Interrupts
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
/* intrinsic void __disable_irq(); */
/**
\brief Get Control Register
\details Returns the content of the Control Register.
\return Control Register value
*/
__STATIC_INLINE uint32_t __get_CONTROL(void)
{
register uint32_t __regControl __ASM("control");
return(__regControl);
}
/**
\brief Set Control Register
\details Writes the given value to the Control Register.
\param [in] control Control Register value to set
*/
__STATIC_INLINE void __set_CONTROL(uint32_t control)
{
register uint32_t __regControl __ASM("control");
__regControl = control;
}
/**
\brief Get IPSR Register
\details Returns the content of the IPSR Register.
\return IPSR Register value
*/
__STATIC_INLINE uint32_t __get_IPSR(void)
{
register uint32_t __regIPSR __ASM("ipsr");
return(__regIPSR);
}
/**
\brief Get APSR Register
\details Returns the content of the APSR Register.
\return APSR Register value
*/
__STATIC_INLINE uint32_t __get_APSR(void)
{
register uint32_t __regAPSR __ASM("apsr");
return(__regAPSR);
}
/**
\brief Get xPSR Register
\details Returns the content of the xPSR Register.
\return xPSR Register value
*/
__STATIC_INLINE uint32_t __get_xPSR(void)
{
register uint32_t __regXPSR __ASM("xpsr");
return(__regXPSR);
}
/**
\brief Get Process Stack Pointer
\details Returns the current value of the Process Stack Pointer (PSP).
\return PSP Register value
*/
__STATIC_INLINE uint32_t __get_PSP(void)
{
register uint32_t __regProcessStackPointer __ASM("psp");
return(__regProcessStackPointer);
}
/**
\brief Set Process Stack Pointer
\details Assigns the given value to the Process Stack Pointer (PSP).
\param [in] topOfProcStack Process Stack Pointer value to set
*/
__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
{
register uint32_t __regProcessStackPointer __ASM("psp");
__regProcessStackPointer = topOfProcStack;
}
/**
\brief Get Main Stack Pointer
\details Returns the current value of the Main Stack Pointer (MSP).
\return MSP Register value
*/
__STATIC_INLINE uint32_t __get_MSP(void)
{
register uint32_t __regMainStackPointer __ASM("msp");
return(__regMainStackPointer);
}
/**
\brief Set Main Stack Pointer
\details Assigns the given value to the Main Stack Pointer (MSP).
\param [in] topOfMainStack Main Stack Pointer value to set
*/
__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
{
register uint32_t __regMainStackPointer __ASM("msp");
__regMainStackPointer = topOfMainStack;
}
/**
\brief Get Priority Mask
\details Returns the current state of the priority mask bit from the Priority Mask Register.
\return Priority Mask value
*/
__STATIC_INLINE uint32_t __get_PRIMASK(void)
{
register uint32_t __regPriMask __ASM("primask");
return(__regPriMask);
}
/**
\brief Set Priority Mask
\details Assigns the given value to the Priority Mask Register.
\param [in] priMask Priority Mask
*/
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
{
register uint32_t __regPriMask __ASM("primask");
__regPriMask = (priMask);
}
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
/**
\brief Enable FIQ
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __enable_fault_irq __enable_fiq
/**
\brief Disable FIQ
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
Can only be executed in Privileged modes.
*/
#define __disable_fault_irq __disable_fiq
/**
\brief Get Base Priority
\details Returns the current value of the Base Priority register.
\return Base Priority register value
*/
__STATIC_INLINE uint32_t __get_BASEPRI(void)
{
register uint32_t __regBasePri __ASM("basepri");
return(__regBasePri);
}
/**
\brief Set Base Priority
\details Assigns the given value to the Base Priority register.
\param [in] basePri Base Priority value to set
*/
__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
{
register uint32_t __regBasePri __ASM("basepri");
__regBasePri = (basePri & 0xFFU);
}
/**
\brief Set Base Priority with condition
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
or the new value increases the BASEPRI priority level.
\param [in] basePri Base Priority value to set
*/
__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
{
register uint32_t __regBasePriMax __ASM("basepri_max");
__regBasePriMax = (basePri & 0xFFU);
}
/**
\brief Get Fault Mask
\details Returns the current value of the Fault Mask register.
\return Fault Mask register value
*/
__STATIC_INLINE uint32_t __get_FAULTMASK(void)
{
register uint32_t __regFaultMask __ASM("faultmask");
return(__regFaultMask);
}
/**
\brief Set Fault Mask
\details Assigns the given value to the Fault Mask register.
\param [in] faultMask Fault Mask value to set
*/
__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
{
register uint32_t __regFaultMask __ASM("faultmask");
__regFaultMask = (faultMask & (uint32_t)1U);
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/**
\brief Get FPSCR
\details Returns the current value of the Floating Point Status/Control register.
\return Floating Point Status/Control register value
*/
__STATIC_INLINE uint32_t __get_FPSCR(void)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
register uint32_t __regfpscr __ASM("fpscr");
return(__regfpscr);
#else
return(0U);
#endif
}
/**
\brief Set FPSCR
\details Assigns the given value to the Floating Point Status/Control register.
\param [in] fpscr Floating Point Status/Control value to set
*/
__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
register uint32_t __regfpscr __ASM("fpscr");
__regfpscr = (fpscr);
#else
(void)fpscr;
#endif
}
/*@} end of CMSIS_Core_RegAccFunctions */
/* ########################## Core Instruction Access ######################### */
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Access to dedicated instructions
@{
*/
/**
\brief No Operation
\details No Operation does nothing. This instruction can be used for code alignment purposes.
*/
#define __NOP __nop
/**
\brief Wait For Interrupt
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
*/
#define __WFI __wfi
/**
\brief Wait For Event
\details Wait For Event is a hint instruction that permits the processor to enter
a low-power state until one of a number of events occurs.
*/
#define __WFE __wfe
/**
\brief Send Event
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
*/
#define __SEV __sev
/**
\brief Instruction Synchronization Barrier
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
so that all instructions following the ISB are fetched from cache or memory,
after the instruction has been completed.
*/
#define __ISB() do {\
__schedule_barrier();\
__isb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Data Synchronization Barrier
\details Acts as a special kind of Data Memory Barrier.
It completes when all explicit memory accesses before this instruction complete.
*/
#define __DSB() do {\
__schedule_barrier();\
__dsb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Data Memory Barrier
\details Ensures the apparent order of the explicit memory operations before
and after the instruction, without ensuring their completion.
*/
#define __DMB() do {\
__schedule_barrier();\
__dmb(0xF);\
__schedule_barrier();\
} while (0U)
/**
\brief Reverse byte order (32 bit)
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
\param [in] value Value to reverse
\return Reversed value
*/
#define __REV __rev
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
\param [in] value Value to reverse
\return Reversed value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
{
rev16 r0, r0
bx lr
}
#endif
/**
\brief Reverse byte order (16 bit)
\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
\param [in] value Value to reverse
\return Reversed value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
{
revsh r0, r0
bx lr
}
#endif
/**
\brief Rotate Right in unsigned value (32 bit)
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
\param [in] op1 Value to rotate
\param [in] op2 Number of Bits to rotate
\return Rotated value
*/
#define __ROR __ror
/**
\brief Breakpoint
\details Causes the processor to enter Debug state.
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
\param [in] value is ignored by the processor.
If required, a debugger can use it to store additional information about the breakpoint.
*/
#define __BKPT(value) __breakpoint(value)
/**
\brief Reverse bit order of value
\details Reverses the bit order of the given value.
\param [in] value Value to reverse
\return Reversed value
*/
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __RBIT __rbit
#else
__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
{
uint32_t result;
uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
result = value; /* r will be reversed bits of v; first get LSB of v */
for (value >>= 1U; value != 0U; value >>= 1U)
{
result <<= 1U;
result |= value & 1U;
s--;
}
result <<= s; /* shift when v's highest bits are zero */
return result;
}
#endif
/**
\brief Count leading zeros
\details Counts the number of leading zeros of a data value.
\param [in] value Value to count the leading zeros
\return number of leading zeros in value
*/
#define __CLZ __clz
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
/**
\brief LDR Exclusive (8 bit)
\details Executes a exclusive LDR instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
#else
#define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief LDR Exclusive (16 bit)
\details Executes a exclusive LDR instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
#else
#define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief LDR Exclusive (32 bit)
\details Executes a exclusive LDR instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
#else
#define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
#endif
/**
\brief STR Exclusive (8 bit)
\details Executes a exclusive STR instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXB(value, ptr) __strex(value, ptr)
#else
#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief STR Exclusive (16 bit)
\details Executes a exclusive STR instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXH(value, ptr) __strex(value, ptr)
#else
#define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief STR Exclusive (32 bit)
\details Executes a exclusive STR instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
\return 0 Function succeeded
\return 1 Function failed
*/
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
#define __STREXW(value, ptr) __strex(value, ptr)
#else
#define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
#endif
/**
\brief Remove the exclusive lock
\details Removes the exclusive lock which is created by LDREX.
*/
#define __CLREX __clrex
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
#define __SSAT __ssat
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
#define __USAT __usat
/**
\brief Rotate Right with Extend (32 bit)
\details Moves each bit of a bitstring right by one bit.
The carry input is shifted in at the left end of the bitstring.
\param [in] value Value to rotate
\return Rotated value
*/
#ifndef __NO_EMBEDDED_ASM
__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
{
rrx r0, r0
bx lr
}
#endif
/**
\brief LDRT Unprivileged (8 bit)
\details Executes a Unprivileged LDRT instruction for 8 bit value.
\param [in] ptr Pointer to data
\return value of type uint8_t at (*ptr)
*/
#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
/**
\brief LDRT Unprivileged (16 bit)
\details Executes a Unprivileged LDRT instruction for 16 bit values.
\param [in] ptr Pointer to data
\return value of type uint16_t at (*ptr)
*/
#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
/**
\brief LDRT Unprivileged (32 bit)
\details Executes a Unprivileged LDRT instruction for 32 bit values.
\param [in] ptr Pointer to data
\return value of type uint32_t at (*ptr)
*/
#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
/**
\brief STRT Unprivileged (8 bit)
\details Executes a Unprivileged STRT instruction for 8 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRBT(value, ptr) __strt(value, ptr)
/**
\brief STRT Unprivileged (16 bit)
\details Executes a Unprivileged STRT instruction for 16 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRHT(value, ptr) __strt(value, ptr)
/**
\brief STRT Unprivileged (32 bit)
\details Executes a Unprivileged STRT instruction for 32 bit values.
\param [in] value Value to store
\param [in] ptr Pointer to location
*/
#define __STRT(value, ptr) __strt(value, ptr)
#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/**
\brief Signed Saturate
\details Saturates a signed value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (1..32)
\return Saturated value
*/
__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
{
if ((sat >= 1U) && (sat <= 32U))
{
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
const int32_t min = -1 - max ;
if (val > max)
{
return max;
}
else if (val < min)
{
return min;
}
}
return val;
}
/**
\brief Unsigned Saturate
\details Saturates an unsigned value.
\param [in] value Value to be saturated
\param [in] sat Bit position to saturate to (0..31)
\return Saturated value
*/
__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
if (sat <= 31U)
{
const uint32_t max = ((1U << sat) - 1U);
if (val > (int32_t)max)
{
return max;
}
else if (val < 0)
{
return 0U;
}
}
return (uint32_t)val;
}
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
/* ################### Compiler specific Intrinsics ########################### */
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
Access to dedicated SIMD instructions
@{
*/
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
#define __SADD8 __sadd8
#define __QADD8 __qadd8
#define __SHADD8 __shadd8
#define __UADD8 __uadd8
#define __UQADD8 __uqadd8
#define __UHADD8 __uhadd8
#define __SSUB8 __ssub8
#define __QSUB8 __qsub8
#define __SHSUB8 __shsub8
#define __USUB8 __usub8
#define __UQSUB8 __uqsub8
#define __UHSUB8 __uhsub8
#define __SADD16 __sadd16
#define __QADD16 __qadd16
#define __SHADD16 __shadd16
#define __UADD16 __uadd16
#define __UQADD16 __uqadd16
#define __UHADD16 __uhadd16
#define __SSUB16 __ssub16
#define __QSUB16 __qsub16
#define __SHSUB16 __shsub16
#define __USUB16 __usub16
#define __UQSUB16 __uqsub16
#define __UHSUB16 __uhsub16
#define __SASX __sasx
#define __QASX __qasx
#define __SHASX __shasx
#define __UASX __uasx
#define __UQASX __uqasx
#define __UHASX __uhasx
#define __SSAX __ssax
#define __QSAX __qsax
#define __SHSAX __shsax
#define __USAX __usax
#define __UQSAX __uqsax
#define __UHSAX __uhsax
#define __USAD8 __usad8
#define __USADA8 __usada8
#define __SSAT16 __ssat16
#define __USAT16 __usat16
#define __UXTB16 __uxtb16
#define __UXTAB16 __uxtab16
#define __SXTB16 __sxtb16
#define __SXTAB16 __sxtab16
#define __SMUAD __smuad
#define __SMUADX __smuadx
#define __SMLAD __smlad
#define __SMLADX __smladx
#define __SMLALD __smlald
#define __SMLALDX __smlaldx
#define __SMUSD __smusd
#define __SMUSDX __smusdx
#define __SMLSD __smlsd
#define __SMLSDX __smlsdx
#define __SMLSLD __smlsld
#define __SMLSLDX __smlsldx
#define __SEL __sel
#define __QADD __qadd
#define __QSUB __qsub
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
((int64_t)(ARG3) << 32U) ) >> 32U))
#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
/*@} end of group CMSIS_SIMD_intrinsics */
#endif /* __CMSIS_ARMCC_H */

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/**************************************************************************//**
* @file cmsis_compiler.h
* @brief CMSIS compiler generic header file
* @version V5.1.0
* @date 09. October 2018
******************************************************************************/
/*
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __CMSIS_COMPILER_H
#define __CMSIS_COMPILER_H
#include <stdint.h>
/*
* Arm Compiler 4/5
*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*
* Arm Compiler 6.6 LTM (armclang)
*/
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
#include "cmsis_armclang_ltm.h"
/*
* Arm Compiler above 6.10.1 (armclang)
*/
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
#include "cmsis_armclang.h"
/*
* GNU Compiler
*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*
* IAR Compiler
*/
#elif defined ( __ICCARM__ )
#include <cmsis_iccarm.h>
/*
* TI Arm Compiler
*/
#elif defined ( __TI_ARM__ )
#include <cmsis_ccs.h>
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __attribute__((packed))
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __attribute__((packed))
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
/*
* TASKING Compiler
*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __packed__
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __packed__
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __packed__
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
struct __packed__ T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __align(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
/*
* COSMIC Compiler
*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#ifndef __ASM
#define __ASM _asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
// NO RETURN is automatically detected hence no warning here
#define __NO_RETURN
#endif
#ifndef __USED
#warning No compiler specific solution for __USED. __USED is ignored.
#define __USED
#endif
#ifndef __WEAK
#define __WEAK __weak
#endif
#ifndef __PACKED
#define __PACKED @packed
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT @packed struct
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION @packed union
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
@packed struct T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
#define __ALIGNED(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#else
#error Unknown compiler.
#endif
#endif /* __CMSIS_COMPILER_H */

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/**************************************************************************//**
* @file cmsis_iccarm.h
* @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file
* @version V5.0.8
* @date 04. September 2018
******************************************************************************/
//------------------------------------------------------------------------------
//
// Copyright (c) 2017-2018 IAR Systems
//
// Licensed under the Apache License, Version 2.0 (the "License")
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
//
//------------------------------------------------------------------------------
#ifndef __CMSIS_ICCARM_H__
#define __CMSIS_ICCARM_H__
#ifndef __ICCARM__
#error This file should only be compiled by ICCARM
#endif
#pragma system_include
#define __IAR_FT _Pragma("inline=forced") __intrinsic
#if (__VER__ >= 8000000)
#define __ICCARM_V8 1
#else
#define __ICCARM_V8 0
#endif
#ifndef __ALIGNED
#if __ICCARM_V8
#define __ALIGNED(x) __attribute__((aligned(x)))
#elif (__VER__ >= 7080000)
/* Needs IAR language extensions */
#define __ALIGNED(x) __attribute__((aligned(x)))
#else
#warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
#define __ALIGNED(x)
#endif
#endif
/* Define compiler macros for CPU architecture, used in CMSIS 5.
*/
#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
/* Macros already defined */
#else
#if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
#define __ARM_ARCH_8M_MAIN__ 1
#elif defined(__ARM8M_BASELINE__)
#define __ARM_ARCH_8M_BASE__ 1
#elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
#if __ARM_ARCH == 6
#define __ARM_ARCH_6M__ 1
#elif __ARM_ARCH == 7
#if __ARM_FEATURE_DSP
#define __ARM_ARCH_7EM__ 1
#else
#define __ARM_ARCH_7M__ 1
#endif
#endif /* __ARM_ARCH */
#endif /* __ARM_ARCH_PROFILE == 'M' */
#endif
/* Alternativ core deduction for older ICCARM's */
#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
!defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
#if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
#define __ARM_ARCH_6M__ 1
#elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
#define __ARM_ARCH_7M__ 1
#elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
#define __ARM_ARCH_7EM__ 1
#elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
#define __ARM_ARCH_8M_BASE__ 1
#elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
#define __ARM_ARCH_8M_MAIN__ 1
#elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
#define __ARM_ARCH_8M_MAIN__ 1
#else
#error "Unknown target."
#endif
#endif
#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
#define __IAR_M0_FAMILY 1
#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
#define __IAR_M0_FAMILY 1
#else
#define __IAR_M0_FAMILY 0
#endif
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __NO_RETURN
#if __ICCARM_V8
#define __NO_RETURN __attribute__((__noreturn__))
#else
#define __NO_RETURN _Pragma("object_attribute=__noreturn")
#endif
#endif
#ifndef __PACKED
#if __ICCARM_V8
#define __PACKED __attribute__((packed, aligned(1)))
#else
/* Needs IAR language extensions */
#define __PACKED __packed
#endif
#endif
#ifndef __PACKED_STRUCT
#if __ICCARM_V8
#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
#else
/* Needs IAR language extensions */
#define __PACKED_STRUCT __packed struct
#endif
#endif
#ifndef __PACKED_UNION
#if __ICCARM_V8
#define __PACKED_UNION union __attribute__((packed, aligned(1)))
#else
/* Needs IAR language extensions */
#define __PACKED_UNION __packed union
#endif
#endif
#ifndef __RESTRICT
#if __ICCARM_V8
#define __RESTRICT __restrict
#else
/* Needs IAR language extensions */
#define __RESTRICT restrict
#endif
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __FORCEINLINE
#define __FORCEINLINE _Pragma("inline=forced")
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE
#endif
#ifndef __UNALIGNED_UINT16_READ
#pragma language=save
#pragma language=extended
__IAR_FT uint16_t __iar_uint16_read(void const *ptr)
{
return *(__packed uint16_t*)(ptr);
}
#pragma language=restore
#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
#pragma language=save
#pragma language=extended
__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
{
*(__packed uint16_t*)(ptr) = val;;
}
#pragma language=restore
#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
#endif
#ifndef __UNALIGNED_UINT32_READ
#pragma language=save
#pragma language=extended
__IAR_FT uint32_t __iar_uint32_read(void const *ptr)
{
return *(__packed uint32_t*)(ptr);
}
#pragma language=restore
#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
#pragma language=save
#pragma language=extended
__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
{
*(__packed uint32_t*)(ptr) = val;;
}
#pragma language=restore
#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
#pragma language=save
#pragma language=extended
__packed struct __iar_u32 { uint32_t v; };
#pragma language=restore
#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
#endif
#ifndef __USED
#if __ICCARM_V8
#define __USED __attribute__((used))
#else
#define __USED _Pragma("__root")
#endif
#endif
#ifndef __WEAK
#if __ICCARM_V8
#define __WEAK __attribute__((weak))
#else
#define __WEAK _Pragma("__weak")
#endif
#endif
#ifndef __ICCARM_INTRINSICS_VERSION__
#define __ICCARM_INTRINSICS_VERSION__ 0
#endif
#if __ICCARM_INTRINSICS_VERSION__ == 2
#if defined(__CLZ)
#undef __CLZ
#endif
#if defined(__REVSH)
#undef __REVSH
#endif
#if defined(__RBIT)
#undef __RBIT
#endif
#if defined(__SSAT)
#undef __SSAT
#endif
#if defined(__USAT)
#undef __USAT
#endif
#include "iccarm_builtin.h"
#define __disable_fault_irq __iar_builtin_disable_fiq
#define __disable_irq __iar_builtin_disable_interrupt
#define __enable_fault_irq __iar_builtin_enable_fiq
#define __enable_irq __iar_builtin_enable_interrupt
#define __arm_rsr __iar_builtin_rsr
#define __arm_wsr __iar_builtin_wsr
#define __get_APSR() (__arm_rsr("APSR"))
#define __get_BASEPRI() (__arm_rsr("BASEPRI"))
#define __get_CONTROL() (__arm_rsr("CONTROL"))
#define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#define __get_FPSCR() (__arm_rsr("FPSCR"))
#define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
#else
#define __get_FPSCR() ( 0 )
#define __set_FPSCR(VALUE) ((void)VALUE)
#endif
#define __get_IPSR() (__arm_rsr("IPSR"))
#define __get_MSP() (__arm_rsr("MSP"))
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
#define __get_MSPLIM() (0U)
#else
#define __get_MSPLIM() (__arm_rsr("MSPLIM"))
#endif
#define __get_PRIMASK() (__arm_rsr("PRIMASK"))
#define __get_PSP() (__arm_rsr("PSP"))
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
#define __get_PSPLIM() (0U)
#else
#define __get_PSPLIM() (__arm_rsr("PSPLIM"))
#endif
#define __get_xPSR() (__arm_rsr("xPSR"))
#define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
#define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
#define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
#define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE)))
#define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
#define __set_MSPLIM(VALUE) ((void)(VALUE))
#else
#define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
#endif
#define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
#define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
#define __set_PSPLIM(VALUE) ((void)(VALUE))
#else
#define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
#endif
#define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS"))
#define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE)))
#define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS"))
#define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
#define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS"))
#define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
#define __TZ_get_SP_NS() (__arm_rsr("SP_NS"))
#define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE)))
#define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS"))
#define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE)))
#define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS"))
#define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE)))
#define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS"))
#define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
#define __TZ_get_PSPLIM_NS() (0U)
#define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE))
#else
#define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS"))
#define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
#endif
#define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS"))
#define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE)))
#define __NOP __iar_builtin_no_operation
#define __CLZ __iar_builtin_CLZ
#define __CLREX __iar_builtin_CLREX
#define __DMB __iar_builtin_DMB
#define __DSB __iar_builtin_DSB
#define __ISB __iar_builtin_ISB
#define __LDREXB __iar_builtin_LDREXB
#define __LDREXH __iar_builtin_LDREXH
#define __LDREXW __iar_builtin_LDREX
#define __RBIT __iar_builtin_RBIT
#define __REV __iar_builtin_REV
#define __REV16 __iar_builtin_REV16
__IAR_FT int16_t __REVSH(int16_t val)
{
return (int16_t) __iar_builtin_REVSH(val);
}
#define __ROR __iar_builtin_ROR
#define __RRX __iar_builtin_RRX
#define __SEV __iar_builtin_SEV
#if !__IAR_M0_FAMILY
#define __SSAT __iar_builtin_SSAT
#endif
#define __STREXB __iar_builtin_STREXB
#define __STREXH __iar_builtin_STREXH
#define __STREXW __iar_builtin_STREX
#if !__IAR_M0_FAMILY
#define __USAT __iar_builtin_USAT
#endif
#define __WFE __iar_builtin_WFE
#define __WFI __iar_builtin_WFI
#if __ARM_MEDIA__
#define __SADD8 __iar_builtin_SADD8
#define __QADD8 __iar_builtin_QADD8
#define __SHADD8 __iar_builtin_SHADD8
#define __UADD8 __iar_builtin_UADD8
#define __UQADD8 __iar_builtin_UQADD8
#define __UHADD8 __iar_builtin_UHADD8
#define __SSUB8 __iar_builtin_SSUB8
#define __QSUB8 __iar_builtin_QSUB8
#define __SHSUB8 __iar_builtin_SHSUB8
#define __USUB8 __iar_builtin_USUB8
#define __UQSUB8 __iar_builtin_UQSUB8
#define __UHSUB8 __iar_builtin_UHSUB8
#define __SADD16 __iar_builtin_SADD16
#define __QADD16 __iar_builtin_QADD16
#define __SHADD16 __iar_builtin_SHADD16
#define __UADD16 __iar_builtin_UADD16
#define __UQADD16 __iar_builtin_UQADD16
#define __UHADD16 __iar_builtin_UHADD16
#define __SSUB16 __iar_builtin_SSUB16
#define __QSUB16 __iar_builtin_QSUB16
#define __SHSUB16 __iar_builtin_SHSUB16
#define __USUB16 __iar_builtin_USUB16
#define __UQSUB16 __iar_builtin_UQSUB16
#define __UHSUB16 __iar_builtin_UHSUB16
#define __SASX __iar_builtin_SASX
#define __QASX __iar_builtin_QASX
#define __SHASX __iar_builtin_SHASX
#define __UASX __iar_builtin_UASX
#define __UQASX __iar_builtin_UQASX
#define __UHASX __iar_builtin_UHASX
#define __SSAX __iar_builtin_SSAX
#define __QSAX __iar_builtin_QSAX
#define __SHSAX __iar_builtin_SHSAX
#define __USAX __iar_builtin_USAX
#define __UQSAX __iar_builtin_UQSAX
#define __UHSAX __iar_builtin_UHSAX
#define __USAD8 __iar_builtin_USAD8
#define __USADA8 __iar_builtin_USADA8
#define __SSAT16 __iar_builtin_SSAT16
#define __USAT16 __iar_builtin_USAT16
#define __UXTB16 __iar_builtin_UXTB16
#define __UXTAB16 __iar_builtin_UXTAB16
#define __SXTB16 __iar_builtin_SXTB16
#define __SXTAB16 __iar_builtin_SXTAB16
#define __SMUAD __iar_builtin_SMUAD
#define __SMUADX __iar_builtin_SMUADX
#define __SMMLA __iar_builtin_SMMLA
#define __SMLAD __iar_builtin_SMLAD
#define __SMLADX __iar_builtin_SMLADX
#define __SMLALD __iar_builtin_SMLALD
#define __SMLALDX __iar_builtin_SMLALDX
#define __SMUSD __iar_builtin_SMUSD
#define __SMUSDX __iar_builtin_SMUSDX
#define __SMLSD __iar_builtin_SMLSD
#define __SMLSDX __iar_builtin_SMLSDX
#define __SMLSLD __iar_builtin_SMLSLD
#define __SMLSLDX __iar_builtin_SMLSLDX
#define __SEL __iar_builtin_SEL
#define __QADD __iar_builtin_QADD
#define __QSUB __iar_builtin_QSUB
#define __PKHBT __iar_builtin_PKHBT
#define __PKHTB __iar_builtin_PKHTB
#endif
#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
#if __IAR_M0_FAMILY
/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
#define __CLZ __cmsis_iar_clz_not_active
#define __SSAT __cmsis_iar_ssat_not_active
#define __USAT __cmsis_iar_usat_not_active
#define __RBIT __cmsis_iar_rbit_not_active
#define __get_APSR __cmsis_iar_get_APSR_not_active
#endif
#if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
#define __get_FPSCR __cmsis_iar_get_FPSR_not_active
#define __set_FPSCR __cmsis_iar_set_FPSR_not_active
#endif
#ifdef __INTRINSICS_INCLUDED
#error intrinsics.h is already included previously!
#endif
#include <intrinsics.h>
#if __IAR_M0_FAMILY
/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
#undef __CLZ
#undef __SSAT
#undef __USAT
#undef __RBIT
#undef __get_APSR
__STATIC_INLINE uint8_t __CLZ(uint32_t data)
{
if (data == 0U) { return 32U; }
uint32_t count = 0U;
uint32_t mask = 0x80000000U;
while ((data & mask) == 0U)
{
count += 1U;
mask = mask >> 1U;
}
return count;
}
__STATIC_INLINE uint32_t __RBIT(uint32_t v)
{
uint8_t sc = 31U;
uint32_t r = v;
for (v >>= 1U; v; v >>= 1U)
{
r <<= 1U;
r |= v & 1U;
sc--;
}
return (r << sc);
}
__STATIC_INLINE uint32_t __get_APSR(void)
{
uint32_t res;
__asm("MRS %0,APSR" : "=r" (res));
return res;
}
#endif
#if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
#undef __get_FPSCR
#undef __set_FPSCR
#define __get_FPSCR() (0)
#define __set_FPSCR(VALUE) ((void)VALUE)
#endif
#pragma diag_suppress=Pe940
#pragma diag_suppress=Pe177
#define __enable_irq __enable_interrupt
#define __disable_irq __disable_interrupt
#define __NOP __no_operation
#define __get_xPSR __get_PSR
#if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
__IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
{
return __LDREX((unsigned long *)ptr);
}
__IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
{
return __STREX(value, (unsigned long *)ptr);
}
#endif
/* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
#if (__CORTEX_M >= 0x03)
__IAR_FT uint32_t __RRX(uint32_t value)
{
uint32_t result;
__ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
return(result);
}
__IAR_FT void __set_BASEPRI_MAX(uint32_t value)
{
__asm volatile("MSR BASEPRI_MAX,%0"::"r" (value));
}
#define __enable_fault_irq __enable_fiq
#define __disable_fault_irq __disable_fiq
#endif /* (__CORTEX_M >= 0x03) */
__IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
{
return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
}
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
__IAR_FT uint32_t __get_MSPLIM(void)
{
uint32_t res;
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
res = 0U;
#else
__asm volatile("MRS %0,MSPLIM" : "=r" (res));
#endif
return res;
}
__IAR_FT void __set_MSPLIM(uint32_t value)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure MSPLIM is RAZ/WI
(void)value;
#else
__asm volatile("MSR MSPLIM,%0" :: "r" (value));
#endif
}
__IAR_FT uint32_t __get_PSPLIM(void)
{
uint32_t res;
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
res = 0U;
#else
__asm volatile("MRS %0,PSPLIM" : "=r" (res));
#endif
return res;
}
__IAR_FT void __set_PSPLIM(uint32_t value)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)value;
#else
__asm volatile("MSR PSPLIM,%0" :: "r" (value));
#endif
}
__IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,CONTROL_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
{
__asm volatile("MSR CONTROL_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_PSP_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,PSP_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_PSP_NS(uint32_t value)
{
__asm volatile("MSR PSP_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_MSP_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,MSP_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_MSP_NS(uint32_t value)
{
__asm volatile("MSR MSP_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_SP_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,SP_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_SP_NS(uint32_t value)
{
__asm volatile("MSR SP_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,PRIMASK_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
{
__asm volatile("MSR PRIMASK_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,BASEPRI_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
{
__asm volatile("MSR BASEPRI_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
{
__asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value));
}
__IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
{
uint32_t res;
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
res = 0U;
#else
__asm volatile("MRS %0,PSPLIM_NS" : "=r" (res));
#endif
return res;
}
__IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
{
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
// without main extensions, the non-secure PSPLIM is RAZ/WI
(void)value;
#else
__asm volatile("MSR PSPLIM_NS,%0" :: "r" (value));
#endif
}
__IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
{
uint32_t res;
__asm volatile("MRS %0,MSPLIM_NS" : "=r" (res));
return res;
}
__IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
{
__asm volatile("MSR MSPLIM_NS,%0" :: "r" (value));
}
#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
#define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
#if __IAR_M0_FAMILY
__STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
{
if ((sat >= 1U) && (sat <= 32U))
{
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
const int32_t min = -1 - max ;
if (val > max)
{
return max;
}
else if (val < min)
{
return min;
}
}
return val;
}
__STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
{
if (sat <= 31U)
{
const uint32_t max = ((1U << sat) - 1U);
if (val > (int32_t)max)
{
return max;
}
else if (val < 0)
{
return 0U;
}
}
return (uint32_t)val;
}
#endif
#if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
__IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
{
uint32_t res;
__ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
return ((uint8_t)res);
}
__IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
{
uint32_t res;
__ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
return ((uint16_t)res);
}
__IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
{
uint32_t res;
__ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
return res;
}
__IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
{
__ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
}
__IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
{
__ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
}
__IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
{
__ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
}
#endif /* (__CORTEX_M >= 0x03) */
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
__IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
{
uint32_t res;
__ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return ((uint8_t)res);
}
__IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
{
uint32_t res;
__ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return ((uint16_t)res);
}
__IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
{
uint32_t res;
__ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return res;
}
__IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
{
__ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
}
__IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
{
__ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
}
__IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
{
__ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
}
__IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
{
uint32_t res;
__ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return ((uint8_t)res);
}
__IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
{
uint32_t res;
__ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return ((uint16_t)res);
}
__IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
{
uint32_t res;
__ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
return res;
}
__IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
{
uint32_t res;
__ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
return res;
}
__IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
{
uint32_t res;
__ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
return res;
}
__IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
{
uint32_t res;
__ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
return res;
}
#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
#undef __IAR_FT
#undef __IAR_M0_FAMILY
#undef __ICCARM_V8
#pragma diag_default=Pe940
#pragma diag_default=Pe177
#endif /* __CMSIS_ICCARM_H__ */

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/**************************************************************************//**
* @file cmsis_version.h
* @brief CMSIS Core(M) Version definitions
* @version V5.0.2
* @date 19. April 2017
******************************************************************************/
/*
* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CMSIS_VERSION_H
#define __CMSIS_VERSION_H
/* CMSIS Version definitions */
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
#endif

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samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/CMSIS/include/core_cm33.h Normal file
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346
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/CMSIS/include/mpu_armv8.h Normal file
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@ -0,0 +1,346 @@
/******************************************************************************
* @file mpu_armv8.h
* @brief CMSIS MPU API for Armv8-M and Armv8.1-M MPU
* @version V5.1.0
* @date 08. March 2019
******************************************************************************/
/*
* Copyright (c) 2017-2019 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_MPU_ARMV8_H
#define ARM_MPU_ARMV8_H
/** \brief Attribute for device memory (outer only) */
#define ARM_MPU_ATTR_DEVICE ( 0U )
/** \brief Attribute for non-cacheable, normal memory */
#define ARM_MPU_ATTR_NON_CACHEABLE ( 4U )
/** \brief Attribute for normal memory (outer and inner)
* \param NT Non-Transient: Set to 1 for non-transient data.
* \param WB Write-Back: Set to 1 to use write-back update policy.
* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
*/
#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
(((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGnRE (1U)
/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_nGRE (2U)
/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
#define ARM_MPU_ATTR_DEVICE_GRE (3U)
/** \brief Memory Attribute
* \param O Outer memory attributes
* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
*/
#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
/** \brief Normal memory non-shareable */
#define ARM_MPU_SH_NON (0U)
/** \brief Normal memory outer shareable */
#define ARM_MPU_SH_OUTER (2U)
/** \brief Normal memory inner shareable */
#define ARM_MPU_SH_INNER (3U)
/** \brief Memory access permissions
* \param RO Read-Only: Set to 1 for read-only memory.
* \param NP Non-Privileged: Set to 1 for non-privileged memory.
*/
#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
/** \brief Region Base Address Register value
* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
* \param SH Defines the Shareability domain for this memory region.
* \param RO Read-Only: Set to 1 for a read-only memory region.
* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
*/
#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
((BASE & MPU_RBAR_BASE_Msk) | \
((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
/** \brief Region Limit Address Register value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR(LIMIT, IDX) \
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#if defined(MPU_RLAR_PXN_Pos)
/** \brief Region Limit Address Register with PXN value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
* \param IDX The attribute index to be associated with this memory region.
*/
#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
((LIMIT & MPU_RLAR_LIMIT_Msk) | \
((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#endif
/**
* Struct for a single MPU Region
*/
typedef struct {
uint32_t RBAR; /*!< Region Base Address Register value */
uint32_t RLAR; /*!< Region Limit Address Register value */
} ARM_MPU_Region_t;
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
{
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
}
#ifdef MPU_NS
/** Enable the Non-secure MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
{
MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the Non-secure MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable_NS(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU_NS->CTRL &= ~MPU_CTRL_ENABLE_Msk;
}
#endif
/** Set the memory attribute encoding to the given MPU.
* \param mpu Pointer to the MPU to be configured.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
{
const uint8_t reg = idx / 4U;
const uint32_t pos = ((idx % 4U) * 8U);
const uint32_t mask = 0xFFU << pos;
if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
return; // invalid index
}
mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
}
/** Set the memory attribute encoding.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
{
ARM_MPU_SetMemAttrEx(MPU, idx, attr);
}
#ifdef MPU_NS
/** Set the memory attribute encoding to the Non-secure MPU.
* \param idx The attribute index to be set [0-7]
* \param attr The attribute value to be set.
*/
__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
{
ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
}
#endif
/** Clear and disable the given MPU region of the given MPU.
* \param mpu Pointer to MPU to be used.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
{
mpu->RNR = rnr;
mpu->RLAR = 0U;
}
/** Clear and disable the given MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
{
ARM_MPU_ClrRegionEx(MPU, rnr);
}
#ifdef MPU_NS
/** Clear and disable the given Non-secure MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
{
ARM_MPU_ClrRegionEx(MPU_NS, rnr);
}
#endif
/** Configure the given MPU region of the given MPU.
* \param mpu Pointer to MPU to be used.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
mpu->RNR = rnr;
mpu->RBAR = rbar;
mpu->RLAR = rlar;
}
/** Configure the given MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
}
#ifdef MPU_NS
/** Configure the given Non-secure MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
{
ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);
}
#endif
/** Memcopy with strictly ordered memory access, e.g. for register targets.
* \param dst Destination data is copied to.
* \param src Source data is copied from.
* \param len Amount of data words to be copied.
*/
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{
uint32_t i;
for (i = 0U; i < len; ++i)
{
dst[i] = src[i];
}
}
/** Load the given number of MPU regions from a table to the given MPU.
* \param mpu Pointer to the MPU registers to be used.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
if (cnt == 1U) {
mpu->RNR = rnr;
ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
} else {
uint32_t rnrBase = rnr & ~(MPU_TYPE_RALIASES-1U);
uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
table += c;
cnt -= c;
rnrOffset = 0U;
rnrBase += MPU_TYPE_RALIASES;
mpu->RNR = rnrBase;
}
ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
}
}
/** Load the given number of MPU regions from a table.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU, rnr, table, cnt);
}
#ifdef MPU_NS
/** Load the given number of MPU regions from a table to the Non-secure MPU.
* \param rnr First region number to be configured.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt)
{
ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
}
#endif
#endif

70
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/CMSIS/include/tz_context.h Normal file
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@ -0,0 +1,70 @@
/******************************************************************************
* @file tz_context.h
* @brief Context Management for Armv8-M TrustZone
* @version V1.0.1
* @date 10. January 2018
******************************************************************************/
/*
* Copyright (c) 2017-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef TZ_CONTEXT_H
#define TZ_CONTEXT_H
#include <stdint.h>
#ifndef TZ_MODULEID_T
#define TZ_MODULEID_T
/// \details Data type that identifies secure software modules called by a process.
typedef uint32_t TZ_ModuleId_t;
#endif
/// \details TZ Memory ID identifies an allocated memory slot.
typedef uint32_t TZ_MemoryId_t;
/// Initialize secure context memory system
/// \return execution status (1: success, 0: error)
uint32_t TZ_InitContextSystem_S (void);
/// Allocate context memory for calling secure software modules in TrustZone
/// \param[in] module identifies software modules called from non-secure mode
/// \return value != 0 id TrustZone memory slot identifier
/// \return value 0 no memory available or internal error
TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
/// Load secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
/// Store secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
#endif // TZ_CONTEXT_H

2
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/GD32F5xx_standard_peripheral/Include/gd32f5xx_fmc.h
View File

@ -522,7 +522,7 @@ fmc_state_enum fmc_bank0_erase(void);
/* FMC erase whole bank1(include bank1_ex) */
fmc_state_enum fmc_bank1_erase(void);
/* FMC program a double word at the corresponding address */
fmc_state_enum fmc_doubleword_program(uint32_t address, uint64_t data);
fmc_state_enum fmc_doubleword_program(uint32_t address, uint32_t *data);
/* FMC program a word at the corresponding address */
fmc_state_enum fmc_word_program(uint32_t address, uint32_t data);
/* FMC program a half word at the corresponding address */

8
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/GD32F5xx_standard_peripheral/Source/gd32f5xx_fmc.c
View File

@ -301,7 +301,7 @@ fmc_state_enum fmc_bank1_erase(void)
\arg FMC_LDECCDET: two bits ECC error when load code from flash/OTP1/bootloader
\arg FMC_TOERR: timeout error
*/
fmc_state_enum fmc_doubleword_program(uint32_t address, uint64_t data)
fmc_state_enum fmc_doubleword_program(uint32_t address, uint32_t *data)
{
fmc_state_enum fmc_state = FMC_READY;
@ -314,8 +314,8 @@ fmc_state_enum fmc_doubleword_program(uint32_t address, uint64_t data)
/* set the PG bit to start program */
FMC_CTL |= FMC_CTL_PG;
REG32(address) = (uint32_t)(data & 0xFFFFFFFFU);
REG32(address + 4U) = (uint32_t)((data >> 32U) & 0xFFFFFFFFU);
REG32(address) = data[0];
REG32(address + 4U) = data[1];
/* wait for the FMC ready */
fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
@ -1578,7 +1578,7 @@ efuse_state_enum efuse_ready_wait(uint32_t efuse_flag, uint32_t timeout)
} else if(EFUSE_CS & EFUSE_CS_OVBERIF) {
efuse_state = EFUSE_OBER;
} else {
}
timeout--;
} while((EFUSE_BUSY == efuse_state) && (0U != timeout));

34
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/GD32F5xx_usb_library/device/class/cdc/Include/cdc_acm_core.h
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@ -8,27 +8,27 @@
/*
Copyright (c) 2023, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
OF SUCH DAMAGE.
*/
@ -58,8 +58,8 @@ extern usb_class_core cdc_class;
/* check CDC ACM is ready for data transfer */
uint8_t cdc_acm_check_ready(usb_dev *udev);
/* send CDC ACM data */
void cdc_acm_data_send(usb_dev *udev, uint8_t *buf, uint8_t len, uint32_t *readLen);
void cdc_acm_data_send(usb_dev *udev, const uint8_t *buf, uint8_t len, uint32_t *readLen);
/* receive CDC ACM data */
void cdc_acm_data_receive(usb_dev *udev, uint8_t *buf, uint8_t len, uint32_t *readLen);
void cdc_acm_data_receive(usb_dev *udev, uint8_t *buf, uint32_t len, uint32_t *readLen);
#endif /* __CDC_ACM_CORE_H */

10
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/GD32F5xx_usb_library/device/class/cdc/Source/cdc_acm_core.c
View File

@ -303,7 +303,7 @@ uint8_t cdc_acm_check_ready(usb_dev *udev)
\param[out] none
\retval USB device operation status
*/
void cdc_acm_data_send(usb_dev *udev, uint8_t *buf, uint8_t len, uint32_t *readLen)
void cdc_acm_data_send(usb_dev *udev, const uint8_t *buf, uint8_t len, uint32_t *readLen)
{
usb_cdc_handler *cdc = (usb_cdc_handler *)udev->dev.class_data[CDC_COM_INTERFACE];
uint32_t cnt = 0;
@ -312,15 +312,12 @@ void cdc_acm_data_send(usb_dev *udev, uint8_t *buf, uint8_t len, uint32_t *readL
usbd_ep_send (udev, CDC_DATA_IN_EP, buf, len);
while(1) {
Osal_TaskSleepMs(1);
if (cdc->packet_sent == 1) {
*readLen = len;
break;
}
if (cnt++ >= 100)
if (cnt++ >= 10000)
{
cnt = 0;
*readLen = 0;
break;
}
@ -334,7 +331,7 @@ void cdc_acm_data_send(usb_dev *udev, uint8_t *buf, uint8_t len, uint32_t *readL
\param[out] none
\retval USB device operation status
*/
void cdc_acm_data_receive(usb_dev *udev, uint8_t *buf, uint8_t len, uint32_t *readLen)
void cdc_acm_data_receive(usb_dev *udev, uint8_t *buf, uint32_t len, uint32_t *readLen)
{
usb_cdc_handler *cdc = (usb_cdc_handler *)udev->dev.class_data[CDC_COM_INTERFACE];
@ -342,7 +339,6 @@ void cdc_acm_data_receive(usb_dev *udev, uint8_t *buf, uint8_t len, uint32_t *re
usbd_ep_recev(udev, CDC_DATA_OUT_EP, (uint8_t*)(cdc->data), USB_CDC_DATA_PACKET_SIZE);
while(1) {
Osal_TaskSleepMs(1);
if (cdc->packet_receive == 1) {
memcpy(buf, cdc->data, cdc->receive_length);
*readLen = cdc->receive_length;

32
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/GD32F5xx_usb_library/device/core/Include/usbd_core.h
View File

@ -8,27 +8,27 @@
/*
Copyright (c) 2023, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
OF SUCH DAMAGE.
*/
@ -88,7 +88,7 @@ uint32_t usbd_ep_clear (usb_core_driver *udev, uint8_t ep_addr);
/* endpoint prepare to receive data */
uint32_t usbd_ep_recev (usb_core_driver *udev, uint8_t ep_addr, uint8_t *pbuf, uint32_t len);
/* endpoint prepare to transmit data */
uint32_t usbd_ep_send (usb_core_driver *udev, uint8_t ep_addr, uint8_t *pbuf, uint32_t len);
uint32_t usbd_ep_send (usb_core_driver *udev, uint8_t ep_addr, const uint8_t *pbuf, uint32_t len);
/* set an endpoint to STALL status */
uint32_t usbd_ep_stall (usb_core_driver *udev, uint8_t ep_addr);
/* clear endpoint STALLed status */

32
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/GD32F5xx_usb_library/device/core/Source/usbd_core.c
View File

@ -8,27 +8,27 @@
/*
Copyright (c) 2023, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
OF SUCH DAMAGE.
*/
@ -193,7 +193,7 @@ uint32_t usbd_ep_recev (usb_core_driver *udev, uint8_t ep_addr, uint8_t *pbuf, u
\param[out] none
\retval none
*/
uint32_t usbd_ep_send (usb_core_driver *udev, uint8_t ep_addr, uint8_t *pbuf, uint32_t len)
uint32_t usbd_ep_send (usb_core_driver *udev, uint8_t ep_addr, const uint8_t *pbuf, uint32_t len)
{
usb_transc *transc = &udev->dev.transc_in[EP_ID(ep_addr)];

38
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/GD32F5xx_usb_library/driver/Include/drv_usb_core.h
View File

@ -8,27 +8,27 @@
/*
Copyright (c) 2023, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
OF SUCH DAMAGE.
*/
@ -144,7 +144,7 @@ typedef struct
uint16_t max_len; /*!< Maximum packet length */
/* transaction level variables */
uint8_t *xfer_buf; /*!< transmit buffer */
uint8_t *xfer_buf; /*!< transmit buffer */
uint32_t xfer_len; /*!< transmit buffer length */
uint32_t xfer_count; /*!< transmit buffer count */
@ -168,7 +168,7 @@ typedef struct _usb_class_core
uint8_t (*set_intf) (usb_dev *udev, usb_req *req); /*!< device set interface callback */
uint8_t (*ctlx_in) (usb_dev *udev); /*!< device contrl in callback */
uint8_t (*ctlx_out) (usb_dev *udev);
uint8_t (*ctlx_out) (usb_dev *udev);
uint8_t (*data_in) (usb_dev *udev, uint8_t ep_num); /*!< device data in handler */
uint8_t (*data_out) (usb_dev *udev, uint8_t ep_num); /*!< device data out handler */
@ -293,9 +293,9 @@ typedef struct _usb_core_driver
__STATIC_INLINE uint32_t usb_coreintr_get(usb_core_regs *usb_regs)
{
uint32_t reg_data = usb_regs->gr->GINTEN;
reg_data &= usb_regs->gr->GINTF;
return reg_data;
}

30
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/drivers/GD32F5xx_usb_library/driver/Source/drv_usbd_int.c
View File

@ -8,27 +8,27 @@
/*
Copyright (c) 2023, GigaDevice Semiconductor Inc.
Redistribution and use in source and binary forms, with or without modification,
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
OF SUCH DAMAGE.
*/

499
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/hal/hal_i2c.c Normal file
View File

@ -0,0 +1,499 @@
/**
********************************************************************
* @file hal_i2c.c
* @brief
*
* @copyright (c) 2025 DJI. All rights reserved.
*
* All information contained herein is, and remains, the property of DJI.
* The intellectual and technical concepts contained herein are proprietary
* to DJI and may be covered by U.S. and foreign patents, patents in process,
* and protected by trade secret or copyright law. Dissemination of this
* information, including but not limited to data and other proprietary
* material(s) incorporated within the information, in any form, is strictly
* prohibited without the express written consent of DJI.
*
* If you receive this source code without DJI’s authorization, you may not
* further disseminate the information, and you must immediately remove the
* source code and notify DJI of its removal. DJI reserves the right to pursue
* legal actions against you for any loss(es) or damage(s) caused by your
* failure to do so.
*
*********************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "dji_platform.h"
#include "dji_logger.h"
#include "hal_i2c.h"
#include "gd32f5xx.h"
/* Private constants ---------------------------------------------------------*/
#define HAL_I2C_MASTER_COMM_TIMEOUT_MS (50)
#define I2C_DEVICE_RESET_TIME_MS (50)
#define I2C_DEVICE_WAIT_RESET_TIME_MS (100)
#define RST_GPIO_PIN GPIO_PIN_5
#define RST_GPIO_PORT GPIOA
#define RST_GPIO_CLK_ENABLE() rcu_periph_clock_enable(GPIOA)
#define I2C_DEVICE_CLK_ENABLE() rcu_periph_clock_enable(RCU_I2C2)
#define I2C_DEVICE_NUM I2C2
#define I2C_SCL_GPIO_PIN GPIO_PIN_8
#define I2C_SCL_GPIO_PORT GPIOA
#define I2C_SCL_GPIO_AF GPIO_AF_4
#define I2C_SDA_GPIO_PIN GPIO_PIN_9
#define I2C_SDA_GPIO_PORT GPIOC
#define I2C_SDA_GPIO_AF GPIO_AF_4
#define I2C_GPIO_CLK_ENABLE() \
do { \
rcu_periph_clock_enable(I2C_SCL_GPIO_PORT); \
rcu_periph_clock_enable(I2C_SDA_GPIO_PORT); \
} while(0)
#define USER_UTIL_UNUSED(x) ((x) = (x))
/* Private types -------------------------------------------------------------*/
#define I2C_TIME_OUT (uint16_t)(100000)
#define I2C_OK 1
#define I2C_FAIL 0
#define I2C_END 1
typedef enum {
I2C_START = 0,
I2C_SEND_ADDRESS,
I2C_CLEAR_ADDRESS_FLAG,
I2C_TRANSMIT_DATA,
I2C_STOP
} i2c_process_enum;
/* Private values -------------------------------------------------------------*/
/* Private functions declaration ---------------------------------------------*/
static T_DjiReturnCode GD32_I2C_Master_Transmit(uint32_t i2cPerph, uint16_t devAddress, const uint8_t *dataBuf, uint32_t len, uint32_t *realLen, const uint32_t timeout);
static T_DjiReturnCode GD32_I2C_Master_Receive(uint32_t i2cPerph, uint16_t devAddress, uint8_t *dataBuf, uint32_t size, const uint32_t timeout);
/* Exported functions definition ---------------------------------------------*/
void i2c_bus_reset(void)
{
i2c_deinit(I2C_DEVICE_NUM);
/* configure SDA/SCL for GPIO */
gpio_bit_reset(I2C_SCL_GPIO_PORT, I2C_SCL_GPIO_PIN);
gpio_bit_reset(I2C_SDA_GPIO_PORT, I2C_SDA_GPIO_PIN);
gpio_output_options_set(I2C_SCL_GPIO_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, I2C_SCL_GPIO_PIN);
gpio_output_options_set(I2C_SDA_GPIO_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, I2C_SDA_GPIO_PIN);
__NOP();
__NOP();
__NOP();
__NOP();
__NOP();
gpio_bit_set(I2C_SCL_GPIO_PORT, I2C_SCL_GPIO_PIN);
__NOP();
__NOP();
__NOP();
__NOP();
__NOP();
gpio_bit_set(I2C_SDA_GPIO_PORT, I2C_SDA_GPIO_PIN);
/* connect I2C_SCL_PIN to I2C_SCL */
/* connect I2C_SDA_PIN to I2C_SDA */
gpio_output_options_set(I2C_SCL_GPIO_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SCL_GPIO_PIN);
gpio_output_options_set(I2C_SDA_GPIO_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SDA_GPIO_PIN);
/* configure the I2CX interface */
/* enable I2C clock */
I2C_DEVICE_CLK_ENABLE();
/* configure I2C clock */
i2c_clock_config(I2C_DEVICE_NUM, 100000, I2C_DTCY_2);
i2c_stretch_scl_low_config(I2C_DEVICE_NUM, 1); // disable stretching
/* configure I2C address */
i2c_mode_addr_config(I2C_DEVICE_NUM, I2C_I2CMODE_ENABLE, I2C_ADDFORMAT_7BITS, (0x2A) << 1);
/* enable I2C_DEVICE_NUM */
i2c_enable(I2C_DEVICE_NUM);
/* enable acknowledge */
i2c_ack_config(I2C_DEVICE_NUM, I2C_ACK_ENABLE);
}
T_DjiReturnCode HalI2c_Init(T_DjiHalI2cConfig i2cConfig, T_DjiI2cHandle *i2cHandle)
{
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
// uint8_t disableStanby[] = {0x80, 0xF7, 0x0C, 0x01, 0x01, 0x01};
// uint32_t realLen = 0;
/**
* I2C2 GPIO Configuration
* PA8 ------> I2C2_SCL
* PC9 ------> I2C2_SDA
* PA5 ------> RST
*/
RST_GPIO_CLK_ENABLE();
gpio_mode_set(RST_GPIO_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, RST_GPIO_PIN);
gpio_output_options_set(RST_GPIO_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, RST_GPIO_PIN);
/* Reset the I2C chip. */
gpio_bit_reset(RST_GPIO_PORT, RST_GPIO_PIN);
osalHandler->TaskSleepMs(I2C_DEVICE_RESET_TIME_MS);
gpio_bit_set(RST_GPIO_PORT, RST_GPIO_PIN);
osalHandler->TaskSleepMs(I2C_DEVICE_RESET_TIME_MS);
/* enable I2C GPIO clock */
I2C_GPIO_CLK_ENABLE();
/* connect I2C_SCL_PIN to I2C_SCL */
gpio_af_set(I2C_SCL_GPIO_PORT, I2C_SCL_GPIO_AF, I2C_SCL_GPIO_PIN);
/* connect I2C_SDA_PIN to I2C_SDA */
gpio_af_set(I2C_SDA_GPIO_PORT, I2C_SDA_GPIO_AF, I2C_SDA_GPIO_PIN);
/* configure GPIO pins of I2C */
gpio_mode_set(I2C_SCL_GPIO_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, I2C_SCL_GPIO_PIN);
gpio_output_options_set(I2C_SCL_GPIO_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SCL_GPIO_PIN);
gpio_mode_set(I2C_SDA_GPIO_PORT, GPIO_MODE_AF, GPIO_PUPD_PULLUP, I2C_SDA_GPIO_PIN);
gpio_output_options_set(I2C_SDA_GPIO_PORT, GPIO_OTYPE_OD, GPIO_OSPEED_50MHZ, I2C_SDA_GPIO_PIN);
i2c_deinit(I2C_DEVICE_NUM);
/* enable I2C clock */
I2C_DEVICE_CLK_ENABLE();
/* configure I2C clock */
i2c_clock_config(I2C_DEVICE_NUM, i2cConfig.i2cSpeed, I2C_DTCY_2);
i2c_stretch_scl_low_config(I2C_DEVICE_NUM, 1); // disable stretching
/* configure I2C address */
i2c_mode_addr_config(I2C_DEVICE_NUM, I2C_I2CMODE_ENABLE, I2C_ADDFORMAT_7BITS, i2cConfig.devAddress << 1);
/* enable I2C_DEVICE_NUM */
i2c_enable(I2C_DEVICE_NUM);
/* enable acknowledge */
i2c_ack_config(I2C_DEVICE_NUM, I2C_ACK_ENABLE);
// GD32_I2C_Master_Transmit(I2C_DEVICE_NUM, i2cConfig.devAddress, (const uint8_t *)disableStanby, sizeof(disableStanby), &realLen, I2C_TIME_OUT);
return DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS;
}
T_DjiReturnCode HalI2c_DeInit(T_DjiI2cHandle i2cHandle)
{
USER_UTIL_UNUSED(i2cHandle);
i2c_deinit(I2C_DEVICE_NUM);
return DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS;
}
T_DjiReturnCode HalI2c_WriteData(T_DjiI2cHandle i2cHandle, uint16_t devAddress, const uint8_t *buf,
uint32_t len, uint32_t *realLen)
{
T_DjiReturnCode returnCode = 0;
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
char strBuf[128] = {0};
int32_t charCnt = 0;
int32_t charIdx = 0;
for (int32_t i = 0; i < len; i++) {
charCnt = sprintf(&strBuf[charIdx], " %02x", buf[i]);
charIdx += charCnt;
}
returnCode = GD32_I2C_Master_Transmit(I2C_DEVICE_NUM, devAddress, buf, len, realLen, I2C_TIME_OUT);
return returnCode;
}
T_DjiReturnCode HalI2c_ReadData(T_DjiI2cHandle i2cHandle, uint16_t devAddress, uint8_t *buf,
uint32_t len, uint32_t *realLen)
{
T_DjiReturnCode returnCode;
char strBuf[128] = {0};
int32_t charCnt = 0;
int32_t charIdx = 0;
returnCode = GD32_I2C_Master_Receive(I2C_DEVICE_NUM, devAddress, buf, len, I2C_TIME_OUT);
if (returnCode != DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
*realLen = 0;
} else {
*realLen = len;
}
if (returnCode == DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS) {
for (int32_t i = 0; (i < *realLen) && (i < 30); i++) {
charCnt = sprintf(&strBuf[charIdx], " %02x", buf[i]);
charIdx += charCnt;
}
strBuf[30] = 0;
}
return returnCode;
}
/* Private functions definition-----------------------------------------------*/
static T_DjiReturnCode GD32_I2C_Master_Transmit(uint32_t i2cPerph, uint16_t devAddress, const uint8_t *dataBuf, uint32_t len, uint32_t *realLen, const uint32_t timeout)
{
uint8_t state = I2C_START;
uint16_t timeCnt = 0;
uint8_t i2c_timeout_flag = 0;
T_DjiOsalHandler *osalHandler = DjiPlatform_GetOsalHandler();
*realLen = 0;
while(!(i2c_timeout_flag)) {
switch(state) {
case I2C_START: {
/* i2c master sends start signal only when the bus is idle */
timeCnt = 0;
while(i2c_flag_get(i2cPerph, I2C_FLAG_I2CBSY) && (timeCnt < timeout)) {
timeCnt++;
}
if(timeCnt < timeout) {
i2c_start_on_bus(i2cPerph);
timeCnt = 0;
state = I2C_SEND_ADDRESS;
} else {
timeCnt = 0;
state = I2C_START;
USER_LOG_INFO("i2c bus is busy in WRITE!\r\n");
while (1) {
osalHandler->TaskSleepMs(8000);
}
}
break;
}
case I2C_SEND_ADDRESS: {
/* i2c master sends START signal successfully */
while((!i2c_flag_get(i2cPerph, I2C_FLAG_SBSEND)) && (timeCnt < timeout)) {
timeCnt++;
}
if(timeCnt < timeout) {
i2c_master_addressing(i2cPerph, devAddress << 1, I2C_TRANSMITTER);
timeCnt = 0;
state = I2C_CLEAR_ADDRESS_FLAG;
} else {
timeCnt = 0;
state = I2C_START;
}
break;
}
case I2C_CLEAR_ADDRESS_FLAG: {
/* address flag set means i2c slave sends ACK */
timeCnt = 0;
while((!i2c_flag_get(i2cPerph, I2C_FLAG_ADDSEND)) && (timeCnt < timeout)) {
timeCnt++;
}
if(timeCnt < timeout) {
i2c_flag_clear(i2cPerph, I2C_FLAG_ADDSEND);
timeCnt = 0;
state = I2C_TRANSMIT_DATA;
} else {
timeCnt = 0;
state = I2C_START;
}
break;
}
case I2C_TRANSMIT_DATA: {
/* wait until the transmit data buffer is empty */
while((!i2c_flag_get(i2cPerph, I2C_FLAG_TBE)) && (timeCnt < timeout)) {
timeCnt++;
}
if(timeCnt < timeout) {
timeCnt = 0;
} else {
timeCnt = 0;
state = I2C_START;
break;
}
*realLen = 0;
while(len--) {
i2c_data_transmit(i2cPerph, *dataBuf);
/* point to the next byte to be written */
dataBuf++;
*realLen += 1;
/* wait until BTC bit is set */
while((!i2c_flag_get(i2cPerph, I2C_FLAG_BTC)) && (timeCnt < timeout)) {
timeCnt++;
}
if(timeCnt < timeout) {
timeCnt = 0;
} else {
timeCnt = 0;
state = I2C_START;
break;
}
}
timeCnt = 0;
state = I2C_STOP;
break;
}
case I2C_STOP: {
/* send a stop condition to I2C bus */
i2c_stop_on_bus(i2cPerph);
/* i2c master sends STOP signal successfully */
while((I2C_CTL0(i2cPerph) & I2C_CTL0_STOP) && (timeCnt < timeout)) {
timeCnt++;
}
if(timeCnt < timeout) {
timeCnt = 0;
state = I2C_END;
i2c_timeout_flag = I2C_OK;
} else {
timeCnt = 0;
state = I2C_START;
}
break;
}
default: {
state = I2C_START;
i2c_timeout_flag = I2C_OK;
timeCnt = 0;
break;
}
}
}
return DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS;
}
static T_DjiReturnCode GD32_I2C_Master_Receive(uint32_t i2cPerph, uint16_t devAddress, uint8_t *dataBuf, uint32_t size, uint32_t timeout)
{
uint8_t state = I2C_START;
uint8_t read_cycle = 0;
uint16_t timeCnt = 0;
uint8_t i2c_timeout_flag = 0;
/* enable acknowledge */
i2c_ack_config(i2cPerph, I2C_ACK_ENABLE);
while(!(i2c_timeout_flag)) {
switch(state) {
case I2C_START: {
if(RESET == read_cycle) {
/* i2c master sends start signal only when the bus is idle */
while(i2c_flag_get(i2cPerph, I2C_FLAG_I2CBSY) && (timeCnt < timeout)) {
timeCnt++;
}
if(timeCnt < timeout) {
/* whether to send ACK or not for the next byte */
if(2 == size) {
i2c_ackpos_config(i2cPerph, I2C_ACKPOS_NEXT);
}
} else {
// i2c_bus_reset();
timeCnt = 0;
state = I2C_START;
}
}
/* send the start signal */
i2c_start_on_bus(i2cPerph);
timeCnt = 0;
state = I2C_SEND_ADDRESS;
break;
}
case I2C_SEND_ADDRESS: {
/* i2c master sends START signal successfully */
while((!i2c_flag_get(i2cPerph, I2C_FLAG_SBSEND)) && (timeCnt < timeout)) {
timeCnt++;
}
if(timeCnt < timeout) {
i2c_master_addressing(i2cPerph, devAddress << 1, I2C_RECEIVER);
if(size < 3) {
/* disable acknowledge */
i2c_ack_config(i2cPerph, I2C_ACK_DISABLE);
}
state = I2C_CLEAR_ADDRESS_FLAG;
// }
timeCnt = 0;
} else {
timeCnt = 0;
state = I2C_START;
read_cycle = 0;
}
break;
}
case I2C_CLEAR_ADDRESS_FLAG: {
/* address flag set means i2c slave sends ACK */
while((!i2c_flag_get(i2cPerph, I2C_FLAG_ADDSEND)) && (timeCnt < timeout)) {
timeCnt++;
}
if(timeCnt < timeout) {
i2c_flag_clear(i2cPerph, I2C_FLAG_ADDSEND);
if((SET == read_cycle) && (1 == size)) {
/* send a stop condition to I2C bus */
i2c_stop_on_bus(i2cPerph);
}
timeCnt = 0;
state = I2C_TRANSMIT_DATA;
} else {
timeCnt = 0;
state = I2C_START;
read_cycle = 0;
}
break;
}
case I2C_TRANSMIT_DATA: {
timeCnt = 0;
while(size) {
timeCnt++;
if(3 == size) {
/* wait until BTC bit is set */
while(!i2c_flag_get(i2cPerph, I2C_FLAG_BTC));
/* disable acknowledge */
i2c_ack_config(i2cPerph, I2C_ACK_DISABLE);
}
if(2 == size) {
/* wait until BTC bit is set */
while(!i2c_flag_get(i2cPerph, I2C_FLAG_BTC));
/* send a stop condition to I2C bus */
i2c_stop_on_bus(i2cPerph);
}
/* wait until RBNE bit is set */
if(i2c_flag_get(i2cPerph, I2C_FLAG_RBNE)) {
/* read a byte from the EEPROM */
*dataBuf = i2c_data_receive(i2cPerph);
/* point to the next location where the byte read will be saved */
dataBuf++;
/* decrement the read bytes counter */
size--;
timeCnt = 0;
}
if(timeCnt > timeout) {
timeCnt = 0;
state = I2C_START;
read_cycle = 0;
}
}
timeCnt = 0;
state = I2C_STOP;
break;
}
case I2C_STOP: {
/* i2c master sends STOP signal successfully */
while((I2C_CTL0(i2cPerph) & I2C_CTL0_STOP) && (timeCnt < timeout)) {
timeCnt++;
}
if(timeCnt < timeout) {
timeCnt = 0;
state = I2C_END;
i2c_timeout_flag = I2C_OK;
} else {
timeCnt = 0;
state = I2C_START;
read_cycle = 0;
}
break;
}
default: {
state = I2C_START;
read_cycle = 0;
i2c_timeout_flag = I2C_OK;
timeCnt = 0;
break;
}
}
}
return DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS;
}
/****************** (C) COPYRIGHT DJI Innovations *****END OF FILE****/

54
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/hal/hal_i2c.h Normal file
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@ -0,0 +1,54 @@
/**
********************************************************************
* @file hal_i2c.h
* @brief This is the header file for "hal_i2c.c", defining the structure and
* (exported) function prototypes.
*
* @copyright (c) 2025 DJI. All rights reserved.
*
* All information contained herein is, and remains, the property of DJI.
* The intellectual and technical concepts contained herein are proprietary
* to DJI and may be covered by U.S. and foreign patents, patents in process,
* and protected by trade secret or copyright law. Dissemination of this
* information, including but not limited to data and other proprietary
* material(s) incorporated within the information, in any form, is strictly
* prohibited without the express written consent of DJI.
*
* If you receive this source code without DJI’s authorization, you may not
* further disseminate the information, and you must immediately remove the
* source code and notify DJI of its removal. DJI reserves the right to pursue
* legal actions against you for any loss(es) or damage(s) caused by your
* failure to do so.
*
*********************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef HAL_I2C_H
#define HAL_I2C_H
/* Includes ------------------------------------------------------------------*/
#include "dji_platform.h"
#ifdef __cplusplus
extern "C" {
#endif
/* Exported constants --------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
T_DjiReturnCode HalI2c_Init(T_DjiHalI2cConfig i2cConfig, T_DjiI2cHandle *i2cHandle);
T_DjiReturnCode HalI2c_DeInit(T_DjiI2cHandle i2cHandle);
T_DjiReturnCode HalI2c_WriteData(T_DjiI2cHandle i2cHandle, uint16_t devAddress,
const uint8_t *buf, uint32_t len, uint32_t *realLen);
T_DjiReturnCode HalI2c_ReadData(T_DjiI2cHandle i2cHandle, uint16_t devAddress,
uint8_t *buf, uint32_t len, uint32_t *realLen);
#ifdef __cplusplus
}
#endif
#endif // HAL_I2C_H
/************************ (C) COPYRIGHT DJI Innovations *******END OF FILE******/

14
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/hal/hal_uart.c
View File

@ -35,6 +35,9 @@
#define COMMUNICATION_UART_NUM UART_NUM_1
#define USE_NATIVE_UART_ON_EPORT_V2 (0)
#define USB_UART_FT232_VID (0x0403)
#define USB_UART_FT232_PID (0x6001)
/* Private types -------------------------------------------------------------*/
typedef enum {
USER_UART_NUM0 = 0,
@ -52,7 +55,7 @@ T_DjiReturnCode HalUart_Init(E_DjiHalUartNum uartNum, uint32_t baudRate, T_DjiUa
{
T_UartHandleStruct *uartHandleStruct;
uartHandleStruct = pvPortMalloc(sizeof(T_UartHandleStruct));
uartHandleStruct = DjiPlatform_GetOsalHandler()->Malloc(sizeof(T_UartHandleStruct));
if (uartHandleStruct == NULL) {
return DJI_ERROR_SYSTEM_MODULE_CODE_MEMORY_ALLOC_FAILED;
}
@ -73,7 +76,7 @@ T_DjiReturnCode HalUart_Init(E_DjiHalUartNum uartNum, uint32_t baudRate, T_DjiUa
T_DjiReturnCode HalUart_DeInit(T_DjiUartHandle uartHandle)
{
vPortFree(uartHandle);
DjiPlatform_GetOsalHandler()->Free(uartHandle);
return DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS;
}
@ -81,7 +84,6 @@ T_DjiReturnCode HalUart_DeInit(T_DjiUartHandle uartHandle)
T_DjiReturnCode HalUart_WriteData(T_DjiUartHandle uartHandle, const uint8_t *buf, uint32_t len, uint32_t *realLen)
{
T_UartHandleStruct *uartHandleStruct = (T_UartHandleStruct *) uartHandle;
int32_t ret;
if (uartHandleStruct->uartNum == USER_UART_NUM0) {
#if USE_NATIVE_UART_ON_EPORT_V2
@ -99,7 +101,6 @@ T_DjiReturnCode HalUart_WriteData(T_DjiUartHandle uartHandle, const uint8_t *buf
T_DjiReturnCode HalUart_ReadData(T_DjiUartHandle uartHandle, uint8_t *buf, uint32_t len, uint32_t *realLen)
{
T_UartHandleStruct *uartHandleStruct = (T_UartHandleStruct *) uartHandle;
int32_t ret;
if (uartHandleStruct->uartNum == USER_UART_NUM0) {
#if USE_NATIVE_UART_ON_EPORT_V2
@ -134,8 +135,13 @@ T_DjiReturnCode HalUart_GetDeviceInfo(T_DjiHalUartDeviceInfo *deviceInfo)
return DJI_ERROR_SYSTEM_MODULE_CODE_INVALID_PARAMETER;
}
#if USE_NATIVE_UART_ON_EPORT_V2
deviceInfo->vid = USB_UART_FT232_VID;
deviceInfo->pid = USB_UART_FT232_PID;
#else
deviceInfo->vid = ((usb_desc_dev *)(cdc_desc.dev_desc))->idVendor;
deviceInfo->pid = ((usb_desc_dev *)(cdc_desc.dev_desc))->idProduct;
#endif
return DJI_ERROR_SYSTEM_MODULE_CODE_SUCCESS;
}

186
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/project/armgcc/CMakeLists.txt Normal file
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@ -0,0 +1,186 @@
set(CMAKE_SYSTEM_NAME Generic)
set(CMAKE_SYSTEM_VERSION 1)
cmake_minimum_required(VERSION 3.15)
project(dji_sdk_demo_rtos C CXX ASM)
set(CMAKE_CXX_STANDARD 17)
set(CMAKE_C_STANDARD 11)
add_compile_definitions(ARM_MATH_CM33;ARM_MATH_MATRIX_CHECK;ARM_MATH_ROUNDING)
add_compile_options(-mfloat-abi=hard -mfpu=fpv4-sp-d16)
add_link_options(-mfloat-abi=hard -mfpu=fpv4-sp-d16)
add_compile_options(-mcpu=cortex-m33 -mthumb -mthumb-interwork)
add_compile_options(-ffunction-sections -fdata-sections -fno-common -fmessage-length=0)
add_compile_definitions(USE_USB_FS;USE_BOOTLOADER)
if ("${CMAKE_BUILD_TYPE}" STREQUAL "Release")
message(STATUS "Maximum optimization for speed")
add_compile_options(-Ofast)
elseif ("${CMAKE_BUILD_TYPE}" STREQUAL "RelWithDebInfo")
message(STATUS "Maximum optimization for speed, debug info included")
add_compile_options(-Ofast -g)
elseif ("${CMAKE_BUILD_TYPE}" STREQUAL "MinSizeRel")
message(STATUS "Maximum optimization for size")
add_compile_options(-Os)
else ()
message(STATUS "Minimal optimization, debug info included")
# add_compile_options(-Og -g)
endif ()
include_directories (
../../../../../module_sample
../../application
../../../common/osal
../../hal
../../osal
)
include_directories (
../../application
../../hal
../../../common/osal
../../middlewares/FreeRTOS-10.3.1/include
../../middlewares/FreeRTOS-10.3.1/portable/GCC/ARM_CM33_NTZ
../../middlewares/FreeRTOS-10.3.1/portable/GCC/ARM_CM33_NTZ/non_secure
../../../../../module_sample
../../../../../../../modules/aircraft_info/include
../../../../../../../modules/error/include
../../../../../../../modules/camera_manager/include
../../../../../../../modules/core/include
../../../../../../../modules/xxx_template/include
../../../../../../../modules/widget/include
../../../../../../../modules/waypoint_v3/include
../../../../../../../modules/waypoint_v2/include
../../../../../../../modules/upgrade/include
../../../../../../../modules/time_sync/include
../../../../../../../modules/power_management/include
../../../../../../../modules/positioning/include
../../../../../../../modules/platform/include
../../../../../../../modules/perception/include
../../../../../../../modules/payload_xport/include
../../../../../../../modules/payload_gimbal/include
../../../../../../../modules/payload_camera/include
../../../../../../../modules/payload_camera/payload_collaboration
../../../../../../../modules/fc_subscription/include
../../../../../../../modules/logger/include
../../../../../../../modules/data_channel/include
../../../../../../../modules/data_channel/high_speed_data_channel
../../../../../../../modules/data_channel/low_speed_data_channel
../../../../../../../modules/data_channel/stream_channel
../../../../../../../modules/data_channel/mop_channel/mop
../../../../../../../modules/flight_controller/include
../../../../../../../modules/liveview/include
../../../../../../../modules/gimbal_manager/include
../../../../../../../modules/hms/include
../../../../../../../modules/data_channel/mop_channel/mop/inc
../../../../../../../modules/battery/include
../../../../../../../modules/authentication/ciu98/huada_lib/inc
../../../../../../../modules/authentication
../../../../../../../modules/authentication/ciu98
../../drivers/CMSIS/include
../../drivers/CMSIS/GD/GD32F5xx/Include
../../drivers/BSP
../../drivers/GD32F5xx_standard_peripheral/Include
../../drivers/GD32F5xx_usb_library/device/core/Include
../../drivers/GD32F5xx_usb_library/driver/Include
../../drivers/GD32F5xx_usb_library/device/class/cdc/Include
../../drivers/GD32F5xx_usb_library/ustd/common
../../drivers/GD32F5xx_usb_library/ustd/class/cdc
)
link_directories(${CMAKE_CURRENT_LIST_DIR}/../../../../../../../out/lib/arm-none-eabi-gcc)
link_libraries(${CMAKE_CURRENT_LIST_DIR}/../../../../../../../out/lib/arm-none-eabi-gcc/lib${PACKAGE_NAME}.a)
add_definitions(-DDEBUG -DUSE_HAL_DRIVER -DGD32F527)
file(GLOB_RECURSE APP_SRC ../../application/*.c)
message("-- Use onboard sdk package")
file(GLOB_RECURSE MODULE_SAMPLE_SRC
../../../../../module_sample/camera_manager/*.c
../../../../../module_sample/payload_collaboration/*.c
../../../../../module_sample/camera_emu/test_payload_cam_emu_base.c
../../../../../module_sample/xport/*.c
../../../../../module_sample/gimbal_emu/*.c
../../../../../module_sample/data_transmission/*.c
../../../../../module_sample/fc_subscription/*.c
../../../../../module_sample/flight_control/*.c
../../../../../module_sample/gimbal_manager/*.c
../../../../../module_sample/waypoint_v2/*.c
../../../../../module_sample/hms/*.c
../../../../../module_sample/hotpoint/*.c
../../../../../module_sample/liveview/*.c
../../../../../module_sample/mop_channel/*.c
../../../../../module_sample/perception/*.c
../../../../../module_sample/waypoint_v2/*.c
../../../../../module_sample/upgrade/*.c
../../../../../module_sample/widget/*.c
../../../../../module_sample/utils/*.c
../../../../../module_sample/positioning/*.c
../../../../../module_sample/time_sync/*.c
../../../../../module_sample/waypoint_v3/*.c
../../../../../module_sample/power_management/*.c
../../../../../module_sample/tethered_battery/*.c
)
# 添加第三方代码
file(GLOB_RECURSE SOURCES
../../../common/osal/osal.c
../../drivers/BSP/startup_gd32f5xx_armgcc.s
../../drivers/BSP/*.c
../../drivers/GD32F5xx_standard_peripheral/Source/*.c
../../drivers/CMSIS/GD/GD32F5xx/Source/syscalls.c
../../drivers/CMSIS/GD/GD32F5xx/Source/system_gd32f5xx.c
../../drivers/GD32F5xx_usb_library/driver/Source/drv_usb_core.c
../../drivers/GD32F5xx_usb_library/driver/Source/drv_usb_dev.c
../../drivers/GD32F5xx_usb_library/driver/Source/drv_usbd_int.c
../../drivers/GD32F5xx_usb_library/device/core/Source/usbd_core.c
../../drivers/GD32F5xx_usb_library/device/core/Source/usbd_enum.c
../../drivers/GD32F5xx_usb_library/device/core/Source/usbd_transc.c
../../drivers/GD32F5xx_usb_library/device/class/cdc/Source/cdc_acm_core.c
../../middlewares/FreeRTOS-10.3.1/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
../../middlewares/FreeRTOS-10.3.1/portable/GCC/ARM_CM33_NTZ/non_secure/portasm.c
../../middlewares/FreeRTOS-10.3.1/portable/MemMang/heap_4.c
../../middlewares/FreeRTOS-10.3.1/croutine.c
../../middlewares/FreeRTOS-10.3.1/event_groups.c
../../middlewares/FreeRTOS-10.3.1/list.c
../../middlewares/FreeRTOS-10.3.1/queue.c
../../middlewares/FreeRTOS-10.3.1/tasks.c
../../middlewares/FreeRTOS-10.3.1/stream_buffer.c
../../middlewares/FreeRTOS-10.3.1/timers.c
../../hal/hal_uart.c
../../hal/hal_i2c.c
)
#链接脚本
set(LINKER_SCRIPT ${CMAKE_CURRENT_LIST_DIR}/gd32f5xx_flash.ld)
add_link_options(-Wl,-gc-sections,--print-memory-usage,-Map=${PROJECT_BINARY_DIR}/${PROJECT_NAME}.map)
add_link_options(-mcpu=cortex-m33 -mthumb -mthumb-interwork)
add_link_options(-T ${LINKER_SCRIPT})
add_executable(${PROJECT_NAME}.elf ${SOURCES} ${MODULE_SAMPLE_SRC} ${APP_SRC} ${LINKER_SCRIPT})
add_dependencies(${PROJECT_NAME}.elf djisdk)
set(DIS_FILE ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.dis)
set(HEX_FILE ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.hex)
set(BIN_FILE_SECTION -j.vectors -j.text -j.rodata -j.ARM.extab -j.ARM -j.preinit_array -j.init_array -j.fini_array -j.data)
set(BIN_FILE ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.bin)
add_custom_command(TARGET ${PROJECT_NAME}.elf
POST_BUILD
COMMAND ${CMAKE_OBJDUMP} -D $<TARGET_FILE:${PROJECT_NAME}.elf> > ${DIS_FILE}
COMMAND ${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${PROJECT_NAME}.elf> ${HEX_FILE}
COMMAND ${CMAKE_OBJCOPY} -Obinary ${BIN_FILE_SECTION} $<TARGET_FILE:${PROJECT_NAME}.elf> ${BIN_FILE}
COMMENT "Building ${DIS_FILE}
Building ${HEX_FILE}
Building ${BIN_FILE}")
add_custom_command(TARGET ${PROJECT_NAME}.elf
POST_BUILD
COMMAND cp -rf ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.* ${PROJECT_BINARY_DIR}/../../../../../../../
WORKING_DIRECTORY ${PROJECT_BINARY_DIR})

152
samples/sample_c/platform/rtos_freertos/gd32f527_development_board/project/armgcc/gd32f5xx_flash.ld Normal file
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@ -0,0 +1,152 @@
/* memory map */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08020000, LENGTH = 1792K
RAM (xrw) : ORIGIN = $20000000, LENGTH = 1024K
TCMRAM (xrw): ORIGIN = 0x10000000, LENGTH = 64K
}
ENTRY(Reset_Handler)
SECTIONS
{
__stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
__heap_size = DEFINED(__heap_size) ? __heap_size : 1K;
/* ISR vectors */
.vectors :
{
. = ALIGN(4);
KEEP(*(.vectors))
. = ALIGN(4);
__Vectors_End = .;
__Vectors_Size = __Vectors_End - __gVectors;
} >FLASH
/* text section, such as program code */
.text :
{
. = ALIGN(4);
*(.text)
*(.text*)
*(.glue_7)
*(.glue_7t)
*(.eh_frame)
KEEP (*(.init))
KEEP (*(.fini))
. = ALIGN(4);
/* the symbol '_etext' will be defined at the end of code section */
_etext = .;
} >FLASH
/* ro-data section, such as constant data */
.rodata :
{
. = ALIGN(4);
*(.rodata)
*(.rodata*)
. = ALIGN(4);
} >FLASH
/* exception process table */
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} >FLASH
/* exception process table index */
.ARM :
{
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
/* ARM attributes */
.ARM.attributes :
{
*(.ARM.attributes)
} >FLASH
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(.fini_array*))
KEEP (*(SORT(.fini_array.*)))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH
/* provide some necessary symbols for initialized data */
_sidata = LOADADDR(.data);
.data :
{
. = ALIGN(4);
/* the symbol '_sdata' will be defined at the data section end start */
_sdata = .;
*(.data)
*(.data*)
. = ALIGN(4);
/* the symbol '_edata' will be defined at the data section end */
_edata = .;
} > RAM AT> FLASH
/* provide some necessary symbols for uninitialized data */
. = ALIGN(4);
.bss :
{
. = ALIGN(4);
/* the symbol '_sbss' will be defined at the bss section start */
_sbss = .;
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
/* the symbol '_ebss' will be defined at the bss section end */
_ebss = .;
__bss_end__ = _ebss;
} > RAM
/* heap and stack space */
.heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = _ebss );
PROVIDE ( _end = _ebss );
. = . + __heap_size;
PROVIDE( _heap_end = . );
. = . + __stack_size;
PROVIDE( _sp = . );
. = ALIGN(8);
} > RAM
/* Note: To use TCMRAM, initialization in the startup file is required. */
_sitcmram = LOADADDR(.tcmram);
.tcmram :
{
. = ALIGN(4);
.stcmram = .;
*(.tcmram)
*(.tcmram*)
. = ALIGN(4);
_etcmram = .;
} > TCMRAM AT> FLASH
}
/* input sections */
GROUP(libgcc.a libc.a libm.a libnosys.a)

0
tools/build_dpk/build_dpk.sh Executable file → Normal file
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0
tools/file2c/file2c.exe Executable file → Normal file
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