22.7.14
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植物探头/使用时间监测模块/117.PcbLib
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植物探头/使用时间监测模块/117.PcbLib
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植物探头/使用时间监测模块/ASM1117-3.3.PcbLib
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植物探头/使用时间监测模块/ASM1117-3.3.PcbLib
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植物探头/使用时间监测模块/Design Rule Check - PCB1.drc
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植物探头/使用时间监测模块/Design Rule Check - PCB1.drc
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Protel Design System Design Rule Check
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PCB File : C:\Users\hu123456\Desktop\ֲ<><D6B2>̽ͷ\ʹ<><CAB9>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>\PCB1.PcbDoc
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Date : 2022/6/27
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Time : 9:56:40
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Processing Rule : Clearance Constraint (Gap=0.2mm) (All),(All)
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Rule Violations :0
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Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
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Rule Violations :0
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Processing Rule : Un-Routed Net Constraint ( (All) )
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Rule Violations :0
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Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No)
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Rule Violations :0
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Processing Rule : Width Constraint (Min=0.2mm) (Max=1mm) (Preferred=0.254mm) (All)
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Rule Violations :0
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Processing Rule : Power Plane Connect Rule(Direct Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
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Rule Violations :0
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Processing Rule : Hole Size Constraint (Min=0.025mm) (Max=2.54mm) (All)
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Rule Violations :0
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Processing Rule : Hole To Hole Clearance (Gap=0.254mm) (All),(All)
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Rule Violations :0
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Processing Rule : Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)
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Violation between Minimum Solder Mask Sliver Constraint: (0.159mm < 0.254mm) Between Pad BT1-1(158.293mm,60.173mm) on Bottom Layer And Via (158.242mm,57.81mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.159mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C10-1(147.447mm,49.952mm) on Bottom Layer And Pad C10-2(147.447mm,50.952mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C1-1(145.466mm,50.952mm) on Bottom Layer And Pad C1-2(145.466mm,49.952mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.085mm < 0.254mm) Between Pad C1-1(145.466mm,50.952mm) on Bottom Layer And Via (145.339mm,51.791mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.085mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C11-1(147.184mm,61.671mm) on Bottom Layer And Pad C11-2(148.184mm,61.671mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.212mm < 0.254mm) Between Pad C11-2(148.184mm,61.671mm) on Bottom Layer And Via (149.149mm,61.341mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.212mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.231mm < 0.254mm) Between Pad C14-1(173.7mm,58.522mm) on Bottom Layer And Via (172.415mm,58.699mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.231mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C8-1(152.171mm,56.726mm) on Bottom Layer And Pad C8-2(152.171mm,57.726mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C9-1(150.927mm,61.943mm) on Bottom Layer And Pad C9-2(150.927mm,60.943mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R1-1(146.456mm,49.952mm) on Bottom Layer And Pad R1-2(146.456mm,50.952mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R2-1(144.475mm,49.952mm) on Bottom Layer And Pad R2-2(144.475mm,50.952mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R3-1(179.638mm,60.35mm) on Top Layer And Pad R3-2(178.638mm,60.35mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-1(150.541mm,59.544mm) on Bottom Layer And Pad U1-2(150.541mm,59.044mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-1(150.541mm,59.544mm) on Bottom Layer And Pad U1-48(149.791mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.01mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(150.541mm,55.044mm) on Bottom Layer And Pad U1-11(150.541mm,54.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(150.541mm,55.044mm) on Bottom Layer And Pad U1-9(150.541mm,55.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-11(150.541mm,54.544mm) on Bottom Layer And Pad U1-12(150.541mm,54.044mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-12(150.541mm,54.044mm) on Bottom Layer And Pad U1-13(149.791mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.01mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-13(149.791mm,53.294mm) on Bottom Layer And Pad U1-14(149.29mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-14(149.29mm,53.294mm) on Bottom Layer And Pad U1-15(148.791mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-15(148.791mm,53.294mm) on Bottom Layer And Pad U1-16(148.29mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-16(148.29mm,53.294mm) on Bottom Layer And Pad U1-17(147.791mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-17(147.791mm,53.294mm) on Bottom Layer And Pad U1-18(147.29mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-18(147.29mm,53.294mm) on Bottom Layer And Pad U1-19(146.791mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.193mm < 0.254mm) Between Pad U1-18(147.29mm,53.294mm) on Bottom Layer And Via (147.193mm,52.248mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.193mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-19(146.791mm,53.294mm) on Bottom Layer And Pad U1-20(146.29mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.216mm < 0.254mm) Between Pad U1-19(146.791mm,53.294mm) on Bottom Layer And Via (147.193mm,52.248mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.216mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-2(150.541mm,59.044mm) on Bottom Layer And Pad U1-3(150.541mm,58.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-20(146.29mm,53.294mm) on Bottom Layer And Pad U1-21(145.791mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-21(145.791mm,53.294mm) on Bottom Layer And Pad U1-22(145.29mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-22(145.29mm,53.294mm) on Bottom Layer And Pad U1-23(144.791mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.141mm < 0.254mm) Between Pad U1-22(145.29mm,53.294mm) on Bottom Layer And Via (144.958mm,54.28mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.141mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-23(144.791mm,53.294mm) on Bottom Layer And Pad U1-24(144.29mm,53.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.132mm < 0.254mm) Between Pad U1-23(144.791mm,53.294mm) on Bottom Layer And Via (144.958mm,54.28mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.132mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-24(144.29mm,53.294mm) on Bottom Layer And Pad U1-25(143.541mm,54.044mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.009mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-25(143.541mm,54.044mm) on Bottom Layer And Pad U1-26(143.541mm,54.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-26(143.541mm,54.544mm) on Bottom Layer And Pad U1-27(143.541mm,55.044mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-27(143.541mm,55.044mm) on Bottom Layer And Pad U1-28(143.541mm,55.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-28(143.541mm,55.544mm) on Bottom Layer And Pad U1-29(143.541mm,56.044mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-29(143.541mm,56.044mm) on Bottom Layer And Pad U1-30(143.541mm,56.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-3(150.541mm,58.544mm) on Bottom Layer And Pad U1-4(150.541mm,58.044mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-30(143.541mm,56.544mm) on Bottom Layer And Pad U1-31(143.541mm,57.044mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-31(143.541mm,57.044mm) on Bottom Layer And Pad U1-32(143.541mm,57.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-32(143.541mm,57.544mm) on Bottom Layer And Pad U1-33(143.541mm,58.044mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.142mm < 0.254mm) Between Pad U1-32(143.541mm,57.544mm) on Bottom Layer And Via (144.526mm,57.887mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.142mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-33(143.541mm,58.044mm) on Bottom Layer And Pad U1-34(143.541mm,58.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.132mm < 0.254mm) Between Pad U1-33(143.541mm,58.044mm) on Bottom Layer And Via (144.526mm,57.887mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.132mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-34(143.541mm,58.544mm) on Bottom Layer And Pad U1-35(143.541mm,59.044mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.081mm < 0.254mm) Between Pad U1-34(143.541mm,58.544mm) on Bottom Layer And Via (144.475mm,58.801mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.081mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-35(143.541mm,59.044mm) on Bottom Layer And Pad U1-36(143.541mm,59.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.081mm < 0.254mm) Between Pad U1-35(143.541mm,59.044mm) on Bottom Layer And Via (144.475mm,58.801mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.081mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-36(143.541mm,59.544mm) on Bottom Layer And Pad U1-37(144.29mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.009mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-37(144.29mm,60.294mm) on Bottom Layer And Pad U1-38(144.791mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-38(144.791mm,60.294mm) on Bottom Layer And Pad U1-39(145.29mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-39(145.29mm,60.294mm) on Bottom Layer And Pad U1-40(145.791mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-4(150.541mm,58.044mm) on Bottom Layer And Pad U1-5(150.541mm,57.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-40(145.791mm,60.294mm) on Bottom Layer And Pad U1-41(146.29mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-41(146.29mm,60.294mm) on Bottom Layer And Pad U1-42(146.791mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-42(146.791mm,60.294mm) on Bottom Layer And Pad U1-43(147.29mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-43(147.29mm,60.294mm) on Bottom Layer And Pad U1-44(147.791mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-44(147.791mm,60.294mm) on Bottom Layer And Pad U1-45(148.29mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-45(148.29mm,60.294mm) on Bottom Layer And Pad U1-46(148.791mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-46(148.791mm,60.294mm) on Bottom Layer And Pad U1-47(149.29mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.206mm < 0.254mm) Between Pad U1-46(148.791mm,60.294mm) on Bottom Layer And Via (149.149mm,61.341mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.206mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-47(149.29mm,60.294mm) on Bottom Layer And Pad U1-48(149.791mm,60.294mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.193mm < 0.254mm) Between Pad U1-47(149.29mm,60.294mm) on Bottom Layer And Via (149.149mm,61.341mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.193mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.112mm < 0.254mm) Between Pad U1-49(147.041mm,56.794mm) on Bottom Layer And Via (144.475mm,58.801mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.112mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.061mm < 0.254mm) Between Pad U1-49(147.041mm,56.794mm) on Bottom Layer And Via (144.526mm,57.887mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.061mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.061mm < 0.254mm) Between Pad U1-49(147.041mm,56.794mm) on Bottom Layer And Via (144.958mm,54.28mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.061mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-5(150.541mm,57.544mm) on Bottom Layer And Pad U1-6(150.541mm,57.044mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-6(150.541mm,57.044mm) on Bottom Layer And Pad U1-7(150.541mm,56.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-7(150.541mm,56.544mm) on Bottom Layer And Pad U1-8(150.541mm,56.044mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-8(150.541mm,56.044mm) on Bottom Layer And Pad U1-9(150.541mm,55.544mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.017mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.176mm < 0.254mm) Between Pad U2-1(170.586mm,54.345mm) on Bottom Layer And Via (169.85mm,55.499mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.176mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.157mm < 0.254mm) Between Pad U3-2(170.572mm,59.007mm) on Bottom Layer And Via (172.415mm,58.699mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.157mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.229mm < 0.254mm) Between Pad U3-3(170.572mm,56.707mm) on Bottom Layer And Via (169.85mm,55.499mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.229mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.231mm < 0.254mm) Between Pad U3-4(164.857mm,59.007mm) on Bottom Layer And Via (162.941mm,58.064mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.231mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.253mm < 0.254mm) Between Pad U5-1(156.515mm,50.267mm) on Top Layer And Via (155.55mm,52.222mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.253mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.1mm < 0.254mm) Between Pad U5-1(156.515mm,50.267mm) on Top Layer And Via (156.794mm,52.07mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.1mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.234mm < 0.254mm) Between Pad U5-10(161.595mm,60.764mm) on Top Layer And Via (161.188mm,58.826mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.234mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.222mm < 0.254mm) Between Pad U5-12(156.515mm,60.764mm) on Top Layer And Via (154.94mm,61.493mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.222mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.122mm < 0.254mm) Between Pad U5-3(161.595mm,50.267mm) on Top Layer And Via (162.916mm,51.968mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.122mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.061mm < 0.254mm) Between Pad U5-4(164.135mm,50.267mm) on Top Layer And Via (162.916mm,51.968mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.061mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.253mm < 0.254mm) Between Pad U5-5(166.675mm,50.267mm) on Top Layer And Via (167.03mm,52.222mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.253mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.215mm < 0.254mm) Between Pad U6-1(162.128mm,59.282mm) on Bottom Layer And Pad U6-2(161.178mm,59.282mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.215mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.221mm < 0.254mm) Between Pad U6-1(162.128mm,59.282mm) on Bottom Layer And Via (161.188mm,58.826mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.221mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.215mm < 0.254mm) Between Pad U6-2(161.178mm,59.282mm) on Bottom Layer And Pad U6-3(160.228mm,59.282mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.215mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.241mm < 0.254mm) Between Pad U6-3(160.228mm,59.282mm) on Bottom Layer And Via (161.188mm,58.826mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.241mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.215mm < 0.254mm) Between Pad U7-1(152.063mm,61.498mm) on Bottom Layer And Pad U7-2(153.013mm,61.498mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.215mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.215mm < 0.254mm) Between Pad U7-2(153.013mm,61.498mm) on Bottom Layer And Pad U7-3(153.963mm,61.498mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.215mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.231mm < 0.254mm) Between Pad U7-2(153.013mm,61.498mm) on Bottom Layer And Via (152.063mm,61.498mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.231mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.231mm < 0.254mm) Between Pad U7-2(153.013mm,61.498mm) on Bottom Layer And Via (153.963mm,61.498mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.231mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.227mm < 0.254mm) Between Pad U7-5(152.063mm,59.203mm) on Bottom Layer And Via (153.01mm,59.08mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.227mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.229mm < 0.254mm) Between Pad U7-5(152.063mm,59.203mm) on Bottom Layer And Via (153.01mm,59.868mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.229mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.213mm < 0.254mm) Between Via (144.475mm,58.801mm) from Top Layer to Bottom Layer And Via (144.526mm,57.887mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.213mm] / [Bottom Solder] Mask Sliver [0.213mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.084mm < 0.254mm) Between Via (153.01mm,59.08mm) from Top Layer to Bottom Layer And Via (153.01mm,59.868mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.084mm] / [Bottom Solder] Mask Sliver [0.084mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.123mm < 0.254mm) Between Via (154.356mm,53.289mm) from Top Layer to Bottom Layer And Via (154.94mm,52.705mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.123mm] / [Bottom Solder] Mask Sliver [0.123mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.059mm < 0.254mm) Between Via (154.559mm,52.045mm) from Top Layer to Bottom Layer And Via (154.94mm,52.705mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.059mm] / [Bottom Solder] Mask Sliver [0.059mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.074mm < 0.254mm) Between Via (154.94mm,52.705mm) from Top Layer to Bottom Layer And Via (155.55mm,52.222mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.074mm] / [Bottom Solder] Mask Sliver [0.074mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.123mm < 0.254mm) Between Via (156.794mm,52.07mm) from Top Layer to Bottom Layer And Via (157.378mm,52.654mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.123mm] / [Bottom Solder] Mask Sliver [0.123mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.11mm < 0.254mm) Between Via (158.445mm,53.365mm) from Top Layer to Bottom Layer And Via (159.258mm,53.391mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.11mm] / [Bottom Solder] Mask Sliver [0.11mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.044mm < 0.254mm) Between Via (159.258mm,53.391mm) from Top Layer to Bottom Layer And Via (159.385mm,54.127mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.044mm] / [Bottom Solder] Mask Sliver [0.044mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.213mm < 0.254mm) Between Via (161.036mm,56.185mm) from Top Layer to Bottom Layer And Via (161.696mm,56.82mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.213mm] / [Bottom Solder] Mask Sliver [0.213mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.11mm < 0.254mm) Between Via (162.179mm,54.864mm) from Top Layer to Bottom Layer And Via (162.204mm,54.051mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.11mm] / [Bottom Solder] Mask Sliver [0.11mm]
|
||||
Rule Violations :104
|
||||
|
||||
Processing Rule : Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (146.842mm,48.976mm) on Top Overlay And Pad U4-1(146.842mm,49.708mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.09mm < 0.254mm) Between Arc (151.18mm,59.544mm) on Bottom Overlay And Pad U1-1(150.541mm,59.544mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.09mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Arc (151.345mm,61.65mm) on Bottom Overlay And Pad C9-1(150.927mm,61.943mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.141mm < 0.254mm) Between Arc (151.345mm,61.65mm) on Bottom Overlay And Pad C9-2(150.927mm,60.943mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.141mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (151.345mm,61.65mm) on Bottom Overlay And Pad U7-1(152.063mm,61.498mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Arc (157.292mm,53.849mm) on Bottom Overlay And Pad BT1-1(158.293mm,60.173mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Arc (157.292mm,53.849mm) on Bottom Overlay And Pad BT1-2(156.292mm,60.173mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (162.846mm,59.13mm) on Bottom Overlay And Pad U6-1(162.128mm,59.282mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.246mm < 0.254mm) Between Pad BT1-1(158.293mm,60.173mm) on Bottom Layer And Text "+" (158.969mm,59.818mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.246mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C?-1(149.022mm,49.381mm) on Bottom Layer And Track (148.422mm,50.281mm)(149.622mm,50.281mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C?-2(149.022mm,51.181mm) on Bottom Layer And Track (148.422mm,50.281mm)(149.622mm,50.281mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C12-1(173.609mm,50.8mm) on Bottom Layer And Track (173.009mm,51.7mm)(174.209mm,51.7mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C12-2(173.609mm,52.6mm) on Bottom Layer And Track (173.009mm,51.7mm)(174.209mm,51.7mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad C13-1(175.768mm,52.6mm) on Bottom Layer And Text "+" (175.082mm,52.959mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C13-1(175.768mm,52.6mm) on Bottom Layer And Track (175.168mm,51.7mm)(176.368mm,51.7mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.196mm < 0.254mm) Between Pad C13-1(175.768mm,52.6mm) on Bottom Layer And Track (176.736mm,53.381mm)(176.736mm,54.308mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.196mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.196mm < 0.254mm) Between Pad C13-1(175.768mm,52.6mm) on Bottom Layer And Track (176.736mm,53.381mm)(180.436mm,53.381mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.196mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C13-2(175.768mm,50.8mm) on Bottom Layer And Track (175.168mm,51.7mm)(176.368mm,51.7mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C14-1(173.7mm,58.522mm) on Bottom Layer And Track (174.6mm,57.922mm)(174.6mm,59.122mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad C14-2(175.5mm,58.522mm) on Bottom Layer And Text "-" (176.225mm,57.125mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C14-2(175.5mm,58.522mm) on Bottom Layer And Track (174.6mm,57.922mm)(174.6mm,59.122mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C15-1(173.7mm,60.655mm) on Bottom Layer And Track (174.6mm,60.055mm)(174.6mm,61.255mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C15-2(175.5mm,60.655mm) on Bottom Layer And Track (174.6mm,60.055mm)(174.6mm,61.255mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad C9-1(150.927mm,61.943mm) on Bottom Layer And Text "U1" (151.075mm,61.564mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad C9-2(150.927mm,60.943mm) on Bottom Layer And Text "C8" (152.324mm,58.928mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.195mm < 0.254mm) Between Pad C9-2(150.927mm,60.943mm) on Bottom Layer And Text "U1" (151.075mm,61.564mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.195mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.203mm < 0.254mm) Between Pad C9-2(150.927mm,60.943mm) on Bottom Layer And Track (150.121mm,60.37mm)(150.617mm,60.37mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.203mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.203mm < 0.254mm) Between Pad C9-2(150.927mm,60.943mm) on Bottom Layer And Track (150.617mm,59.875mm)(150.617mm,60.37mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.203mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.209mm < 0.254mm) Between Pad C9-2(150.927mm,60.943mm) on Bottom Layer And Track (151.462mm,59.449mm)(151.462mm,61.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.209mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-1(175.971mm,54.889mm) on Bottom Layer And Track (176.736mm,53.381mm)(176.736mm,54.308mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-1(175.971mm,54.889mm) on Bottom Layer And Track (176.736mm,55.471mm)(176.736mm,55.558mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-2(175.971mm,56.139mm) on Bottom Layer And Track (176.736mm,55.471mm)(176.736mm,55.558mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-2(175.971mm,56.139mm) on Bottom Layer And Track (176.736mm,56.72mm)(176.736mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.007mm < 0.254mm) Between Pad P1-3(179.06mm,52.047mm) on Bottom Layer And Track (176.736mm,53.381mm)(180.436mm,53.381mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.007mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.018mm < 0.254mm) Between Pad P1-3(179.06mm,52.047mm) on Bottom Layer And Track (180.436mm,53.391mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.018mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.061mm,58.989mm) on Bottom Layer And Track (176.736mm,57.659mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.061mm,58.989mm) on Bottom Layer And Track (180.436mm,53.391mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-1(140.818mm,61.747mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-2(140.818mm,59.207mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-3(140.818mm,56.667mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad R?-1(151.181mm,49.356mm) on Bottom Layer And Track (150.581mm,50.256mm)(151.781mm,50.256mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad R?-2(151.181mm,51.156mm) on Bottom Layer And Track (150.581mm,50.256mm)(151.781mm,50.256mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(141.224mm,49.581mm) on Bottom Layer And Track (139.648mm,49.54mm)(140.341mm,49.54mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(141.224mm,49.581mm) on Bottom Layer And Track (142.107mm,49.54mm)(142.8mm,49.54mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad SW1-2(141.224mm,53.651mm) on Bottom Layer And Text "TX" (140.589mm,52.756mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(141.224mm,53.651mm) on Bottom Layer And Track (139.648mm,53.692mm)(140.341mm,53.692mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(141.224mm,53.651mm) on Bottom Layer And Track (142.107mm,53.692mm)(142.8mm,53.692mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(179.108mm,57.546mm) on Top Layer And Track (177.532mm,57.587mm)(178.225mm,57.587mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(179.108mm,57.546mm) on Top Layer And Track (179.991mm,57.587mm)(180.684mm,57.587mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.108mm,53.476mm) on Top Layer And Track (177.532mm,53.434mm)(178.225mm,53.434mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.108mm,53.476mm) on Top Layer And Track (179.991mm,53.434mm)(180.684mm,53.434mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-1(150.541mm,59.544mm) on Bottom Layer And Text "C8" (152.324mm,58.928mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-1(150.541mm,59.544mm) on Bottom Layer And Track (150.617mm,59.875mm)(150.617mm,60.37mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.067mm < 0.254mm) Between Pad U1-11(150.541mm,54.544mm) on Bottom Layer And Text "R?" (151.917mm,52.821mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.067mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-12(150.541mm,54.044mm) on Bottom Layer And Text "R?" (151.917mm,52.821mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.211mm < 0.254mm) Between Pad U1-12(150.541mm,54.044mm) on Bottom Layer And Track (150.617mm,53.218mm)(150.617mm,53.714mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.211mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-13(149.791mm,53.294mm) on Bottom Layer And Text "C?" (149.758mm,52.846mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-13(149.791mm,53.294mm) on Bottom Layer And Text "R?" (151.917mm,52.821mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-13(149.791mm,53.294mm) on Bottom Layer And Track (150.121mm,53.218mm)(150.617mm,53.218mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-14(149.29mm,53.294mm) on Bottom Layer And Text "C?" (149.758mm,52.846mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-14(149.29mm,53.294mm) on Bottom Layer And Text "R?" (151.917mm,52.821mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-15(148.791mm,53.294mm) on Bottom Layer And Text "C?" (149.758mm,52.846mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.185mm < 0.254mm) Between Pad U1-16(148.29mm,53.294mm) on Bottom Layer And Text "C?" (149.758mm,52.846mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.185mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-17(147.791mm,53.294mm) on Bottom Layer And Text "C?" (149.758mm,52.846mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.008mm < 0.254mm) Between Pad U1-17(147.791mm,53.294mm) on Bottom Layer And Text "C10" (147.599mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.008mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-18(147.29mm,53.294mm) on Bottom Layer And Text "C?" (149.758mm,52.846mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-18(147.29mm,53.294mm) on Bottom Layer And Text "C10" (147.599mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.207mm < 0.254mm) Between Pad U1-19(146.791mm,53.294mm) on Bottom Layer And Text "C?" (149.758mm,52.846mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.207mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-19(146.791mm,53.294mm) on Bottom Layer And Text "C10" (147.599mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-19(146.791mm,53.294mm) on Bottom Layer And Text "R1" (146.609mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-2(150.541mm,59.044mm) on Bottom Layer And Text "C8" (152.324mm,58.928mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.026mm < 0.254mm) Between Pad U1-20(146.29mm,53.294mm) on Bottom Layer And Text "C10" (147.599mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.026mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-20(146.29mm,53.294mm) on Bottom Layer And Text "R1" (146.609mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-21(145.791mm,53.294mm) on Bottom Layer And Text "C1" (145.618mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-21(145.791mm,53.294mm) on Bottom Layer And Text "C10" (147.599mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-21(145.791mm,53.294mm) on Bottom Layer And Text "R1" (146.609mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-22(145.29mm,53.294mm) on Bottom Layer And Text "C1" (145.618mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.217mm < 0.254mm) Between Pad U1-22(145.29mm,53.294mm) on Bottom Layer And Text "C10" (147.599mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.217mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.021mm < 0.254mm) Between Pad U1-22(145.29mm,53.294mm) on Bottom Layer And Text "R1" (146.609mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.021mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-23(144.791mm,53.294mm) on Bottom Layer And Text "C1" (145.618mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-23(144.791mm,53.294mm) on Bottom Layer And Text "C10" (147.599mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-23(144.791mm,53.294mm) on Bottom Layer And Text "R1" (146.609mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.012mm < 0.254mm) Between Pad U1-24(144.29mm,53.294mm) on Bottom Layer And Text "C1" (145.618mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.012mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-24(144.29mm,53.294mm) on Bottom Layer And Text "C10" (147.599mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-24(144.29mm,53.294mm) on Bottom Layer And Track (143.464mm,53.218mm)(143.96mm,53.218mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad U1-25(143.541mm,54.044mm) on Bottom Layer And Text "C1" (145.618mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.115mm < 0.254mm) Between Pad U1-25(143.541mm,54.044mm) on Bottom Layer And Text "C10" (147.599mm,52.162mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.115mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-25(143.541mm,54.044mm) on Bottom Layer And Track (143.464mm,53.218mm)(143.464mm,53.714mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.117mm < 0.254mm) Between Pad U1-3(150.541mm,58.544mm) on Bottom Layer And Text "C8" (152.324mm,58.928mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.117mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-36(143.541mm,59.544mm) on Bottom Layer And Track (143.464mm,59.875mm)(143.464mm,60.37mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.21mm < 0.254mm) Between Pad U1-37(144.29mm,60.294mm) on Bottom Layer And Track (143.464mm,60.37mm)(143.96mm,60.37mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.21mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.227mm < 0.254mm) Between Pad U1-47(149.29mm,60.294mm) on Bottom Layer And Text "C8" (152.324mm,58.928mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.227mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U1-48(149.791mm,60.294mm) on Bottom Layer And Text "C8" (152.324mm,58.928mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-48(149.791mm,60.294mm) on Bottom Layer And Track (150.121mm,60.37mm)(150.617mm,60.37mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-1(170.586mm,54.345mm) on Bottom Layer And Track (169.125mm,48.643mm)(169.125mm,55.446mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-2(170.586mm,52.045mm) on Bottom Layer And Track (169.125mm,48.643mm)(169.125mm,55.446mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-3(170.586mm,49.745mm) on Bottom Layer And Track (169.125mm,48.643mm)(169.125mm,55.446mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-4(164.871mm,52.045mm) on Bottom Layer And Track (166.333mm,48.643mm)(166.333mm,55.446mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U3-1(170.572mm,61.307mm) on Bottom Layer And Track (169.111mm,55.605mm)(169.111mm,62.408mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U3-2(170.572mm,59.007mm) on Bottom Layer And Track (169.111mm,55.605mm)(169.111mm,62.408mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U3-3(170.572mm,56.707mm) on Bottom Layer And Track (169.111mm,55.605mm)(169.111mm,62.408mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U3-4(164.857mm,59.007mm) on Bottom Layer And Track (166.319mm,55.605mm)(166.319mm,62.408mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-1(146.842mm,49.708mm) on Top Layer And Track (145.741mm,49.077mm)(145.741mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-10(141.097mm,57.328mm) on Top Layer And Track (142.198mm,49.077mm)(142.198mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-11(141.097mm,56.058mm) on Top Layer And Track (142.198mm,49.077mm)(142.198mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-12(141.097mm,54.788mm) on Top Layer And Track (142.198mm,49.077mm)(142.198mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-13(141.097mm,53.518mm) on Top Layer And Track (142.198mm,49.077mm)(142.198mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-14(141.097mm,52.248mm) on Top Layer And Track (142.198mm,49.077mm)(142.198mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-15(141.097mm,50.978mm) on Top Layer And Track (142.198mm,49.077mm)(142.198mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-16(141.097mm,49.708mm) on Top Layer And Track (142.198mm,49.077mm)(142.198mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-2(146.842mm,50.978mm) on Top Layer And Track (145.741mm,49.077mm)(145.741mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-3(146.842mm,52.248mm) on Top Layer And Track (145.741mm,49.077mm)(145.741mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-4(146.842mm,53.518mm) on Top Layer And Track (145.741mm,49.077mm)(145.741mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-5(146.842mm,54.788mm) on Top Layer And Track (145.741mm,49.077mm)(145.741mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-6(146.842mm,56.058mm) on Top Layer And Track (145.741mm,49.077mm)(145.741mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-7(146.842mm,57.328mm) on Top Layer And Track (145.741mm,49.077mm)(145.741mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-8(146.842mm,58.598mm) on Top Layer And Track (145.741mm,49.077mm)(145.741mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-9(141.097mm,58.598mm) on Top Layer And Track (142.198mm,49.077mm)(142.198mm,59.229mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(151.435mm,60.764mm) on Top Overlay And Track (152.063mm,61.498mm)(153.963mm,61.498mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(151.435mm,60.764mm) on Top Overlay And Via (152.063mm,61.498mm) from Top Layer to Bottom Layer [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.295mm,50.267mm) on Top Layer And Track (148.387mm,50.35mm)(177.216mm,50.35mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.295mm,50.267mm) on Top Layer And Track (148.387mm,51.366mm)(177.089mm,51.366mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-(174.295mm,60.764mm) on Top Layer And Track (148.387mm,59.367mm)(177.089mm,59.367mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.295mm,60.764mm) on Top Layer And Track (148.387mm,60.383mm)(177.216mm,60.383mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-1(156.515mm,50.267mm) on Top Layer And Track (148.387mm,50.35mm)(177.216mm,50.35mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-1(156.515mm,50.267mm) on Top Layer And Track (148.387mm,51.366mm)(177.089mm,51.366mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-10(161.595mm,60.764mm) on Top Layer And Track (148.387mm,59.367mm)(177.089mm,59.367mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-10(161.595mm,60.764mm) on Top Layer And Track (148.387mm,60.383mm)(177.216mm,60.383mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-11(159.055mm,60.764mm) on Top Layer And Track (148.387mm,59.367mm)(177.089mm,59.367mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-11(159.055mm,60.764mm) on Top Layer And Track (148.387mm,60.383mm)(177.216mm,60.383mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-12(156.515mm,60.764mm) on Top Layer And Track (148.387mm,59.367mm)(177.089mm,59.367mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-12(156.515mm,60.764mm) on Top Layer And Track (148.387mm,60.383mm)(177.216mm,60.383mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-2(159.055mm,50.267mm) on Top Layer And Track (148.387mm,50.35mm)(177.216mm,50.35mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-2(159.055mm,50.267mm) on Top Layer And Track (148.387mm,51.366mm)(177.089mm,51.366mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-3(161.595mm,50.267mm) on Top Layer And Track (148.387mm,50.35mm)(177.216mm,50.35mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-3(161.595mm,50.267mm) on Top Layer And Track (148.387mm,51.366mm)(177.089mm,51.366mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-4(164.135mm,50.267mm) on Top Layer And Track (148.387mm,50.35mm)(177.216mm,50.35mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-4(164.135mm,50.267mm) on Top Layer And Track (148.387mm,51.366mm)(177.089mm,51.366mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-5(166.675mm,50.267mm) on Top Layer And Track (148.387mm,50.35mm)(177.216mm,50.35mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-5(166.675mm,50.267mm) on Top Layer And Track (148.387mm,51.366mm)(177.089mm,51.366mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-6(169.215mm,50.267mm) on Top Layer And Track (148.387mm,50.35mm)(177.216mm,50.35mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-6(169.215mm,50.267mm) on Top Layer And Track (148.387mm,51.366mm)(177.089mm,51.366mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-7(169.215mm,60.764mm) on Top Layer And Track (148.387mm,59.367mm)(177.089mm,59.367mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-7(169.215mm,60.764mm) on Top Layer And Track (148.387mm,60.383mm)(177.216mm,60.383mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-8(166.675mm,60.764mm) on Top Layer And Track (148.387mm,59.367mm)(177.089mm,59.367mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-8(166.675mm,60.764mm) on Top Layer And Track (148.387mm,60.383mm)(177.216mm,60.383mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-9(164.135mm,60.764mm) on Top Layer And Track (148.387mm,59.367mm)(177.089mm,59.367mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-9(164.135mm,60.764mm) on Top Layer And Track (148.387mm,60.383mm)(177.216mm,60.383mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U6-4(160.228mm,61.577mm) on Bottom Layer And Track (160.723mm,61.331mm)(161.634mm,61.331mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U6-5(162.128mm,61.577mm) on Bottom Layer And Track (160.723mm,61.331mm)(161.634mm,61.331mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U7-5(152.063mm,59.203mm) on Bottom Layer And Text "C8" (152.324mm,58.928mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U7-5(152.063mm,59.203mm) on Bottom Layer And Track (152.558mm,59.449mm)(153.468mm,59.449mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Rule Violations :152
|
||||
|
||||
Processing Rule : Silk to Silk (Clearance=0.254mm) (All),(All)
|
||||
Violation between Silk To Silk Clearance Constraint: (0.107mm < 0.254mm) Between Arc (151.18mm,59.544mm) on Bottom Overlay And Text "C8" (152.324mm,58.928mm) on Bottom Overlay Silk Text to Silk Clearance [0.107mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Arc (151.345mm,61.65mm) on Bottom Overlay And Text "U1" (151.075mm,61.564mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "+" (158.969mm,59.818mm) on Bottom Overlay And Track (159.627mm,59.529mm)(159.627mm,61.331mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "BT1" (161.864mm,62.79mm) on Bottom Overlay And Text "U6" (162.887mm,62.97mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C?" (149.758mm,52.846mm) on Bottom Overlay And Text "C10" (147.599mm,52.162mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C?" (149.758mm,52.846mm) on Bottom Overlay And Text "R?" (151.917mm,52.821mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (0.159mm < 0.254mm) Between Text "C?" (149.758mm,52.846mm) on Bottom Overlay And Track (150.121mm,53.218mm)(150.617mm,53.218mm) on Bottom Overlay Silk Text to Silk Clearance [0.159mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C1" (145.618mm,52.162mm) on Bottom Overlay And Text "C10" (147.599mm,52.162mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C1" (145.618mm,52.162mm) on Bottom Overlay And Text "R1" (146.609mm,52.162mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (0.173mm < 0.254mm) Between Text "C1" (145.618mm,52.162mm) on Bottom Overlay And Track (143.464mm,53.218mm)(143.464mm,53.714mm) on Bottom Overlay Silk Text to Silk Clearance [0.173mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C1" (145.618mm,52.162mm) on Bottom Overlay And Track (143.464mm,53.218mm)(143.96mm,53.218mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C10" (147.599mm,52.162mm) on Bottom Overlay And Text "R1" (146.609mm,52.162mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (0.123mm < 0.254mm) Between Text "C10" (147.599mm,52.162mm) on Bottom Overlay And Track (143.464mm,53.218mm)(143.464mm,53.714mm) on Bottom Overlay Silk Text to Silk Clearance [0.123mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C10" (147.599mm,52.162mm) on Bottom Overlay And Track (143.464mm,53.218mm)(143.96mm,53.218mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C11" (148.369mm,62.84mm) on Bottom Overlay And Text "C9" (151.079mm,63.144mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C8" (152.324mm,58.928mm) on Bottom Overlay And Track (150.121mm,60.37mm)(150.617mm,60.37mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C8" (152.324mm,58.928mm) on Bottom Overlay And Track (150.617mm,59.875mm)(150.617mm,60.37mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C8" (152.324mm,58.928mm) on Bottom Overlay And Track (151.462mm,59.449mm)(151.462mm,61.252mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (0.031mm < 0.254mm) Between Text "C8" (152.324mm,58.928mm) on Bottom Overlay And Track (152.558mm,59.449mm)(153.468mm,59.449mm) on Bottom Overlay Silk Text to Silk Clearance [0.031mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "C9" (151.079mm,63.144mm) on Bottom Overlay And Text "U1" (151.075mm,61.564mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (0.057mm < 0.254mm) Between Text "R?" (151.917mm,52.821mm) on Bottom Overlay And Track (150.121mm,53.218mm)(150.617mm,53.218mm) on Bottom Overlay Silk Text to Silk Clearance [0.057mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (0.082mm < 0.254mm) Between Text "R?" (151.917mm,52.821mm) on Bottom Overlay And Track (150.617mm,53.218mm)(150.617mm,53.714mm) on Bottom Overlay Silk Text to Silk Clearance [0.082mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "TX" (140.589mm,52.756mm) on Bottom Overlay And Track (139.648mm,49.54mm)(139.648mm,53.692mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "TX" (140.589mm,52.756mm) on Bottom Overlay And Track (139.648mm,53.692mm)(140.341mm,53.692mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Rule Violations :24
|
||||
|
||||
Processing Rule : Net Antennae (Tolerance=0mm) (All)
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
|
||||
Rule Violations :0
|
||||
|
||||
|
||||
Violations Detected : 280
|
||||
Waived Violations : 0
|
||||
Time Elapsed : 00:00:01
|
||||
1176
植物探头/使用时间监测模块/Design Rule Check - PCB1.html
Normal file
1176
植物探头/使用时间监测模块/Design Rule Check - PCB1.html
Normal file
File diff suppressed because it is too large
Load Diff
BIN
植物探头/使用时间监测模块/LM340-5.PcbLib
Normal file
BIN
植物探头/使用时间监测模块/LM340-5.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/使用时间监测模块/MAX40200AUK+T.PcbLib
Normal file
BIN
植物探头/使用时间监测模块/MAX40200AUK+T.PcbLib
Normal file
Binary file not shown.
BIN
植物探头/使用时间监测模块/MS920SE FL27E.PcbLib
Normal file
BIN
植物探头/使用时间监测模块/MS920SE FL27E.PcbLib
Normal file
Binary file not shown.
Binary file not shown.
@ -38,6 +38,74 @@ PrefsVaultGUID=
|
||||
PrefsRevisionGUID=
|
||||
|
||||
[Document1]
|
||||
DocumentPath=117.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
AnnotationIndexControlEnabled=0
|
||||
AnnotateSuffix=
|
||||
AnnotateScope=All
|
||||
AnnotateOrder=-1
|
||||
DoLibraryUpdate=1
|
||||
DoDatabaseUpdate=1
|
||||
ClassGenCCAutoEnabled=1
|
||||
ClassGenCCAutoRoomEnabled=1
|
||||
ClassGenNCAutoScope=None
|
||||
DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=CLOVGEAG
|
||||
|
||||
[Document2]
|
||||
DocumentPath=MAX40200AUK+T.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
AnnotationIndexControlEnabled=0
|
||||
AnnotateSuffix=
|
||||
AnnotateScope=All
|
||||
AnnotateOrder=-1
|
||||
DoLibraryUpdate=1
|
||||
DoDatabaseUpdate=1
|
||||
ClassGenCCAutoEnabled=1
|
||||
ClassGenCCAutoRoomEnabled=1
|
||||
ClassGenNCAutoScope=None
|
||||
DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=SGHXNDPL
|
||||
|
||||
[Document3]
|
||||
DocumentPath=XAL4020-102ME.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
AnnotationIndexControlEnabled=0
|
||||
AnnotateSuffix=
|
||||
AnnotateScope=All
|
||||
AnnotateOrder=-1
|
||||
DoLibraryUpdate=1
|
||||
DoDatabaseUpdate=1
|
||||
ClassGenCCAutoEnabled=1
|
||||
ClassGenCCAutoRoomEnabled=1
|
||||
ClassGenNCAutoScope=None
|
||||
DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=FOCXOKOP
|
||||
|
||||
[Document4]
|
||||
DocumentPath=TLV62568A.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
AnnotationIndexControlEnabled=0
|
||||
AnnotateSuffix=
|
||||
AnnotateScope=All
|
||||
AnnotateOrder=-1
|
||||
DoLibraryUpdate=1
|
||||
DoDatabaseUpdate=1
|
||||
ClassGenCCAutoEnabled=1
|
||||
ClassGenCCAutoRoomEnabled=1
|
||||
ClassGenNCAutoScope=None
|
||||
DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=TLSTNFSJ
|
||||
|
||||
[Document5]
|
||||
DocumentPath=SW.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
@ -54,7 +122,7 @@ DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=LXDCRWHM
|
||||
|
||||
[Document2]
|
||||
[Document6]
|
||||
DocumentPath=CNJMA2001WR-S-2P.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
@ -71,7 +139,7 @@ DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=INPGMSFR
|
||||
|
||||
[Document3]
|
||||
[Document7]
|
||||
DocumentPath=0603.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
@ -88,58 +156,7 @@ DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=BIUPNOXY
|
||||
|
||||
[Document4]
|
||||
DocumentPath=..\..\air\С<><D0A1>\VK1650.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
AnnotationIndexControlEnabled=0
|
||||
AnnotateSuffix=
|
||||
AnnotateScope=All
|
||||
AnnotateOrder=-1
|
||||
DoLibraryUpdate=1
|
||||
DoDatabaseUpdate=1
|
||||
ClassGenCCAutoEnabled=1
|
||||
ClassGenCCAutoRoomEnabled=1
|
||||
ClassGenNCAutoScope=None
|
||||
DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=ELLVDYJE
|
||||
|
||||
[Document5]
|
||||
DocumentPath=..\..\air\С<><D0A1>\LM340.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
AnnotationIndexControlEnabled=0
|
||||
AnnotateSuffix=
|
||||
AnnotateScope=All
|
||||
AnnotateOrder=-1
|
||||
DoLibraryUpdate=1
|
||||
DoDatabaseUpdate=1
|
||||
ClassGenCCAutoEnabled=1
|
||||
ClassGenCCAutoRoomEnabled=1
|
||||
ClassGenNCAutoScope=None
|
||||
DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=LFBRLLME
|
||||
|
||||
[Document6]
|
||||
DocumentPath=..\..\air\С<><D0A1>\AMS1117-3.3.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
AnnotationIndexControlEnabled=0
|
||||
AnnotateSuffix=
|
||||
AnnotateScope=All
|
||||
AnnotateOrder=-1
|
||||
DoLibraryUpdate=1
|
||||
DoDatabaseUpdate=1
|
||||
ClassGenCCAutoEnabled=1
|
||||
ClassGenCCAutoRoomEnabled=1
|
||||
ClassGenNCAutoScope=None
|
||||
DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=JMSULWYB
|
||||
|
||||
[Document7]
|
||||
[Document8]
|
||||
DocumentPath=s8550.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
@ -156,7 +173,7 @@ DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=YEHQBMNG
|
||||
|
||||
[Document8]
|
||||
[Document9]
|
||||
DocumentPath=FC-135.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
@ -173,7 +190,7 @@ DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=FQOKAWCL
|
||||
|
||||
[Document9]
|
||||
[Document10]
|
||||
DocumentPath=GS2040AR-CR.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
@ -190,7 +207,7 @@ DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=XHCRLJYY
|
||||
|
||||
[Document10]
|
||||
[Document11]
|
||||
DocumentPath=esp32-picp-d4.PcbLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
@ -207,7 +224,7 @@ DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=YQPQVROV
|
||||
|
||||
[Document11]
|
||||
[Document12]
|
||||
DocumentPath=Sheet1.SchDoc
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
@ -224,7 +241,7 @@ DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=EOQQGAML
|
||||
|
||||
[Document12]
|
||||
[Document13]
|
||||
DocumentPath=PCB1.PcbDoc
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
@ -241,23 +258,6 @@ DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=IMPPCEGS
|
||||
|
||||
[Document13]
|
||||
DocumentPath=..\..\air\С<><D0A1>\LMZ21701.SchLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
AnnotationIndexControlEnabled=0
|
||||
AnnotateSuffix=
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||||
AnnotateScope=All
|
||||
AnnotateOrder=-1
|
||||
DoLibraryUpdate=1
|
||||
DoDatabaseUpdate=1
|
||||
ClassGenCCAutoEnabled=1
|
||||
ClassGenCCAutoRoomEnabled=1
|
||||
ClassGenNCAutoScope=None
|
||||
DItemRevisionGUID=
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||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=BVKMUSVW
|
||||
|
||||
[Document14]
|
||||
DocumentPath=1N4001W.PcbLib
|
||||
AnnotationEnabled=1
|
||||
@ -275,6 +275,23 @@ DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=BVJNXFNT
|
||||
|
||||
[Document15]
|
||||
DocumentPath=TLV62568A.SchLib
|
||||
AnnotationEnabled=1
|
||||
AnnotateStartValue=1
|
||||
AnnotationIndexControlEnabled=0
|
||||
AnnotateSuffix=
|
||||
AnnotateScope=All
|
||||
AnnotateOrder=-1
|
||||
DoLibraryUpdate=1
|
||||
DoDatabaseUpdate=1
|
||||
ClassGenCCAutoEnabled=1
|
||||
ClassGenCCAutoRoomEnabled=1
|
||||
ClassGenNCAutoScope=None
|
||||
DItemRevisionGUID=
|
||||
GenerateClassCluster=0
|
||||
DocumentUniqueId=XNYTWASM
|
||||
|
||||
[GeneratedDocument1]
|
||||
DocumentPath=Project Outputs for PCB_Project2\Design Rule Check - PCB1.html
|
||||
DItemRevisionGUID=
|
||||
|
||||
@ -0,0 +1,76 @@
|
||||
Removed Pin From Net: NetName=GND Pin=C14-1
|
||||
Removed Pin From Net: NetName=+5 Pin=C14-2
|
||||
Removed Pin From Net: NetName=GND Pin=C15-1
|
||||
Removed Pin From Net: NetName=+5 Pin=C15-2
|
||||
Removed Pin From Net: NetName=GND Pin=C16-1
|
||||
Removed Pin From Net: NetName=IO34 ADC Pin=C16-2
|
||||
Removed Pin From Net: NetName=IO34 ADC Pin=D?-1
|
||||
Removed Pin From Net: NetName=+3.3 Pin=D?-2
|
||||
Removed Pin From Net: NetName=GND Pin=U3-1
|
||||
Removed Pin From Net: NetName=IO34 ADC Pin=U3-2
|
||||
Removed Pin From Net: NetName=+5 Pin=U3-3
|
||||
Removed Pin From Net: NetName=IO34 ADC Pin=U3-4
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C16
|
||||
Removed Member From Class: ClassName=Sheet1 Member=D?
|
||||
Removed Member From Class: ClassName=Sheet1 Member=U3
|
||||
Change Component Comment : Designator=C14 Old Comment=Cap New Comment=10uF
|
||||
Change Component Comment : Designator=C15 Old Comment=Cap New Comment=22uF/25V
|
||||
Change Component Designator: OldDesignator=R? NewDesignator=R3
|
||||
Change component parameters: Designator = "C14"; Footprint = "6-0805_N"; UniqueID = "\KEXGXJDS"
|
||||
Change component parameters. Clean all parameters for all variants
|
||||
Change component parameters (AddParameter): Name = "Add into BOM"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Convert to PCB"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Device"; Value = "10uF"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Manufacturer"; Value = "FH"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Manufacturer Part"; Value = "0805X106K160NT"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Name"; Value = "10uF"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Origin Footprint"; Value = "C0805"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Supplier"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Supplier Part"; Value = "C89189"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Symbol"; Value = "10uF"; VariantName = "[No Variations]"
|
||||
Change component parameters: Designator = "C15"; Footprint = "6-0805_N"; UniqueID = "\SNPXTYOC"
|
||||
Change component parameters. Clean all parameters for all variants
|
||||
Change component parameters (AddParameter): Name = "A_Ԫ<5F><D4AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"; Value = "C45783"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Add into BOM"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "B_Ԫ<5F><D4AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"; Value = "22uF (226) <20><>20% 25V"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "C_Ԫ<5F><D4AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"; Value = "<22><>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Convert to PCB"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "D_Ԫ<5F><D4AA><EFBFBD>ͺ<EFBFBD>"; Value = "CL21A226MAQNNNE"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Device"; Value = "22uF/25V"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "E_<45><5F>װ<EFBFBD><D7B0><EFBFBD><EFBFBD>"; Value = "0805"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "F_<46><5F>ֵ(<28><>)/<2F><>ֵ(uF)"; Value = "22.0000000000"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "G_<47><5F>ѹ"; Value = "25.00"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "H_<48><5F><EFBFBD><EFBFBD>"; Value = "<22><>20%"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "I_<49><5F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"; Value = "2"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "J_Ʒ<5F>Ʋ<EFBFBD><C6B2><EFBFBD>"; Value = "SAMSUNG(<28><><EFBFBD><EFBFBD>)"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Manufacturer"; Value = "FH"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Manufacturer Part"; Value = "0805F226M100NT"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Name"; Value = "22uF/25V"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Origin Footprint"; Value = "C 0805"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Supplier"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Supplier Part"; Value = "C67101"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Symbol"; Value = "22uF/25V"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Value"; Value = "22uF/25V"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "<22><><EFBFBD><EFBFBD>/Ԫ<><D4AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"; Value = "0.134"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "ԭ<><D4AD>"; Value = "SZLY"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "<22><>ע"; Value = "<22><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƬԪ<C6AC><D4AA><EFBFBD><EFBFBD>"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=R4(6-0805_N)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "Add into BOM"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Convert to PCB"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Device"; Value = "10k"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Manufacturer Part"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Name"; Value = "10k"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Origin Footprint"; Value = "R0603"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Supplier"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Supplier Part"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Symbol"; Value = "10k"; VariantName = "[No Variations]"
|
||||
Added Pin To Net: NetName=+5 Pin=C14-1
|
||||
Added Pin To Net: NetName=GND Pin=C14-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=C15-1
|
||||
Added Pin To Net: NetName=GND Pin=C15-2
|
||||
Added Pin To Net: NetName=+5 Pin=R4-1
|
||||
Added Pin To Net: NetName=NetQ?_1 Pin=R4-2
|
||||
Added Net: Name=NetQ?_1
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component R4 10k
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,69 @@
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C4-1
|
||||
Removed Pin From Net: NetName=GND Pin=C4-2
|
||||
Removed Pin From Net: NetName=+5 Pin=R4-1
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C4
|
||||
Removed Member From Class: ClassName=Sheet1 Member=R4
|
||||
Added Component: Designator=BT1(BAT-2)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Battery; 2 Leads"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "BAT-2"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "24-Mar-1999"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=C?(RAD-0.3)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "0.1<EFBFBD><EFBFBD>F"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=D1(SMC)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "Code_JEDEC"; Value = "DO-214-AB"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "DO-214-AB/SMC; 2 C-Bend Leads; Body 7.9 x 5.9 mm, inc. leads (LxW)"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "SMC"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-1996"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=D2(SMC)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "Code_JEDEC"; Value = "DO-214-AB"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "DO-214-AB/SMC; 2 C-Bend Leads; Body 7.9 x 5.9 mm, inc. leads (LxW)"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "SMC"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageVersion"; Value = "Sep-1996"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=R?(AXIAL-0.3)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "10k/20K"; VariantName = "[No Variations]"
|
||||
Added Pin To Net: NetName=GND Pin=BT1-2
|
||||
Added Pin To Net: NetName=GND Pin=C?-1
|
||||
Added Pin To Net: NetName=IO34 ADC Pin=C?-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=D1-1
|
||||
Added Pin To Net: NetName=+3.3 Pin=R?-1
|
||||
Added Pin To Net: NetName=IO34 ADC Pin=R?-2
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=D2-2
|
||||
Added Net: Name=+3.3-2
|
||||
Added Pin To Net: NetName=NetBT1_1 Pin=BT1-1
|
||||
Added Pin To Net: NetName=NetBT1_1 Pin=D1-2
|
||||
Added Pin To Net: NetName=NetBT1_1 Pin=D2-1
|
||||
Added Net: Name=NetBT1_1
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component BT1 MS920SE
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component C? Cap
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component D1 Diode
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component D2 Diode
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component R? Res1
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,32 @@
|
||||
Added Component: Designator=U1(esp32-pico-d4)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "BOM_JLCPCB Part Class"; Value = "Extended Part"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Manufacturer"; Value = "Espressif Systems"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Manufacturer Part"; Value = "ESP32-PICO-D4"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Supplier"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Supplier Part"; Value = "C193707"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Contributor"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Frequency"; Value = "-"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "spicePre"; Value = "U"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "spiceSymbolName"; Value = "ESP32-PICO-D4"; VariantName = "[No Variations]"
|
||||
Added Pin To Net: NetName=+3.3 Pin=U1-1
|
||||
Added Pin To Net: NetName=+3.3 Pin=U1-3
|
||||
Added Pin To Net: NetName=+3.3 Pin=U1-4
|
||||
Added Pin To Net: NetName=EN Pin=U1-9
|
||||
Added Pin To Net: NetName=IO34 ADC Pin=U1-10
|
||||
Added Pin To Net: NetName=NetC6_2 Pin=U1-12
|
||||
Added Pin To Net: NetName=NetC7_2 Pin=U1-13
|
||||
Added Pin To Net: NetName=CLK Pin=U1-14
|
||||
Added Pin To Net: NetName=DAT Pin=U1-15
|
||||
Added Pin To Net: NetName=+3.3 Pin=U1-19
|
||||
Added Pin To Net: NetName=GND Pin=U1-22
|
||||
Added Pin To Net: NetName=IO0 Pin=U1-23
|
||||
Added Pin To Net: NetName=SW Pin=U1-24
|
||||
Added Pin To Net: NetName=+3.3 Pin=U1-37
|
||||
Added Pin To Net: NetName=U0RXD Pin=U1-40
|
||||
Added Pin To Net: NetName=U0TXD Pin=U1-41
|
||||
Added Pin To Net: NetName=+3.3 Pin=U1-43
|
||||
Added Pin To Net: NetName=+3.3 Pin=U1-46
|
||||
Added Pin To Net: NetName=GND Pin=U1-49
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component U1 ESP32-PICO-D4
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,30 @@
|
||||
Removed Pin From Net: NetName=GND Pin=C5-1
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C5-2
|
||||
Removed Pin From Net: NetName=GND Pin=C6-1
|
||||
Removed Pin From Net: NetName=GND Pin=C7-1
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C15-1
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C17-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C18-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=D1-1
|
||||
Removed Pin From Net: NetName=+3.3 Pin=R1-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=R2-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=R3-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=R?-1
|
||||
Removed Pin From Net: NetName=+3.3 Pin=U4-10
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C5
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C6
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C7
|
||||
Removed Member From Class: ClassName=Sheet1 Member=Y?
|
||||
Added Pin To Net: NetName=+3.3 Pin=D2-2
|
||||
Change Net Name : Old Net Name=+3.3 New Net Name=+3.3-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=C15-1
|
||||
Added Pin To Net: NetName=+3.3 Pin=C17-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=C18-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=D1-1
|
||||
Added Pin To Net: NetName=+3.3 Pin=R1-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=R2-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=R3-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=R?-1
|
||||
Added Pin To Net: NetName=+3.3 Pin=U4-10
|
||||
Added Net: Name=+3.3
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,97 @@
|
||||
Added Component: Designator=C1(0402)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "BOM_Manufacturer Part"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Supplier"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Supplier Part"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Contributor"; Value = "LCEDA_Lib"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "nameAlias"; Value = "Value(F)"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "spicePre"; Value = "C"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "spiceSymbolName"; Value = "C_0603_US"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=C2(0402)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "0.1<EFBFBD><EFBFBD>F"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=C3(0402)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "1<><31>F"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=C8(0402)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "0.1<EFBFBD><EFBFBD>F"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=C9(0402)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "0.1<EFBFBD><EFBFBD>F"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=C10(0402)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "0.1<EFBFBD><EFBFBD>F"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=C11(0402)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "1<><31>F"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=R1(0402)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "BOM_Manufacturer Part"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Supplier"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Supplier Part"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Contributor"; Value = "LCEDA_Lib"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "nameAlias"; Value = "Value(<28><>)"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "spicePre"; Value = "R"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "spiceSymbolName"; Value = "R_0603_US"; VariantName = "[No Variations]"
|
||||
Added Pin To Net: NetName=GND Pin=C1-1
|
||||
Added Pin To Net: NetName=EN Pin=C1-2
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=C2-1
|
||||
Added Pin To Net: NetName=GND Pin=C2-2
|
||||
Added Pin To Net: NetName=GND Pin=C3-1
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=C3-2
|
||||
Added Pin To Net: NetName=GND Pin=C8-1
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=C8-2
|
||||
Added Pin To Net: NetName=GND Pin=C9-1
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=C9-2
|
||||
Added Pin To Net: NetName=GND Pin=C10-1
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=C10-2
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=C11-1
|
||||
Added Pin To Net: NetName=GND Pin=C11-2
|
||||
Added Pin To Net: NetName=EN Pin=R1-1
|
||||
Added Pin To Net: NetName=+3.3 Pin=R1-2
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component C1 1u
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component C2 Cap
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component C3 Cap
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component C8 Cap
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component C9 Cap
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component C10 Cap
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component C11 Cap
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component R1 10k
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,5 @@
|
||||
Change Component Footprint: Designator=R? Old Footprint=AXIAL-0.3 New Footprint=6-0805_N
|
||||
Change Component Footprint: Designator=C? Old Footprint=RAD-0.3 New Footprint=6-0805_N
|
||||
Change Component Footprint: Designator=D1 Old Footprint=SMC New Footprint=1N4001W
|
||||
Change Component Footprint: Designator=D2 Old Footprint=SMC New Footprint=1N4001W
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,2 @@
|
||||
Change Component Footprint: Designator=U2 Old Footprint=LM340 New Footprint=LM340-5
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1 @@
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,18 @@
|
||||
Added Component: Designator=U3(ASM1117-3.3)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "Add into BOM"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Convert to PCB"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Device"; Value = "AMS117"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "link"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Manufacturer"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Manufacturer Part"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Name"; Value = "AMS117"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Origin Footprint"; Value = "AMS117-3.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Supplier"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Supplier Part"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Symbol"; Value = "AMS117"; VariantName = "[No Variations]"
|
||||
Added Pin To Net: NetName=GND Pin=U3-1
|
||||
Added Pin To Net: NetName=+3.3 Pin=U3-2
|
||||
Added Pin To Net: NetName=+5 Pin=U3-3
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component U3 AMS117
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,2 @@
|
||||
Change Component Footprint: Designator=BT1 Old Footprint=BAT-2 New Footprint=MS920SE FL27E
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,12 @@
|
||||
Added Component: Designator=BT1(MS920SE FL27E)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Battery; 2 Leads"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "BAT-2"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "24-Mar-1999"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Added Pin To Net: NetName=NetBT1_1 Pin=BT1-1
|
||||
Added Pin To Net: NetName=GND Pin=BT1-2
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component BT1 MS920SE
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,27 @@
|
||||
Removed Pin From Net: NetName=+3.3 Pin=D1-1
|
||||
Removed Pin From Net: NetName=NetBT1_1 Pin=D1-2
|
||||
Removed Pin From Net: NetName=NetBT1_1 Pin=D2-1
|
||||
Removed Pin From Net: NetName=+3.3-2 Pin=D2-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=R1-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=R2-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=R3-2
|
||||
Removed Member From Class: ClassName=Sheet1 Member=D1
|
||||
Removed Member From Class: ClassName=Sheet1 Member=D2
|
||||
Added Component: Designator=U6(MAX40200AUK+T)
|
||||
Add component. Clean all parameters for all variants
|
||||
Added Component: Designator=U7(MAX40200AUK+T)
|
||||
Add component. Clean all parameters for all variants
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=R1-2
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=R2-2
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=R3-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=U6-1
|
||||
Added Pin To Net: NetName=GND Pin=U6-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=U6-3
|
||||
Added Pin To Net: NetName=NetBT1_1 Pin=U6-5
|
||||
Added Pin To Net: NetName=NetBT1_1 Pin=U7-1
|
||||
Added Pin To Net: NetName=GND Pin=U7-2
|
||||
Added Pin To Net: NetName=NetBT1_1 Pin=U7-3
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=U7-5
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component U6 MAX40200AUK+T
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component U7 MAX40200AUK+T
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,7 @@
|
||||
Removed Pin From Net: NetName=+3.3-2 Pin=C2-1
|
||||
Removed Pin From Net: NetName=GND Pin=C2-2
|
||||
Removed Pin From Net: NetName=GND Pin=C3-1
|
||||
Removed Pin From Net: NetName=+3.3-2 Pin=C3-2
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C2
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C3
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,129 @@
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C2-1
|
||||
Removed Pin From Net: NetName=GND Pin=C2-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C5-2
|
||||
Removed Pin From Net: NetName=GND Pin=C6-1
|
||||
Removed Pin From Net: NetName=GND Pin=C7-1
|
||||
Removed Pin From Net: NetName=GND Pin=C9-1
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C9-2
|
||||
Removed Pin From Net: NetName=GND Pin=C10-1
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C10-2
|
||||
Removed Pin From Net: NetName=+5 Pin=C15-2
|
||||
Removed Pin From Net: NetName=GND Pin=C16-1
|
||||
Removed Pin From Net: NetName=IO34 ADC Pin=C16-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C17-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C18-2
|
||||
Removed Pin From Net: NetName=IO34 ADC Pin=D?-1
|
||||
Removed Pin From Net: NetName=+3.3 Pin=D?-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=U1-4
|
||||
Removed Pin From Net: NetName=GND Pin=U3-1
|
||||
Removed Pin From Net: NetName=IO34 ADC Pin=U3-2
|
||||
Removed Pin From Net: NetName=IO34 ADC Pin=U3-4
|
||||
Removed Pin From Net: NetName=+3.3 Pin=U4-10
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C2
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C6
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C7
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C9
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C10
|
||||
Removed Member From Class: ClassName=Sheet1 Member=D?
|
||||
Removed Member From Class: ClassName=Sheet1 Member=Y?
|
||||
Change Component Footprint: Designator=C14 Old Footprint=6-0805_N New Footprint=RAD-0.3
|
||||
Change Component Footprint: Designator=C15 Old Footprint=6-0805_N New Footprint=RAD-0.3
|
||||
Change Component Footprint: Designator=C16 Old Footprint=6-0805_N New Footprint=RAD-0.3
|
||||
Change Component Comment : Designator=U3 Old Comment= New Comment=TLV62568A
|
||||
Change Component Designator: OldDesignator=C17 NewDesignator=C18
|
||||
Change Component Designator: OldDesignator=C18 NewDesignator=C19
|
||||
Change Component Designator: OldDesignator=R? NewDesignator=R3
|
||||
Change Component Designator: OldDesignator=U4 NewDesignator=U5
|
||||
Change Component Designator: OldDesignator=U5 NewDesignator=U6
|
||||
Change component parameters: Designator = "C14"; Footprint = "RAD-0.3"; UniqueID = "\WMNPPNUP"
|
||||
Change component parameters. Clean all parameters for all variants
|
||||
Change component parameters (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Value"; Value = "4.7<EFBFBD><EFBFBD>F"; VariantName = "[No Variations]"
|
||||
Change component parameters: Designator = "C15"; Footprint = "RAD-0.3"; UniqueID = "\NCFGQGJL"
|
||||
Change component parameters. Clean all parameters for all variants
|
||||
Change component parameters (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Value"; Value = "22<32><32>F"; VariantName = "[No Variations]"
|
||||
Change component parameters: Designator = "C16"; Footprint = "RAD-0.3"; UniqueID = "\NYURCQQB"
|
||||
Change component parameters. Clean all parameters for all variants
|
||||
Change component parameters (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Value"; Value = "10pF"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=C17(RAD-0.3)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Radial Cap, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "RAD-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "100pF"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=R4(AXIAL-0.3)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "1K"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=R5(AXIAL-0.3)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "1K"; VariantName = "[No Variations]"
|
||||
Added Component: Designator=R6(AXIAL-0.3)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageDescription"; Value = "Axial Device, Thru-Hole; 2 Leads; 0.3 in Pin Spacing"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "PackageReference"; Value = "AXIAL-0.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Published"; Value = "8-Jun-2000"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Value"; Value = "1K"; VariantName = "[No Variations]"
|
||||
Added Pin To Net: NetName=GND Pin=C17-1
|
||||
Added Pin To Net: NetName=IO34 ADC Pin=C17-2
|
||||
Added Pin To Net: NetName=GND Pin=R5-1
|
||||
Added Pin To Net: NetName=IO34 ADC Pin=R6-2
|
||||
Added Pin To Net: NetName=GND Pin=U3-2
|
||||
Change Net Name : Old Net Name=+3.3 New Net Name=+3.3-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=C5-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=C15-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=C16-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=C18-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=C19-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=R4-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=R6-1
|
||||
Added Pin To Net: NetName=+3.3 Pin=U1-4
|
||||
Added Pin To Net: NetName=+3.3 Pin=U5-10
|
||||
Added Net: Name=+3.3
|
||||
Added Pin To Net: NetName=NetC16_1 Pin=C16-1
|
||||
Added Pin To Net: NetName=NetC16_1 Pin=R4-1
|
||||
Added Pin To Net: NetName=NetC16_1 Pin=R5-2
|
||||
Added Pin To Net: NetName=NetC16_1 Pin=U3-1
|
||||
Added Net: Name=NetC16_1
|
||||
Added Pin To Net: NetName=NetPL?_1 Pin=U3-4
|
||||
Added Net: Name=NetPL?_1
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component C19 Cap
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component R4 Res1
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component R5 Res1
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component R6 Res1
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component U6
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,2 @@
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component C12 Cap
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,5 @@
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C5-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=U1-4
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=C5-2
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=U1-4
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,30 @@
|
||||
Added Component: Designator=U1(esp32-pico-d4)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "BOM_JLCPCB Part Class"; Value = "Extended Part"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Manufacturer"; Value = "Espressif Systems"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Manufacturer Part"; Value = "ESP32-PICO-D4"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Supplier"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "BOM_Supplier Part"; Value = "C193707"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Contributor"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Frequency"; Value = "-"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "spicePre"; Value = "U"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "spiceSymbolName"; Value = "ESP32-PICO-D4"; VariantName = "[No Variations]"
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=U1-1
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=U1-3
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=U1-4
|
||||
Added Pin To Net: NetName=EN Pin=U1-9
|
||||
Added Pin To Net: NetName=IO34 ADC Pin=U1-10
|
||||
Added Pin To Net: NetName=CLK Pin=U1-14
|
||||
Added Pin To Net: NetName=DAT Pin=U1-15
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=U1-19
|
||||
Added Pin To Net: NetName=GND Pin=U1-22
|
||||
Added Pin To Net: NetName=IO0 Pin=U1-23
|
||||
Added Pin To Net: NetName=SW Pin=U1-24
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=U1-37
|
||||
Added Pin To Net: NetName=U0RXD Pin=U1-40
|
||||
Added Pin To Net: NetName=U0TXD Pin=U1-41
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=U1-43
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=U1-46
|
||||
Added Pin To Net: NetName=GND Pin=U1-49
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component U1 ESP32-PICO-D4
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,16 @@
|
||||
Change Component Footprint: Designator=R4 Old Footprint=AXIAL-0.3 New Footprint=0603
|
||||
Change Component Footprint: Designator=R5 Old Footprint=AXIAL-0.3 New Footprint=0603
|
||||
Change Component Footprint: Designator=R6 Old Footprint=AXIAL-0.3 New Footprint=0603
|
||||
Change Component Footprint: Designator=C14 Old Footprint=RAD-0.3 New Footprint=0603
|
||||
Change Component Footprint: Designator=C15 Old Footprint=RAD-0.3 New Footprint=0603
|
||||
Change Component Footprint: Designator=C16 Old Footprint=RAD-0.3 New Footprint=0603
|
||||
Change Component Footprint: Designator=C17 Old Footprint=RAD-0.3 New Footprint=0603
|
||||
Added Component: Designator=U3(TLV62568A)
|
||||
Add component. Clean all parameters for all variants
|
||||
Added Pin To Net: NetName=NetC16_1 Pin=U3-1
|
||||
Added Pin To Net: NetName=GND Pin=U3-2
|
||||
Added Pin To Net: NetName=+5 Pin=U3-3
|
||||
Added Pin To Net: NetName=NetPL?_1 Pin=U3-4
|
||||
Added Pin To Net: NetName=+5 Pin=U3-5
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component U3 TLV62568A
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,6 @@
|
||||
Added Component: Designator=PL?(XAL4020-102ME)
|
||||
Add component. Clean all parameters for all variants
|
||||
Added Pin To Net: NetName=NetPL?_1 Pin=PL?-1
|
||||
Added Pin To Net: NetName=+3.3 Pin=PL?-2
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component PL? 2.2<EFBFBD><EFBFBD>H
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,8 @@
|
||||
Added Component: Designator=U4(MAX40200AUK+T)
|
||||
Add component. Clean all parameters for all variants
|
||||
Added Pin To Net: NetName=+3.3 Pin=U4-1
|
||||
Added Pin To Net: NetName=GND Pin=U4-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=U4-3
|
||||
Added Pin To Net: NetName=+3.3-2 Pin=U4-5
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component U4 MAX40200AUK+T
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,10 @@
|
||||
Added Component: Designator=P2(HDR1X3)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "LatestRevisionDate"; Value = "17-Jul-2002"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "LatestRevisionNote"; Value = "Re-released for DXP Platform."; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Publisher"; Value = "Altium Limited"; VariantName = "[No Variations]"
|
||||
Added Pin To Net: NetName=U0TXD Pin=P2-1
|
||||
Added Pin To Net: NetName=U0RXD Pin=P2-2
|
||||
Added Pin To Net: NetName=GND Pin=P2-3
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component P2 DEBUG
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,63 @@
|
||||
Removed Pin From Net: NetName=GND Pin=C14-1
|
||||
Removed Pin From Net: NetName=+5 Pin=C14-2
|
||||
Removed Pin From Net: NetName=GND Pin=C15-1
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C15-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=C16-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=PL?-2
|
||||
Removed Pin From Net: NetName=+3.3 Pin=R4-2
|
||||
Removed Pin From Net: NetName=GND Pin=R5-1
|
||||
Removed Pin From Net: NetName=GND Pin=U3-2
|
||||
Removed Pin From Net: NetName=+5 Pin=U3-3
|
||||
Removed Pin From Net: NetName=+5 Pin=U3-5
|
||||
Removed Member From Class: ClassName=Sheet1 Member=C16
|
||||
Removed Member From Class: ClassName=Sheet1 Member=PL?
|
||||
Removed Member From Class: ClassName=Sheet1 Member=R4
|
||||
Removed Member From Class: ClassName=Sheet1 Member=R5
|
||||
Removed Member From Class: ClassName=Sheet1 Member=U3
|
||||
Change Component Footprint: Designator=C14 Old Footprint=0603 New Footprint=6-0805_N
|
||||
Change Component Footprint: Designator=C15 Old Footprint=0603 New Footprint=6-0805_N
|
||||
Change Component Comment : Designator=C14 Old Comment=Cap New Comment=10uF
|
||||
Change Component Comment : Designator=C15 Old Comment=Cap New Comment=22uF/25V
|
||||
Change component parameters: Designator = "C14"; Footprint = "6-0805_N"; UniqueID = "\QDBKEQLT"
|
||||
Change component parameters. Clean all parameters for all variants
|
||||
Change component parameters (AddParameter): Name = "Add into BOM"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Convert to PCB"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Device"; Value = "10uF"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Manufacturer"; Value = "FH"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Manufacturer Part"; Value = "0805X106K160NT"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Name"; Value = "10uF"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Origin Footprint"; Value = "C0805"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Supplier"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Supplier Part"; Value = "C89189"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Symbol"; Value = "10uF"; VariantName = "[No Variations]"
|
||||
Change component parameters: Designator = "C15"; Footprint = "6-0805_N"; UniqueID = "\MJCTGQXY"
|
||||
Change component parameters. Clean all parameters for all variants
|
||||
Change component parameters (AddParameter): Name = "A_Ԫ<5F><D4AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"; Value = "C45783"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Add into BOM"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "B_Ԫ<5F><D4AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"; Value = "22uF (226) <20><>20% 25V"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "C_Ԫ<5F><D4AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"; Value = "<22><>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Convert to PCB"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "D_Ԫ<5F><D4AA><EFBFBD>ͺ<EFBFBD>"; Value = "CL21A226MAQNNNE"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Device"; Value = "22uF/25V"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "E_<45><5F>װ<EFBFBD><D7B0><EFBFBD><EFBFBD>"; Value = "0805"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "F_<46><5F>ֵ(<28><>)/<2F><>ֵ(uF)"; Value = "22.0000000000"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "G_<47><5F>ѹ"; Value = "25.00"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "H_<48><5F><EFBFBD><EFBFBD>"; Value = "<22><>20%"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "I_<49><5F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"; Value = "2"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "J_Ʒ<5F>Ʋ<EFBFBD><C6B2><EFBFBD>"; Value = "SAMSUNG(<28><><EFBFBD><EFBFBD>)"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Manufacturer"; Value = "FH"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Manufacturer Part"; Value = "0805F226M100NT"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Name"; Value = "22uF/25V"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Origin Footprint"; Value = "C 0805"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Supplier"; Value = "LCSC"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Supplier Part"; Value = "C67101"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Symbol"; Value = "22uF/25V"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "Value"; Value = "22uF/25V"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "<22><><EFBFBD><EFBFBD>/Ԫ<><D4AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>"; Value = "0.134"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "ԭ<><D4AD>"; Value = "SZLY"; VariantName = "[No Variations]"
|
||||
Change component parameters (AddParameter): Name = "<22><>ע"; Value = "<22><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ƬԪ<C6AC><D4AA><EFBFBD><EFBFBD>"; VariantName = "[No Variations]"
|
||||
Added Pin To Net: NetName=+5 Pin=C14-1
|
||||
Added Pin To Net: NetName=GND Pin=C14-2
|
||||
Added Pin To Net: NetName=+3.3 Pin=C15-1
|
||||
Added Pin To Net: NetName=GND Pin=C15-2
|
||||
Added Room: Name=Sheet1
|
||||
@ -0,0 +1,18 @@
|
||||
Added Component: Designator=U?(1117)
|
||||
Add component. Clean all parameters for all variants
|
||||
Add component (AddParameter): Name = "Add into BOM"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Convert to PCB"; Value = "yes"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Device"; Value = "AMS117"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "link"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Manufacturer"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Manufacturer Part"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Name"; Value = "AMS117"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Origin Footprint"; Value = "AMS117-3.3"; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Supplier"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Supplier Part"; Value = ""; VariantName = "[No Variations]"
|
||||
Add component (AddParameter): Name = "Symbol"; Value = "AMS117"; VariantName = "[No Variations]"
|
||||
Added Pin To Net: NetName=GND Pin=U?-1
|
||||
Added Pin To Net: NetName=+3.3 Pin=U?-2
|
||||
Added Pin To Net: NetName=+5 Pin=U?-3
|
||||
Added Member To Class: ClassName=Sheet1 Member=Component U? AMS117
|
||||
Added Room: Name=Sheet1
|
||||
@ -1,7 +1,7 @@
|
||||
Protel Design System Design Rule Check
|
||||
PCB File : C:\Users\hu123456\Desktop\ֲ<EFBFBD><EFBFBD>̽ͷ\ʹ<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><EFBFBD>\PCB1.PcbDoc
|
||||
Date : 2022/5/7
|
||||
Time : 14:08:10
|
||||
PCB File : C:\Users\hu123456\Desktop\ʹ<><CAB9>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>\PCB1.PcbDoc
|
||||
Date : 2022/6/30
|
||||
Time : 13:25:17
|
||||
|
||||
Processing Rule : Clearance Constraint (Gap=0.2mm) (All),(All)
|
||||
Rule Violations :0
|
||||
@ -28,299 +28,235 @@ Processing Rule : Hole To Hole Clearance (Gap=0.254mm) (All),(All)
|
||||
Rule Violations :0
|
||||
|
||||
Processing Rule : Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C10-1(141.91mm,48.971mm) on Top Layer And Pad C10-2(141.91mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.062mm < 0.254mm) Between Pad C10-2(141.91mm,49.971mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.062mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C1-1(141.648mm,61.747mm) on Top Layer And Pad C1-2(140.648mm,61.747mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.237mm < 0.254mm) Between Pad C1-1(141.648mm,61.747mm) on Top Layer And Pad R1-2(141.648mm,60.808mm) on Top Layer [Top Solder] Mask Sliver [0.237mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.16mm < 0.254mm) Between Pad C1-1(141.648mm,61.747mm) on Top Layer And Via (141.402mm,62.611mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.16mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C11-1(143.241mm,49.971mm) on Top Layer And Pad C11-2(143.241mm,48.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.069mm < 0.254mm) Between Pad C11-1(143.241mm,49.971mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.069mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.057mm < 0.254mm) Between Pad C11-1(143.241mm,49.971mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.057mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.237mm < 0.254mm) Between Pad C1-2(140.648mm,61.747mm) on Top Layer And Pad R1-1(140.648mm,60.808mm) on Top Layer [Top Solder] Mask Sliver [0.237mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.138mm < 0.254mm) Between Pad C18-2(141.3mm,50.981mm) on Bottom Layer And Via (140.259mm,51.333mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.138mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C2-1(144.572mm,49.971mm) on Top Layer And Pad C2-2(144.572mm,48.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.041mm < 0.254mm) Between Pad C2-1(144.572mm,49.971mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.041mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C3-1(145.903mm,48.971mm) on Top Layer And Pad C3-2(145.903mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.248mm < 0.254mm) Between Pad C4-1(155.931mm,53.086mm) on Bottom Layer And Via (153.441mm,51.232mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.248mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.131mm < 0.254mm) Between Pad C4-2(155.931mm,60.706mm) on Bottom Layer And Via (153.441mm,61.62mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.131mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C5-1(147.234mm,48.971mm) on Top Layer And Pad C5-2(147.234mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C6-1(149.174mm,60.943mm) on Top Layer And Pad C6-2(149.174mm,61.943mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.171mm < 0.254mm) Between Pad C6-1(149.174mm,60.943mm) on Top Layer And Via (150.012mm,60.35mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.171mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C7-1(143.891mm,61.595mm) on Top Layer And Pad C7-2(143.891mm,60.595mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C8-1(142.85mm,61.587mm) on Top Layer And Pad C8-2(142.85mm,60.587mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.144mm < 0.254mm) Between Pad C8-2(142.85mm,60.587mm) on Top Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.144mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C9-1(140.579mm,48.971mm) on Top Layer And Pad C9-2(140.579mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.204mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Via (153.213mm,49.047mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.204mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.138mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Via (153.441mm,51.232mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.138mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.182mm < 0.254mm) Between Pad P1-2(175.971mm,56.139mm) on Bottom Layer And Via (175.666mm,57.125mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.182mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.097mm < 0.254mm) Between Pad P1-3(179.06mm,52.047mm) on Bottom Layer And Via (179.73mm,53.797mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.097mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.118mm < 0.254mm) Between Pad P2-2(140.894mm,58.547mm) on Bottom Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.118mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R?-1(179.638mm,60.35mm) on Top Layer And Pad R?-2(178.638mm,60.35mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R1-1(140.648mm,60.808mm) on Top Layer And Pad R1-2(141.648mm,60.808mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R2-1(151.689mm,49.563mm) on Bottom Layer And Pad R2-2(151.689mm,50.563mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.108mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Via (148.305mm,51.505mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.108mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.175mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Via (148.615mm,48.971mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.175mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.175mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Via (149.631mm,48.971mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.175mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.086mm < 0.254mm) Between Pad SW1-2(145.22mm,50.279mm) on Bottom Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.086mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.229mm < 0.254mm) Between Pad SW2-1(179.108mm,57.546mm) on Top Layer And Via (177.952mm,56.236mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.229mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Pad U1-2(147.518mm,52.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Pad U1-48(146.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,56.843mm) on Top Layer And Pad U1-11(147.518mm,57.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-10(147.518mm,56.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,56.843mm) on Top Layer And Pad U1-9(147.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-11(147.518mm,57.343mm) on Top Layer And Pad U1-12(147.518mm,57.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-11(147.518mm,57.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-12(147.518mm,57.843mm) on Top Layer And Pad U1-13(146.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-12(147.518mm,57.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-13(146.768mm,58.593mm) on Top Layer And Pad U1-14(146.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-13(146.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-14(146.268mm,58.593mm) on Top Layer And Pad U1-15(145.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-14(146.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-15(145.768mm,58.593mm) on Top Layer And Pad U1-16(145.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-15(145.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-16(145.268mm,58.593mm) on Top Layer And Pad U1-17(144.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-16(145.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-17(144.768mm,58.593mm) on Top Layer And Pad U1-18(144.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-17(144.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.244mm < 0.254mm) Between Pad U1-17(144.768mm,58.593mm) on Top Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.244mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-18(144.268mm,58.593mm) on Top Layer And Pad U1-19(143.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-18(144.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-19(143.768mm,58.593mm) on Top Layer And Pad U1-20(143.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-19(143.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-2(147.518mm,52.843mm) on Top Layer And Pad U1-3(147.518mm,53.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-2(147.518mm,52.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-20(143.268mm,58.593mm) on Top Layer And Pad U1-21(142.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-20(143.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-21(142.768mm,58.593mm) on Top Layer And Pad U1-22(142.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-21(142.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.244mm < 0.254mm) Between Pad U1-21(142.768mm,58.593mm) on Top Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.244mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Pad U1-23(141.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.237mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.237mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.245mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.245mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-23(141.768mm,58.593mm) on Top Layer And Pad U1-24(141.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-23(141.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.142mm < 0.254mm) Between Pad U1-23(141.768mm,58.593mm) on Top Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.142mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Pad U1-25(140.518mm,57.843mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.18mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.18mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Pad U1-26(140.518mm,57.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.238mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Via (140.36mm,58.674mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.238mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-26(140.518mm,57.343mm) on Top Layer And Pad U1-27(140.518mm,56.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-26(140.518mm,57.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-27(140.518mm,56.843mm) on Top Layer And Pad U1-28(140.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-27(140.518mm,56.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-28(140.518mm,56.343mm) on Top Layer And Pad U1-29(140.518mm,55.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-28(140.518mm,56.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-29(140.518mm,55.843mm) on Top Layer And Pad U1-30(140.518mm,55.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-29(140.518mm,55.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-3(147.518mm,53.343mm) on Top Layer And Pad U1-4(147.518mm,53.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-3(147.518mm,53.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-30(140.518mm,55.343mm) on Top Layer And Pad U1-31(140.518mm,54.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-30(140.518mm,55.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-31(140.518mm,54.843mm) on Top Layer And Pad U1-32(140.518mm,54.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-31(140.518mm,54.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-32(140.518mm,54.343mm) on Top Layer And Pad U1-33(140.518mm,53.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-32(140.518mm,54.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-33(140.518mm,53.843mm) on Top Layer And Pad U1-34(140.518mm,53.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-33(140.518mm,53.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-34(140.518mm,53.343mm) on Top Layer And Pad U1-35(140.518mm,52.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-34(140.518mm,53.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-35(140.518mm,52.843mm) on Top Layer And Pad U1-36(140.518mm,52.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-35(140.518mm,52.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-36(140.518mm,52.343mm) on Top Layer And Pad U1-37(141.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-36(140.518mm,52.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-37(141.268mm,51.593mm) on Top Layer And Pad U1-38(141.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-37(141.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-38(141.768mm,51.593mm) on Top Layer And Pad U1-39(142.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-38(141.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-39(142.268mm,51.593mm) on Top Layer And Pad U1-40(142.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-39(142.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.096mm < 0.254mm) Between Pad U1-39(142.268mm,51.593mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.096mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-4(147.518mm,53.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-4(147.518mm,53.843mm) on Top Layer And Pad U1-5(147.518mm,54.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-40(142.768mm,51.593mm) on Top Layer And Pad U1-41(143.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-40(142.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.092mm < 0.254mm) Between Pad U1-40(142.768mm,51.593mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.092mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-41(143.268mm,51.593mm) on Top Layer And Pad U1-42(143.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-41(143.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-42(143.768mm,51.593mm) on Top Layer And Pad U1-43(144.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-42(143.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.117mm < 0.254mm) Between Pad U1-42(143.768mm,51.593mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.117mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-43(144.268mm,51.593mm) on Top Layer And Pad U1-44(144.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-43(144.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.13mm < 0.254mm) Between Pad U1-43(144.268mm,51.593mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.13mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-44(144.768mm,51.593mm) on Top Layer And Pad U1-45(145.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-44(144.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-45(145.268mm,51.593mm) on Top Layer And Pad U1-46(145.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-45(145.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-46(145.768mm,51.593mm) on Top Layer And Pad U1-47(146.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-46(145.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-47(146.268mm,51.593mm) on Top Layer And Pad U1-48(146.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-47(146.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-48(146.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-5(147.518mm,54.343mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-6(147.518mm,54.843mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-7(147.518mm,55.343mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-8(147.518mm,55.843mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-9(147.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-5(147.518mm,54.343mm) on Top Layer And Pad U1-6(147.518mm,54.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-6(147.518mm,54.843mm) on Top Layer And Pad U1-7(147.518mm,55.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-7(147.518mm,55.343mm) on Top Layer And Pad U1-8(147.518mm,55.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-8(147.518mm,55.843mm) on Top Layer And Pad U1-9(147.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.134mm < 0.254mm) Between Pad U2-3(168.388mm,55.093mm) on Bottom Layer And Via (169.139mm,56.896mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.134mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.059mm < 0.254mm) Between Pad U3-4(163.322mm,60.706mm) on Bottom Layer And Via (161.265mm,59.055mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.059mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.051mm < 0.254mm) Between Pad U4-11(149.484mm,59.08mm) on Bottom Layer And Via (148.107mm,59.055mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.051mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.253mm < 0.254mm) Between Pad U4-4(143.739mm,56.54mm) on Bottom Layer And Via (145.161mm,57.074mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.253mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.123mm < 0.254mm) Between Pad U4-6(143.739mm,59.08mm) on Bottom Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.123mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.071mm < 0.254mm) Between Pad U4-6(143.739mm,59.08mm) on Bottom Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.071mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.16mm < 0.254mm) Between Pad U4-7(143.739mm,60.35mm) on Bottom Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.16mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.111mm < 0.254mm) Between Pad U4-7(143.739mm,60.35mm) on Bottom Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.111mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.151mm < 0.254mm) Between Pad U5-(151.384mm,50.292mm) on Top Layer And Via (151.105mm,52.146mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.151mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.018mm < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Via (150.012mm,60.35mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.018mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.095mm < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Via (152.832mm,61.011mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.095mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.12mm < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Via (152.857mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.12mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.031mm < 0.254mm) Between Pad U5-4(161.544mm,60.789mm) on Top Layer And Via (161.265mm,59.055mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.031mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.221mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.221mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.17mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Via (145.644mm,59.741mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.17mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.107mm < 0.254mm) Between Via (140.005mm,63.424mm) from Top Layer to Bottom Layer And Via (140.538mm,62.814mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.107mm] / [Bottom Solder] Mask Sliver [0.107mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.184mm < 0.254mm) Between Via (140.538mm,62.814mm) from Top Layer to Bottom Layer And Via (141.402mm,62.611mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.184mm] / [Bottom Solder] Mask Sliver [0.184mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.141mm < 0.254mm) Between Via (141.707mm,59.588mm) from Top Layer to Bottom Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.141mm] / [Bottom Solder] Mask Sliver [0.141mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.086mm < 0.254mm) Between Via (144.856mm,59.69mm) from Top Layer to Bottom Layer And Via (145.644mm,59.741mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.086mm] / [Bottom Solder] Mask Sliver [0.086mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.135mm < 0.254mm) Between Via (145.644mm,59.741mm) from Top Layer to Bottom Layer And Via (146.482mm,59.715mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.135mm] / [Bottom Solder] Mask Sliver [0.135mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.135mm < 0.254mm) Between Via (151.105mm,55.905mm) from Top Layer to Bottom Layer And Via (151.943mm,55.905mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.135mm] / [Bottom Solder] Mask Sliver [0.135mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.241mm < 0.254mm) Between Via (151.661mm,58.417mm) from Top Layer to Bottom Layer And Via (152.578mm,58.191mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.241mm] / [Bottom Solder] Mask Sliver [0.241mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.156mm < 0.254mm) Between Via (152.578mm,53.086mm) from Top Layer to Bottom Layer And Via (152.857mm,52.273mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.156mm] / [Bottom Solder] Mask Sliver [0.156mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.159mm < 0.254mm) Between Via (152.832mm,61.011mm) from Top Layer to Bottom Layer And Via (153.441mm,61.62mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.159mm] / [Bottom Solder] Mask Sliver [0.159mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.135mm < 0.254mm) Between Via (158.699mm,52.934mm) from Top Layer to Bottom Layer And Via (159.537mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.135mm] / [Bottom Solder] Mask Sliver [0.135mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.141mm < 0.254mm) Between Via (161.265mm,59.055mm) from Top Layer to Bottom Layer And Via (161.849mm,58.445mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.141mm] / [Bottom Solder] Mask Sliver [0.141mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (177.343mm,48.108mm) from Top Layer to Bottom Layer And Via (177.343mm,49.035mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (177.343mm,49.035mm) from Top Layer to Bottom Layer And Via (177.343mm,49.962mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (178.841mm,49.035mm) from Top Layer to Bottom Layer And Via (178.841mm,49.962mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (180.162mm,48.108mm) from Top Layer to Bottom Layer And Via (180.162mm,49.035mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (180.162mm,49.035mm) from Top Layer to Bottom Layer And Via (180.162mm,49.962mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
|
||||
Rule Violations :173
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C1-1(146.677mm,60.3mm) on Top Layer And Pad C1-2(147.677mm,60.3mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.211mm < 0.254mm) Between Pad C1-1(146.677mm,60.3mm) on Top Layer And Pad R1-2(146.694mm,61.214mm) on Top Layer [Top Solder] Mask Sliver [0.211mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C11-1(141.275mm,50.436mm) on Top Layer And Pad C11-2(141.275mm,49.436mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.211mm < 0.254mm) Between Pad C1-2(147.677mm,60.3mm) on Top Layer And Pad R1-1(147.694mm,61.214mm) on Top Layer [Top Solder] Mask Sliver [0.211mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.11mm < 0.254mm) Between Pad C1-2(147.677mm,60.3mm) on Top Layer And Via (147.93mm,59.487mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.11mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.209mm < 0.254mm) Between Pad C14-1(166.903mm,56.207mm) on Bottom Layer And Via (165.786mm,55.042mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.209mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.166mm < 0.254mm) Between Pad C14-2(166.903mm,54.407mm) on Bottom Layer And Via (167.005mm,53.188mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.166mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.236mm < 0.254mm) Between Pad C18-2(140.64mm,51.991mm) on Bottom Layer And Pad C19-2(140.64mm,50.752mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.236mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C3-1(145.771mm,49.436mm) on Top Layer And Pad C3-2(145.771mm,50.436mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.156mm < 0.254mm) Between Pad C4-2(154.127mm,59.106mm) on Bottom Layer And Via (151.613mm,58.649mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.156mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.182mm < 0.254mm) Between Pad C4-2(154.127mm,59.106mm) on Bottom Layer And Via (156.667mm,57.836mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.182mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C5-1(144.272mm,49.436mm) on Top Layer And Pad C5-2(144.272mm,50.436mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C8-1(143.264mm,60.655mm) on Top Layer And Pad C8-2(144.264mm,60.655mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.241mm < 0.254mm) Between Pad P2-2(141.224mm,58.547mm) on Bottom Layer And Via (140.64mm,59.868mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.241mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.149mm < 0.254mm) Between Pad P2-3(141.224mm,61.087mm) on Bottom Layer And Via (140.64mm,59.868mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.149mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R1-1(147.694mm,61.214mm) on Top Layer And Pad R1-2(146.694mm,61.214mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R2-1(150.343mm,49.995mm) on Bottom Layer And Pad R2-2(150.343mm,50.995mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.186mm < 0.254mm) Between Pad R2-1(150.343mm,49.995mm) on Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.186mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.222mm < 0.254mm) Between Pad R2-2(150.343mm,50.995mm) on Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.222mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R3-1(176.352mm,57.904mm) on Bottom Layer And Pad R3-2(176.352mm,56.904mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad R6-2(160.325mm,51.918mm) on Bottom Layer And Via (159.461mm,52.299mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.01mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.124mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Via (148.107mm,51.486mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.124mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.113mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.113mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.234mm < 0.254mm) Between Pad U?-3(164.166mm,56.145mm) on Bottom Layer And Via (165.786mm,55.042mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.234mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.191mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Via (156.616mm,56.972mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.191mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.141mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Via (156.667mm,57.836mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.141mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.185mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Via (157.353mm,56.007mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.185mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-1(147.518mm,52.749mm) on Top Layer And Pad U1-2(147.518mm,53.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-1(147.518mm,52.749mm) on Top Layer And Pad U1-48(146.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,57.249mm) on Top Layer And Pad U1-11(147.518mm,57.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,57.249mm) on Top Layer And Pad U1-9(147.518mm,56.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-11(147.518mm,57.749mm) on Top Layer And Pad U1-12(147.518mm,58.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-12(147.518mm,58.249mm) on Top Layer And Pad U1-13(146.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-13(146.768mm,58.999mm) on Top Layer And Pad U1-14(146.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-14(146.268mm,58.999mm) on Top Layer And Pad U1-15(145.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.173mm < 0.254mm) Between Pad U1-14(146.268mm,58.999mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.173mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-15(145.768mm,58.999mm) on Top Layer And Pad U1-16(145.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.107mm < 0.254mm) Between Pad U1-15(145.768mm,58.999mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.107mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-16(145.268mm,58.999mm) on Top Layer And Pad U1-17(144.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.176mm < 0.254mm) Between Pad U1-16(145.268mm,58.999mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.176mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-17(144.768mm,58.999mm) on Top Layer And Pad U1-18(144.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-18(144.268mm,58.999mm) on Top Layer And Pad U1-19(143.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-19(143.768mm,58.999mm) on Top Layer And Pad U1-20(143.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-2(147.518mm,53.249mm) on Top Layer And Pad U1-3(147.518mm,53.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-20(143.268mm,58.999mm) on Top Layer And Pad U1-21(142.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-21(142.768mm,58.999mm) on Top Layer And Pad U1-22(142.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.187mm < 0.254mm) Between Pad U1-21(142.768mm,58.999mm) on Top Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.187mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-22(142.268mm,58.999mm) on Top Layer And Pad U1-23(141.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.121mm < 0.254mm) Between Pad U1-22(142.268mm,58.999mm) on Top Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.121mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-23(141.768mm,58.999mm) on Top Layer And Pad U1-24(141.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.186mm < 0.254mm) Between Pad U1-23(141.768mm,58.999mm) on Top Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.186mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-24(141.268mm,58.999mm) on Top Layer And Pad U1-25(140.518mm,58.249mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.181mm < 0.254mm) Between Pad U1-24(141.268mm,58.999mm) on Top Layer And Via (140.64mm,59.868mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.181mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-25(140.518mm,58.249mm) on Top Layer And Pad U1-26(140.518mm,57.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-26(140.518mm,57.749mm) on Top Layer And Pad U1-27(140.518mm,57.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-27(140.518mm,57.249mm) on Top Layer And Pad U1-28(140.518mm,56.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-28(140.518mm,56.749mm) on Top Layer And Pad U1-29(140.518mm,56.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-29(140.518mm,56.249mm) on Top Layer And Pad U1-30(140.518mm,55.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-3(147.518mm,53.749mm) on Top Layer And Pad U1-4(147.518mm,54.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.082mm < 0.254mm) Between Pad U1-3(147.518mm,53.749mm) on Top Layer And Via (146.583mm,54mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.082mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-30(140.518mm,55.749mm) on Top Layer And Pad U1-31(140.518mm,55.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-31(140.518mm,55.249mm) on Top Layer And Pad U1-32(140.518mm,54.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-32(140.518mm,54.749mm) on Top Layer And Pad U1-33(140.518mm,54.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-33(140.518mm,54.249mm) on Top Layer And Pad U1-34(140.518mm,53.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-34(140.518mm,53.749mm) on Top Layer And Pad U1-35(140.518mm,53.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-35(140.518mm,53.249mm) on Top Layer And Pad U1-36(140.518mm,52.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-36(140.518mm,52.749mm) on Top Layer And Pad U1-37(141.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-37(141.268mm,51.999mm) on Top Layer And Pad U1-38(141.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.225mm < 0.254mm) Between Pad U1-37(141.268mm,51.999mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.225mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-38(141.768mm,51.999mm) on Top Layer And Pad U1-39(142.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.107mm < 0.254mm) Between Pad U1-38(141.768mm,51.999mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.107mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-39(142.268mm,51.999mm) on Top Layer And Pad U1-40(142.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.136mm < 0.254mm) Between Pad U1-39(142.268mm,51.999mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.136mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-4(147.518mm,54.249mm) on Top Layer And Pad U1-5(147.518mm,54.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.082mm < 0.254mm) Between Pad U1-4(147.518mm,54.249mm) on Top Layer And Via (146.583mm,54mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.082mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-40(142.768mm,51.999mm) on Top Layer And Pad U1-41(143.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-41(143.268mm,51.999mm) on Top Layer And Pad U1-42(143.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-42(143.768mm,51.999mm) on Top Layer And Pad U1-43(144.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-43(144.268mm,51.999mm) on Top Layer And Pad U1-44(144.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-44(144.768mm,51.999mm) on Top Layer And Pad U1-45(145.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-45(145.268mm,51.999mm) on Top Layer And Pad U1-46(145.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-46(145.768mm,51.999mm) on Top Layer And Pad U1-47(146.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.081mm < 0.254mm) Between Pad U1-46(145.768mm,51.999mm) on Top Layer And Via (145.948mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.081mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-47(146.268mm,51.999mm) on Top Layer And Pad U1-48(146.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.088mm < 0.254mm) Between Pad U1-47(146.268mm,51.999mm) on Top Layer And Via (145.948mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.088mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.091mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.091mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.087mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.087mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.112mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (145.948mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.112mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.112mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (146.583mm,54mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.112mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-5(147.518mm,54.749mm) on Top Layer And Pad U1-6(147.518mm,55.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-6(147.518mm,55.249mm) on Top Layer And Pad U1-7(147.518mm,55.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-7(147.518mm,55.749mm) on Top Layer And Pad U1-8(147.518mm,56.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-8(147.518mm,56.249mm) on Top Layer And Pad U1-9(147.518mm,56.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.143mm < 0.254mm) Between Pad U2-2(171.501mm,54.813mm) on Bottom Layer And Via (171.45mm,52.984mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.143mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.215mm < 0.254mm) Between Pad U4-1(163.417mm,53.726mm) on Bottom Layer And Pad U4-2(164.367mm,53.726mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.215mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.231mm < 0.254mm) Between Pad U4-1(163.417mm,53.726mm) on Bottom Layer And Via (164.367mm,53.726mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.231mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.215mm < 0.254mm) Between Pad U4-2(164.367mm,53.726mm) on Bottom Layer And Pad U4-3(165.317mm,53.726mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.215mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.231mm < 0.254mm) Between Pad U4-3(165.317mm,53.726mm) on Bottom Layer And Via (164.367mm,53.726mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.231mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.195mm < 0.254mm) Between Pad U5-7(143.739mm,60.274mm) on Bottom Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.195mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.253mm < 0.254mm) Between Pad U6-11(166.624mm,50.292mm) on Top Layer And Via (166.827mm,52.248mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.253mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.177mm < 0.254mm) Between Via (148.107mm,51.486mm) from Top Layer to Bottom Layer And Via (148.742mm,50.876mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.177mm] / [Bottom Solder] Mask Sliver [0.177mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.156mm < 0.254mm) Between Via (148.742mm,50.876mm) from Top Layer to Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.156mm] / [Bottom Solder] Mask Sliver [0.156mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.162mm < 0.254mm) Between Via (156.616mm,56.972mm) from Top Layer to Bottom Layer And Via (156.667mm,57.836mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.162mm] / [Bottom Solder] Mask Sliver [0.162mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.217mm < 0.254mm) Between Via (157.353mm,56.007mm) from Top Layer to Bottom Layer And Via (158.064mm,55.423mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.217mm] / [Bottom Solder] Mask Sliver [0.217mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.177mm < 0.254mm) Between Via (158.818mm,52.9mm) from Top Layer to Bottom Layer And Via (159.461mm,52.299mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.177mm] / [Bottom Solder] Mask Sliver [0.177mm]
|
||||
Violation between Minimum Solder Mask Sliver Constraint: (0.253mm < 0.254mm) Between Via (166.827mm,52.248mm) from Top Layer to Bottom Layer And Via (167.005mm,53.188mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.253mm] / [Bottom Solder] Mask Sliver [0.253mm]
|
||||
Rule Violations :106
|
||||
|
||||
Processing Rule : Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (143.739mm,51.998mm) on Bottom Overlay And Pad U4-1(143.739mm,52.73mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.09mm < 0.254mm) Between Arc (148.158mm,52.343mm) on Top Overlay And Pad U1-1(147.518mm,52.343mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0.09mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (143.739mm,51.922mm) on Bottom Overlay And Pad U5-1(143.739mm,52.654mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.09mm < 0.254mm) Between Arc (148.158mm,52.749mm) on Top Overlay And Pad U1-1(147.518mm,52.749mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0.09mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (162.699mm,53.878mm) on Bottom Overlay And Pad U4-1(163.417mm,53.726mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C12-1(172.237mm,49.773mm) on Bottom Layer And Track (171.637mm,50.673mm)(172.837mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C12-2(172.237mm,51.573mm) on Bottom Layer And Track (171.637mm,50.673mm)(172.837mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C13-1(169.596mm,49.773mm) on Bottom Layer And Track (168.996mm,50.673mm)(170.196mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.164mm < 0.254mm) Between Pad C13-2(169.596mm,51.573mm) on Bottom Layer And Text "U4" (168.605mm,51.867mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.164mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C13-2(169.596mm,51.573mm) on Bottom Layer And Track (168.996mm,50.673mm)(170.196mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C14-1(161.595mm,49.773mm) on Bottom Layer And Track (160.995mm,50.673mm)(162.195mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C14-2(161.595mm,51.573mm) on Bottom Layer And Track (160.995mm,50.673mm)(162.195mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C15-1(163.601mm,49.773mm) on Bottom Layer And Track (163.001mm,50.673mm)(164.201mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C15-2(163.601mm,51.573mm) on Bottom Layer And Track (163.001mm,50.673mm)(164.201mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C16-1(165.608mm,49.773mm) on Bottom Layer And Track (165.008mm,50.673mm)(166.208mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C16-2(165.608mm,51.573mm) on Bottom Layer And Track (165.008mm,50.673mm)(166.208mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.187mm < 0.254mm) Between Pad C17-1(141.3mm,52.524mm) on Bottom Layer And Text "TX" (140.589mm,52.756mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.187mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.186mm < 0.254mm) Between Pad C17-2(141.3mm,53.924mm) on Bottom Layer And Text "TX" (140.589mm,52.756mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.186mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad C6-1(149.174mm,60.943mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C7-1(143.891mm,61.595mm) on Top Layer And Track (144.433mm,60.135mm)(144.433mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C7-2(143.891mm,60.595mm) on Top Layer And Track (144.433mm,60.135mm)(144.433mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.22mm < 0.254mm) Between Pad D?-1(157.354mm,50.089mm) on Bottom Layer And Track (154.284mm,49.142mm)(157.284mm,49.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.22mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.206mm < 0.254mm) Between Pad D?-1(157.354mm,50.089mm) on Bottom Layer And Track (154.298mm,51.022mm)(157.298mm,51.022mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.206mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.161mm < 0.254mm) Between Pad D?-1(157.354mm,50.089mm) on Bottom Layer And Track (155.042mm,50.089mm)(156.566mm,50.089mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.161mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.22mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Track (154.284mm,49.142mm)(157.284mm,49.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.22mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.206mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Track (154.298mm,51.022mm)(157.298mm,51.022mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.206mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.161mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Track (155.042mm,50.089mm)(156.566mm,50.089mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.161mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-1(175.971mm,54.889mm) on Bottom Layer And Track (176.736mm,53.381mm)(176.736mm,54.308mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-1(175.971mm,54.889mm) on Bottom Layer And Track (176.736mm,55.471mm)(176.736mm,55.558mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-2(175.971mm,56.139mm) on Bottom Layer And Track (176.736mm,55.471mm)(176.736mm,55.558mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-2(175.971mm,56.139mm) on Bottom Layer And Track (176.736mm,56.72mm)(176.736mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.007mm < 0.254mm) Between Pad P1-3(179.06mm,52.047mm) on Bottom Layer And Track (176.736mm,53.381mm)(180.436mm,53.381mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.007mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.018mm < 0.254mm) Between Pad P1-3(179.06mm,52.047mm) on Bottom Layer And Track (180.436mm,53.391mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.018mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.061mm,58.989mm) on Bottom Layer And Track (176.736mm,57.659mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.061mm,58.989mm) on Bottom Layer And Track (180.436mm,53.391mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-1(140.894mm,56.007mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-2(140.894mm,58.547mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-3(140.894mm,61.087mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Track (149.332mm,49.396mm)(149.332mm,48.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Track (149.332mm,51.163mm)(149.332mm,51.856mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(145.22mm,50.279mm) on Bottom Layer And Track (145.179mm,49.396mm)(145.179mm,48.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(145.22mm,50.279mm) on Bottom Layer And Track (145.179mm,51.163mm)(145.179mm,51.856mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(179.108mm,57.546mm) on Top Layer And Track (177.532mm,57.587mm)(178.225mm,57.587mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(179.108mm,57.546mm) on Top Layer And Track (179.991mm,57.587mm)(180.684mm,57.587mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.108mm,53.476mm) on Top Layer And Track (177.532mm,53.434mm)(178.225mm,53.434mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.108mm,53.476mm) on Top Layer And Track (179.991mm,53.434mm)(180.684mm,53.434mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.211mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Track (147.594mm,51.517mm)(147.594mm,52.012mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.211mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-12(147.518mm,57.843mm) on Top Layer And Track (147.594mm,58.173mm)(147.594mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-13(146.768mm,58.593mm) on Top Layer And Track (147.098mm,58.669mm)(147.594mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.21mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Track (140.442mm,58.669mm)(140.938mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.21mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Track (140.442mm,58.173mm)(140.442mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-36(140.518mm,52.343mm) on Top Layer And Track (140.442mm,51.517mm)(140.442mm,52.012mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-37(141.268mm,51.593mm) on Top Layer And Track (140.442mm,51.517mm)(140.938mm,51.517mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-48(146.768mm,51.593mm) on Top Layer And Track (147.098mm,51.517mm)(147.594mm,51.517mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-1(172.988mm,55.093mm) on Bottom Layer And Track (167.287mm,56.554mm)(174.089mm,56.554mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-2(170.688mm,55.093mm) on Bottom Layer And Track (167.287mm,56.554mm)(174.089mm,56.554mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-3(168.388mm,55.093mm) on Bottom Layer And Track (167.287mm,56.554mm)(174.089mm,56.554mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-4(170.688mm,60.808mm) on Bottom Layer And Track (167.287mm,59.346mm)(174.089mm,59.346mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U3-4(163.322mm,60.706mm) on Bottom Layer And Track (159.996mm,59.307mm)(166.648mm,59.307mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-1(143.739mm,52.73mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-10(149.484mm,60.35mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-11(149.484mm,59.08mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-12(149.484mm,57.81mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-13(149.484mm,56.54mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-14(149.484mm,55.27mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-15(149.484mm,54mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-16(149.484mm,52.73mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-2(143.739mm,54mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-3(143.739mm,55.27mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-4(143.739mm,56.54mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-5(143.739mm,57.81mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-6(143.739mm,59.08mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-7(143.739mm,60.35mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-8(143.739mm,61.62mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-9(149.484mm,61.62mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(151.384mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-(151.384mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.244mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-(174.244mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.244mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.244mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-1(169.164mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-1(169.164mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-10(164.084mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-10(164.084mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-11(166.624mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-11(166.624mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-12(169.164mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-12(169.164mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-2(166.624mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-2(166.624mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-3(164.084mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-3(164.084mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-4(161.544mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-4(161.544mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-5(159.004mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-5(159.004mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-6(156.464mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-6(156.464mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-7(156.464mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-7(156.464mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-8(159.004mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-8(159.004mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-9(161.544mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-9(161.544mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (144.433mm,60.135mm)(148.49mm,60.135mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (144.433mm,62.293mm)(148.49mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.075mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (148.463mm,50.673mm)(148.463mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.075mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.075mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.075mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (148.49mm,60.135mm)(148.49mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Track (144.433mm,60.135mm)(144.433mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Track (144.433mm,60.135mm)(148.49mm,60.135mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Track (144.433mm,62.293mm)(148.49mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
|
||||
Rule Violations :111
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C14-1(166.903mm,56.207mm) on Bottom Layer And Track (166.303mm,55.307mm)(167.503mm,55.307mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C14-2(166.903mm,54.407mm) on Bottom Layer And Track (166.303mm,55.307mm)(167.503mm,55.307mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C15-1(166.903mm,58.714mm) on Bottom Layer And Track (166.303mm,59.614mm)(167.503mm,59.614mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C15-2(166.903mm,60.514mm) on Bottom Layer And Track (166.303mm,59.614mm)(167.503mm,59.614mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.228mm < 0.254mm) Between Pad C18-1(140.64mm,53.391mm) on Bottom Layer And Text "TX" (142.392mm,54.356mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.228mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.249mm < 0.254mm) Between Pad P1-1(176.022mm,52.934mm) on Bottom Layer And Text "+" (175.336mm,51.206mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.249mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-1(176.022mm,52.934mm) on Bottom Layer And Track (176.787mm,51.425mm)(176.787mm,52.352mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-1(176.022mm,52.934mm) on Bottom Layer And Track (176.787mm,53.515mm)(176.787mm,53.602mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-2(176.022mm,54.183mm) on Bottom Layer And Track (176.787mm,53.515mm)(176.787mm,53.602mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-2(176.022mm,54.183mm) on Bottom Layer And Track (176.787mm,54.764mm)(176.787mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.007mm < 0.254mm) Between Pad P1-3(179.111mm,50.091mm) on Bottom Layer And Track (176.787mm,51.425mm)(180.487mm,51.425mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.007mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.018mm < 0.254mm) Between Pad P1-3(179.111mm,50.091mm) on Bottom Layer And Track (180.487mm,51.436mm)(180.487mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.018mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.112mm,57.033mm) on Bottom Layer And Track (176.787mm,55.703mm)(180.487mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.112mm,57.033mm) on Bottom Layer And Track (180.487mm,51.436mm)(180.487mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Track (148.163mm,49.345mm)(148.163mm,48.652mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Track (148.163mm,51.112mm)(148.163mm,51.805mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(144.052mm,50.229mm) on Bottom Layer And Track (144.011mm,49.345mm)(144.011mm,48.652mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(144.052mm,50.229mm) on Bottom Layer And Track (144.011mm,51.112mm)(144.011mm,51.805mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(175.728mm,60.261mm) on Bottom Layer And Track (175.687mm,58.685mm)(175.687mm,59.378mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(175.728mm,60.261mm) on Bottom Layer And Track (175.687mm,61.838mm)(175.687mm,61.145mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.798mm,60.261mm) on Bottom Layer And Track (179.839mm,58.685mm)(179.839mm,59.378mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.798mm,60.261mm) on Bottom Layer And Track (179.839mm,61.838mm)(179.839mm,61.145mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-1(164.166mm,60.745mm) on Bottom Layer And Track (162.702mm,55.119mm)(162.702mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-2(164.166mm,58.445mm) on Bottom Layer And Track (162.702mm,55.119mm)(162.702mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-3(164.166mm,56.145mm) on Bottom Layer And Track (162.702mm,55.119mm)(162.702mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.022mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Track (156.54mm,59.106mm)(157.175mm,59.106mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.022mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.022mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Track (157.175mm,51.994mm)(157.175mm,59.106mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.022mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Track (159.96mm,55.119mm)(159.96mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.211mm < 0.254mm) Between Pad U1-1(147.518mm,52.749mm) on Top Layer And Track (147.594mm,51.923mm)(147.594mm,52.419mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.211mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-12(147.518mm,58.249mm) on Top Layer And Track (147.594mm,58.58mm)(147.594mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-13(146.768mm,58.999mm) on Top Layer And Track (147.098mm,59.075mm)(147.594mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.215mm < 0.254mm) Between Pad U1-22(142.268mm,58.999mm) on Top Layer And Text "U1" (140.132mm,59.741mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.215mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.215mm < 0.254mm) Between Pad U1-23(141.768mm,58.999mm) on Top Layer And Text "U1" (140.132mm,59.741mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.215mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.21mm < 0.254mm) Between Pad U1-24(141.268mm,58.999mm) on Top Layer And Track (140.442mm,59.075mm)(140.938mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.21mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-25(140.518mm,58.249mm) on Top Layer And Track (140.442mm,58.58mm)(140.442mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-36(140.518mm,52.749mm) on Top Layer And Track (140.442mm,51.923mm)(140.442mm,52.419mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-37(141.268mm,51.999mm) on Top Layer And Track (140.442mm,51.923mm)(140.938mm,51.923mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-48(146.768mm,51.999mm) on Top Layer And Track (147.098mm,51.923mm)(147.594mm,51.923mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-1(173.801mm,54.813mm) on Bottom Layer And Track (168.1mm,56.274mm)(174.902mm,56.274mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-2(171.501mm,54.813mm) on Bottom Layer And Track (168.1mm,56.274mm)(174.902mm,56.274mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.076mm < 0.254mm) Between Pad U2-3(169.201mm,54.813mm) on Bottom Layer And Text "U4" (168.605mm,51.867mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.076mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-3(169.201mm,54.813mm) on Bottom Layer And Track (168.1mm,56.274mm)(174.902mm,56.274mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-4(171.501mm,60.528mm) on Bottom Layer And Track (168.1mm,59.067mm)(174.902mm,59.067mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.253mm < 0.254mm) Between Pad U4-4(165.317mm,51.431mm) on Bottom Layer And Track (163.911mm,51.677mm)(164.822mm,51.677mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.253mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U4-5(163.417mm,51.431mm) on Bottom Layer And Track (163.911mm,51.677mm)(164.822mm,51.677mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-1(143.739mm,52.654mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-10(149.484mm,60.274mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-11(149.484mm,59.004mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-12(149.484mm,57.734mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-13(149.484mm,56.464mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-14(149.484mm,55.194mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-15(149.484mm,53.924mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-16(149.484mm,52.654mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-2(143.739mm,53.924mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-3(143.739mm,55.194mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-4(143.739mm,56.464mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-4(143.739mm,56.464mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-5(143.739mm,57.734mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-5(143.739mm,57.734mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-6(143.739mm,59.004mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-6(143.739mm,59.004mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-7(143.739mm,60.274mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-7(143.739mm,60.274mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-8(143.739mm,61.544mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-9(149.484mm,61.544mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,50.292mm) on Top Overlay And Region (0 hole(s)) Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,50.292mm) on Top Overlay And Track (151.486mm,50.597mm)(151.486mm,53.384mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,50.292mm) on Top Overlay And Via (151.486mm,50.597mm) from Top Layer to Bottom Layer [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.196mm < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Region (0 hole(s)) Top Layer [Top Overlay] to [Top Solder] clearance [0.196mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Region (0 hole(s)) Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Track (150.038mm,61.544mm)(150.52mm,61.062mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0.124mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Track (151.13mm,59.995mm)(151.917mm,59.995mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.225mm < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Via (150.038mm,61.544mm) from Top Layer to Bottom Layer [Top Overlay] to [Top Solder] clearance [0.225mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Via (151.13mm,59.995mm) from Top Layer to Bottom Layer [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(174.244mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-(174.244mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(174.244mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(174.244mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-1(169.164mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-1(169.164mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-10(164.084mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-10(164.084mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-11(166.624mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-11(166.624mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-12(169.164mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-12(169.164mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-2(166.624mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-2(166.624mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-3(164.084mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-3(164.084mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-4(161.544mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-4(161.544mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-5(159.004mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-5(159.004mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-6(156.464mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-6(156.464mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-7(156.464mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-7(156.464mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-8(159.004mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-8(159.004mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-9(161.544mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
|
||||
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-9(161.544mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
|
||||
Rule Violations :110
|
||||
|
||||
Processing Rule : Silk to Silk (Clearance=0.254mm) (All),(All)
|
||||
Violation between Silk To Silk Clearance Constraint: (0.095mm < 0.254mm) Between Text "TX" (140.589mm,52.756mm) on Bottom Overlay And Track (139.624mm,54.737mm)(139.624mm,62.357mm) on Bottom Overlay Silk Text to Silk Clearance [0.095mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (0.092mm < 0.254mm) Between Text "TX" (140.589mm,52.756mm) on Bottom Overlay And Track (139.624mm,54.737mm)(142.164mm,54.737mm) on Bottom Overlay Silk Text to Silk Clearance [0.092mm]
|
||||
Rule Violations :2
|
||||
Violation between Silk To Silk Clearance Constraint: (0.195mm < 0.254mm) Between Text "+" (175.336mm,51.206mm) on Bottom Overlay And Track (176.787mm,51.425mm)(176.787mm,52.352mm) on Bottom Overlay Silk Text to Silk Clearance [0.195mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (0.07mm < 0.254mm) Between Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay And Track (142.494mm,54.737mm)(142.494mm,62.357mm) on Bottom Overlay Silk Text to Silk Clearance [0.07mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (0.129mm < 0.254mm) Between Text "RESET" (180.645mm,62.103mm) on Bottom Overlay And Track (175.687mm,61.838mm)(179.839mm,61.838mm) on Bottom Overlay Silk Text to Silk Clearance [0.129mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (0.14mm < 0.254mm) Between Text "RESET" (180.645mm,62.103mm) on Bottom Overlay And Track (179.839mm,61.838mm)(179.839mm,61.145mm) on Bottom Overlay Silk Text to Silk Clearance [0.14mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (0.206mm < 0.254mm) Between Text "TX" (142.392mm,54.356mm) on Bottom Overlay And Track (139.954mm,54.737mm)(142.494mm,54.737mm) on Bottom Overlay Silk Text to Silk Clearance [0.206mm]
|
||||
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "U4" (168.605mm,51.867mm) on Bottom Overlay And Track (165.918mm,51.677mm)(165.918mm,53.479mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
|
||||
Rule Violations :6
|
||||
|
||||
Processing Rule : Net Antennae (Tolerance=0mm) (All)
|
||||
Rule Violations :0
|
||||
@ -329,6 +265,6 @@ Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (Al
|
||||
Rule Violations :0
|
||||
|
||||
|
||||
Violations Detected : 286
|
||||
Violations Detected : 222
|
||||
Waived Violations : 0
|
||||
Time Elapsed : 00:00:02
|
||||
Time Elapsed : 00:00:01
|
||||
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植物探头/使用时间监测模块/TLV62568A.PcbLib
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Reference in New Issue
Block a user