This commit is contained in:
2022-07-14 09:36:45 +08:00
parent 6e3f165d4f
commit 37053d4faf
163 changed files with 14156 additions and 814 deletions

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@ -1,7 +1,7 @@
Protel Design System Design Rule Check
PCB File : C:\Users\hu123456\Desktop\ֲ<EFBFBD><EFBFBD>̽ͷ\ʹ<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><EFBFBD>\PCB1.PcbDoc
Date : 2022/5/7
Time : 14:08:10
PCB File : C:\Users\hu123456\Desktop\ʹ<><CAB9>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>\PCB1.PcbDoc
Date : 2022/6/30
Time : 13:25:17
Processing Rule : Clearance Constraint (Gap=0.2mm) (All),(All)
Rule Violations :0
@ -28,299 +28,235 @@ Processing Rule : Hole To Hole Clearance (Gap=0.254mm) (All),(All)
Rule Violations :0
Processing Rule : Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C10-1(141.91mm,48.971mm) on Top Layer And Pad C10-2(141.91mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.062mm < 0.254mm) Between Pad C10-2(141.91mm,49.971mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.062mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C1-1(141.648mm,61.747mm) on Top Layer And Pad C1-2(140.648mm,61.747mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.237mm < 0.254mm) Between Pad C1-1(141.648mm,61.747mm) on Top Layer And Pad R1-2(141.648mm,60.808mm) on Top Layer [Top Solder] Mask Sliver [0.237mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.16mm < 0.254mm) Between Pad C1-1(141.648mm,61.747mm) on Top Layer And Via (141.402mm,62.611mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.16mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C11-1(143.241mm,49.971mm) on Top Layer And Pad C11-2(143.241mm,48.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.069mm < 0.254mm) Between Pad C11-1(143.241mm,49.971mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.069mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.057mm < 0.254mm) Between Pad C11-1(143.241mm,49.971mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.057mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.237mm < 0.254mm) Between Pad C1-2(140.648mm,61.747mm) on Top Layer And Pad R1-1(140.648mm,60.808mm) on Top Layer [Top Solder] Mask Sliver [0.237mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.138mm < 0.254mm) Between Pad C18-2(141.3mm,50.981mm) on Bottom Layer And Via (140.259mm,51.333mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.138mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C2-1(144.572mm,49.971mm) on Top Layer And Pad C2-2(144.572mm,48.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.041mm < 0.254mm) Between Pad C2-1(144.572mm,49.971mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.041mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C3-1(145.903mm,48.971mm) on Top Layer And Pad C3-2(145.903mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.248mm < 0.254mm) Between Pad C4-1(155.931mm,53.086mm) on Bottom Layer And Via (153.441mm,51.232mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.248mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.131mm < 0.254mm) Between Pad C4-2(155.931mm,60.706mm) on Bottom Layer And Via (153.441mm,61.62mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.131mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C5-1(147.234mm,48.971mm) on Top Layer And Pad C5-2(147.234mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C6-1(149.174mm,60.943mm) on Top Layer And Pad C6-2(149.174mm,61.943mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.171mm < 0.254mm) Between Pad C6-1(149.174mm,60.943mm) on Top Layer And Via (150.012mm,60.35mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.171mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C7-1(143.891mm,61.595mm) on Top Layer And Pad C7-2(143.891mm,60.595mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C8-1(142.85mm,61.587mm) on Top Layer And Pad C8-2(142.85mm,60.587mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.144mm < 0.254mm) Between Pad C8-2(142.85mm,60.587mm) on Top Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.144mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C9-1(140.579mm,48.971mm) on Top Layer And Pad C9-2(140.579mm,49.971mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.204mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Via (153.213mm,49.047mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.204mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.138mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Via (153.441mm,51.232mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.138mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.182mm < 0.254mm) Between Pad P1-2(175.971mm,56.139mm) on Bottom Layer And Via (175.666mm,57.125mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.182mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.097mm < 0.254mm) Between Pad P1-3(179.06mm,52.047mm) on Bottom Layer And Via (179.73mm,53.797mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.097mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.118mm < 0.254mm) Between Pad P2-2(140.894mm,58.547mm) on Bottom Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.118mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R?-1(179.638mm,60.35mm) on Top Layer And Pad R?-2(178.638mm,60.35mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R1-1(140.648mm,60.808mm) on Top Layer And Pad R1-2(141.648mm,60.808mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R2-1(151.689mm,49.563mm) on Bottom Layer And Pad R2-2(151.689mm,50.563mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.108mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Via (148.305mm,51.505mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.108mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.175mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Via (148.615mm,48.971mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.175mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.175mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Via (149.631mm,48.971mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.175mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.086mm < 0.254mm) Between Pad SW1-2(145.22mm,50.279mm) on Bottom Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.086mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.229mm < 0.254mm) Between Pad SW2-1(179.108mm,57.546mm) on Top Layer And Via (177.952mm,56.236mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.229mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Pad U1-2(147.518mm,52.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Pad U1-48(146.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,56.843mm) on Top Layer And Pad U1-11(147.518mm,57.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-10(147.518mm,56.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,56.843mm) on Top Layer And Pad U1-9(147.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-11(147.518mm,57.343mm) on Top Layer And Pad U1-12(147.518mm,57.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-11(147.518mm,57.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-12(147.518mm,57.843mm) on Top Layer And Pad U1-13(146.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-12(147.518mm,57.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-13(146.768mm,58.593mm) on Top Layer And Pad U1-14(146.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-13(146.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-14(146.268mm,58.593mm) on Top Layer And Pad U1-15(145.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-14(146.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-15(145.768mm,58.593mm) on Top Layer And Pad U1-16(145.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-15(145.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-16(145.268mm,58.593mm) on Top Layer And Pad U1-17(144.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-16(145.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-17(144.768mm,58.593mm) on Top Layer And Pad U1-18(144.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-17(144.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.244mm < 0.254mm) Between Pad U1-17(144.768mm,58.593mm) on Top Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.244mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-18(144.268mm,58.593mm) on Top Layer And Pad U1-19(143.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-18(144.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-19(143.768mm,58.593mm) on Top Layer And Pad U1-20(143.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-19(143.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-2(147.518mm,52.843mm) on Top Layer And Pad U1-3(147.518mm,53.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-2(147.518mm,52.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-20(143.268mm,58.593mm) on Top Layer And Pad U1-21(142.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-20(143.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-21(142.768mm,58.593mm) on Top Layer And Pad U1-22(142.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-21(142.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.244mm < 0.254mm) Between Pad U1-21(142.768mm,58.593mm) on Top Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.244mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Pad U1-23(141.768mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.237mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.237mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.245mm < 0.254mm) Between Pad U1-22(142.268mm,58.593mm) on Top Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.245mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-23(141.768mm,58.593mm) on Top Layer And Pad U1-24(141.268mm,58.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-23(141.768mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.142mm < 0.254mm) Between Pad U1-23(141.768mm,58.593mm) on Top Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.142mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Pad U1-25(140.518mm,57.843mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.18mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Via (141.707mm,59.588mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.18mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Pad U1-26(140.518mm,57.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.238mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Via (140.36mm,58.674mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.238mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-26(140.518mm,57.343mm) on Top Layer And Pad U1-27(140.518mm,56.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-26(140.518mm,57.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-27(140.518mm,56.843mm) on Top Layer And Pad U1-28(140.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-27(140.518mm,56.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-28(140.518mm,56.343mm) on Top Layer And Pad U1-29(140.518mm,55.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-28(140.518mm,56.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-29(140.518mm,55.843mm) on Top Layer And Pad U1-30(140.518mm,55.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-29(140.518mm,55.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-3(147.518mm,53.343mm) on Top Layer And Pad U1-4(147.518mm,53.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-3(147.518mm,53.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-30(140.518mm,55.343mm) on Top Layer And Pad U1-31(140.518mm,54.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-30(140.518mm,55.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-31(140.518mm,54.843mm) on Top Layer And Pad U1-32(140.518mm,54.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-31(140.518mm,54.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-32(140.518mm,54.343mm) on Top Layer And Pad U1-33(140.518mm,53.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-32(140.518mm,54.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-33(140.518mm,53.843mm) on Top Layer And Pad U1-34(140.518mm,53.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-33(140.518mm,53.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-34(140.518mm,53.343mm) on Top Layer And Pad U1-35(140.518mm,52.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-34(140.518mm,53.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-35(140.518mm,52.843mm) on Top Layer And Pad U1-36(140.518mm,52.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-35(140.518mm,52.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-36(140.518mm,52.343mm) on Top Layer And Pad U1-37(141.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-36(140.518mm,52.343mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-37(141.268mm,51.593mm) on Top Layer And Pad U1-38(141.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-37(141.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-38(141.768mm,51.593mm) on Top Layer And Pad U1-39(142.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-38(141.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-39(142.268mm,51.593mm) on Top Layer And Pad U1-40(142.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-39(142.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.096mm < 0.254mm) Between Pad U1-39(142.268mm,51.593mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.096mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-4(147.518mm,53.843mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-4(147.518mm,53.843mm) on Top Layer And Pad U1-5(147.518mm,54.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-40(142.768mm,51.593mm) on Top Layer And Pad U1-41(143.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-40(142.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.092mm < 0.254mm) Between Pad U1-40(142.768mm,51.593mm) on Top Layer And Via (142.57mm,50.648mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.092mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-41(143.268mm,51.593mm) on Top Layer And Pad U1-42(143.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-41(143.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-42(143.768mm,51.593mm) on Top Layer And Pad U1-43(144.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-42(143.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.117mm < 0.254mm) Between Pad U1-42(143.768mm,51.593mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.117mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-43(144.268mm,51.593mm) on Top Layer And Pad U1-44(144.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-43(144.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.13mm < 0.254mm) Between Pad U1-43(144.268mm,51.593mm) on Top Layer And Via (143.916mm,50.622mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.13mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-44(144.768mm,51.593mm) on Top Layer And Pad U1-45(145.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-44(144.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-45(145.268mm,51.593mm) on Top Layer And Pad U1-46(145.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-45(145.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-46(145.768mm,51.593mm) on Top Layer And Pad U1-47(146.268mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-46(145.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-47(146.268mm,51.593mm) on Top Layer And Pad U1-48(146.768mm,51.593mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-47(146.268mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-48(146.768mm,51.593mm) on Top Layer And Pad U1-49(144.018mm,55.093mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-5(147.518mm,54.343mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-6(147.518mm,54.843mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-7(147.518mm,55.343mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-8(147.518mm,55.843mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad U1-49(144.018mm,55.093mm) on Top Layer And Pad U1-9(147.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-5(147.518mm,54.343mm) on Top Layer And Pad U1-6(147.518mm,54.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-6(147.518mm,54.843mm) on Top Layer And Pad U1-7(147.518mm,55.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-7(147.518mm,55.343mm) on Top Layer And Pad U1-8(147.518mm,55.843mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-8(147.518mm,55.843mm) on Top Layer And Pad U1-9(147.518mm,56.343mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.134mm < 0.254mm) Between Pad U2-3(168.388mm,55.093mm) on Bottom Layer And Via (169.139mm,56.896mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.134mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.059mm < 0.254mm) Between Pad U3-4(163.322mm,60.706mm) on Bottom Layer And Via (161.265mm,59.055mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.059mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.051mm < 0.254mm) Between Pad U4-11(149.484mm,59.08mm) on Bottom Layer And Via (148.107mm,59.055mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.051mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.253mm < 0.254mm) Between Pad U4-4(143.739mm,56.54mm) on Bottom Layer And Via (145.161mm,57.074mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.253mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.123mm < 0.254mm) Between Pad U4-6(143.739mm,59.08mm) on Bottom Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.123mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.071mm < 0.254mm) Between Pad U4-6(143.739mm,59.08mm) on Bottom Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.071mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.16mm < 0.254mm) Between Pad U4-7(143.739mm,60.35mm) on Bottom Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.16mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.111mm < 0.254mm) Between Pad U4-7(143.739mm,60.35mm) on Bottom Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.111mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.151mm < 0.254mm) Between Pad U5-(151.384mm,50.292mm) on Top Layer And Via (151.105mm,52.146mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.151mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.018mm < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Via (150.012mm,60.35mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.018mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.095mm < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Via (152.832mm,61.011mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.095mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.12mm < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Via (152.857mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.12mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.031mm < 0.254mm) Between Pad U5-4(161.544mm,60.789mm) on Top Layer And Via (161.265mm,59.055mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.031mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.221mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Via (144.856mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.221mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.17mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Via (145.644mm,59.741mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.17mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.107mm < 0.254mm) Between Via (140.005mm,63.424mm) from Top Layer to Bottom Layer And Via (140.538mm,62.814mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.107mm] / [Bottom Solder] Mask Sliver [0.107mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.184mm < 0.254mm) Between Via (140.538mm,62.814mm) from Top Layer to Bottom Layer And Via (141.402mm,62.611mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.184mm] / [Bottom Solder] Mask Sliver [0.184mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.141mm < 0.254mm) Between Via (141.707mm,59.588mm) from Top Layer to Bottom Layer And Via (142.545mm,59.69mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.141mm] / [Bottom Solder] Mask Sliver [0.141mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.086mm < 0.254mm) Between Via (144.856mm,59.69mm) from Top Layer to Bottom Layer And Via (145.644mm,59.741mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.086mm] / [Bottom Solder] Mask Sliver [0.086mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.135mm < 0.254mm) Between Via (145.644mm,59.741mm) from Top Layer to Bottom Layer And Via (146.482mm,59.715mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.135mm] / [Bottom Solder] Mask Sliver [0.135mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.135mm < 0.254mm) Between Via (151.105mm,55.905mm) from Top Layer to Bottom Layer And Via (151.943mm,55.905mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.135mm] / [Bottom Solder] Mask Sliver [0.135mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.241mm < 0.254mm) Between Via (151.661mm,58.417mm) from Top Layer to Bottom Layer And Via (152.578mm,58.191mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.241mm] / [Bottom Solder] Mask Sliver [0.241mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.156mm < 0.254mm) Between Via (152.578mm,53.086mm) from Top Layer to Bottom Layer And Via (152.857mm,52.273mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.156mm] / [Bottom Solder] Mask Sliver [0.156mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.159mm < 0.254mm) Between Via (152.832mm,61.011mm) from Top Layer to Bottom Layer And Via (153.441mm,61.62mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.159mm] / [Bottom Solder] Mask Sliver [0.159mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.135mm < 0.254mm) Between Via (158.699mm,52.934mm) from Top Layer to Bottom Layer And Via (159.537mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.135mm] / [Bottom Solder] Mask Sliver [0.135mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.141mm < 0.254mm) Between Via (161.265mm,59.055mm) from Top Layer to Bottom Layer And Via (161.849mm,58.445mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.141mm] / [Bottom Solder] Mask Sliver [0.141mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (177.343mm,48.108mm) from Top Layer to Bottom Layer And Via (177.343mm,49.035mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (177.343mm,49.035mm) from Top Layer to Bottom Layer And Via (177.343mm,49.962mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (178.841mm,49.035mm) from Top Layer to Bottom Layer And Via (178.841mm,49.962mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (180.162mm,48.108mm) from Top Layer to Bottom Layer And Via (180.162mm,49.035mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.224mm < 0.254mm) Between Via (180.162mm,49.035mm) from Top Layer to Bottom Layer And Via (180.162mm,49.962mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.224mm] / [Bottom Solder] Mask Sliver [0.224mm]
Rule Violations :173
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C1-1(146.677mm,60.3mm) on Top Layer And Pad C1-2(147.677mm,60.3mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.211mm < 0.254mm) Between Pad C1-1(146.677mm,60.3mm) on Top Layer And Pad R1-2(146.694mm,61.214mm) on Top Layer [Top Solder] Mask Sliver [0.211mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C11-1(141.275mm,50.436mm) on Top Layer And Pad C11-2(141.275mm,49.436mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.211mm < 0.254mm) Between Pad C1-2(147.677mm,60.3mm) on Top Layer And Pad R1-1(147.694mm,61.214mm) on Top Layer [Top Solder] Mask Sliver [0.211mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.11mm < 0.254mm) Between Pad C1-2(147.677mm,60.3mm) on Top Layer And Via (147.93mm,59.487mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.11mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.209mm < 0.254mm) Between Pad C14-1(166.903mm,56.207mm) on Bottom Layer And Via (165.786mm,55.042mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.209mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.166mm < 0.254mm) Between Pad C14-2(166.903mm,54.407mm) on Bottom Layer And Via (167.005mm,53.188mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.166mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.236mm < 0.254mm) Between Pad C18-2(140.64mm,51.991mm) on Bottom Layer And Pad C19-2(140.64mm,50.752mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.236mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C3-1(145.771mm,49.436mm) on Top Layer And Pad C3-2(145.771mm,50.436mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.156mm < 0.254mm) Between Pad C4-2(154.127mm,59.106mm) on Bottom Layer And Via (151.613mm,58.649mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.156mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.182mm < 0.254mm) Between Pad C4-2(154.127mm,59.106mm) on Bottom Layer And Via (156.667mm,57.836mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.182mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C5-1(144.272mm,49.436mm) on Top Layer And Pad C5-2(144.272mm,50.436mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad C8-1(143.264mm,60.655mm) on Top Layer And Pad C8-2(144.264mm,60.655mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.241mm < 0.254mm) Between Pad P2-2(141.224mm,58.547mm) on Bottom Layer And Via (140.64mm,59.868mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.241mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.149mm < 0.254mm) Between Pad P2-3(141.224mm,61.087mm) on Bottom Layer And Via (140.64mm,59.868mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.149mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R1-1(147.694mm,61.214mm) on Top Layer And Pad R1-2(146.694mm,61.214mm) on Top Layer [Top Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R2-1(150.343mm,49.995mm) on Bottom Layer And Pad R2-2(150.343mm,50.995mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.186mm < 0.254mm) Between Pad R2-1(150.343mm,49.995mm) on Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.186mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.222mm < 0.254mm) Between Pad R2-2(150.343mm,50.995mm) on Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.222mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad R3-1(176.352mm,57.904mm) on Bottom Layer And Pad R3-2(176.352mm,56.904mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.197mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad R6-2(160.325mm,51.918mm) on Bottom Layer And Via (159.461mm,52.299mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.01mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.124mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Via (148.107mm,51.486mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.124mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.113mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.113mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.234mm < 0.254mm) Between Pad U?-3(164.166mm,56.145mm) on Bottom Layer And Via (165.786mm,55.042mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.234mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.191mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Via (156.616mm,56.972mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.191mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.141mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Via (156.667mm,57.836mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.141mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.185mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Via (157.353mm,56.007mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.185mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-1(147.518mm,52.749mm) on Top Layer And Pad U1-2(147.518mm,53.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-1(147.518mm,52.749mm) on Top Layer And Pad U1-48(146.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,57.249mm) on Top Layer And Pad U1-11(147.518mm,57.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-10(147.518mm,57.249mm) on Top Layer And Pad U1-9(147.518mm,56.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-11(147.518mm,57.749mm) on Top Layer And Pad U1-12(147.518mm,58.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.254mm) Between Pad U1-12(147.518mm,58.249mm) on Top Layer And Pad U1-13(146.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.01mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-13(146.768mm,58.999mm) on Top Layer And Pad U1-14(146.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-14(146.268mm,58.999mm) on Top Layer And Pad U1-15(145.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.173mm < 0.254mm) Between Pad U1-14(146.268mm,58.999mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.173mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-15(145.768mm,58.999mm) on Top Layer And Pad U1-16(145.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.107mm < 0.254mm) Between Pad U1-15(145.768mm,58.999mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.107mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-16(145.268mm,58.999mm) on Top Layer And Pad U1-17(144.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.176mm < 0.254mm) Between Pad U1-16(145.268mm,58.999mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.176mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-17(144.768mm,58.999mm) on Top Layer And Pad U1-18(144.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-18(144.268mm,58.999mm) on Top Layer And Pad U1-19(143.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-19(143.768mm,58.999mm) on Top Layer And Pad U1-20(143.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-2(147.518mm,53.249mm) on Top Layer And Pad U1-3(147.518mm,53.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-20(143.268mm,58.999mm) on Top Layer And Pad U1-21(142.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-21(142.768mm,58.999mm) on Top Layer And Pad U1-22(142.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.187mm < 0.254mm) Between Pad U1-21(142.768mm,58.999mm) on Top Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.187mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-22(142.268mm,58.999mm) on Top Layer And Pad U1-23(141.768mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.121mm < 0.254mm) Between Pad U1-22(142.268mm,58.999mm) on Top Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.121mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-23(141.768mm,58.999mm) on Top Layer And Pad U1-24(141.268mm,58.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.186mm < 0.254mm) Between Pad U1-23(141.768mm,58.999mm) on Top Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.186mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-24(141.268mm,58.999mm) on Top Layer And Pad U1-25(140.518mm,58.249mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.181mm < 0.254mm) Between Pad U1-24(141.268mm,58.999mm) on Top Layer And Via (140.64mm,59.868mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.181mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-25(140.518mm,58.249mm) on Top Layer And Pad U1-26(140.518mm,57.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-26(140.518mm,57.749mm) on Top Layer And Pad U1-27(140.518mm,57.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-27(140.518mm,57.249mm) on Top Layer And Pad U1-28(140.518mm,56.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-28(140.518mm,56.749mm) on Top Layer And Pad U1-29(140.518mm,56.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-29(140.518mm,56.249mm) on Top Layer And Pad U1-30(140.518mm,55.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-3(147.518mm,53.749mm) on Top Layer And Pad U1-4(147.518mm,54.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.082mm < 0.254mm) Between Pad U1-3(147.518mm,53.749mm) on Top Layer And Via (146.583mm,54mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.082mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-30(140.518mm,55.749mm) on Top Layer And Pad U1-31(140.518mm,55.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-31(140.518mm,55.249mm) on Top Layer And Pad U1-32(140.518mm,54.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-32(140.518mm,54.749mm) on Top Layer And Pad U1-33(140.518mm,54.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-33(140.518mm,54.249mm) on Top Layer And Pad U1-34(140.518mm,53.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-34(140.518mm,53.749mm) on Top Layer And Pad U1-35(140.518mm,53.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-35(140.518mm,53.249mm) on Top Layer And Pad U1-36(140.518mm,52.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.254mm) Between Pad U1-36(140.518mm,52.749mm) on Top Layer And Pad U1-37(141.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.009mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-37(141.268mm,51.999mm) on Top Layer And Pad U1-38(141.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.225mm < 0.254mm) Between Pad U1-37(141.268mm,51.999mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.225mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-38(141.768mm,51.999mm) on Top Layer And Pad U1-39(142.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.107mm < 0.254mm) Between Pad U1-38(141.768mm,51.999mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.107mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-39(142.268mm,51.999mm) on Top Layer And Pad U1-40(142.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.136mm < 0.254mm) Between Pad U1-39(142.268mm,51.999mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.136mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-4(147.518mm,54.249mm) on Top Layer And Pad U1-5(147.518mm,54.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.082mm < 0.254mm) Between Pad U1-4(147.518mm,54.249mm) on Top Layer And Via (146.583mm,54mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.082mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-40(142.768mm,51.999mm) on Top Layer And Pad U1-41(143.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-41(143.268mm,51.999mm) on Top Layer And Pad U1-42(143.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-42(143.768mm,51.999mm) on Top Layer And Pad U1-43(144.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-43(144.268mm,51.999mm) on Top Layer And Pad U1-44(144.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-44(144.768mm,51.999mm) on Top Layer And Pad U1-45(145.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-45(145.268mm,51.999mm) on Top Layer And Pad U1-46(145.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-46(145.768mm,51.999mm) on Top Layer And Pad U1-47(146.268mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.081mm < 0.254mm) Between Pad U1-46(145.768mm,51.999mm) on Top Layer And Via (145.948mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.081mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-47(146.268mm,51.999mm) on Top Layer And Pad U1-48(146.768mm,51.999mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.088mm < 0.254mm) Between Pad U1-47(146.268mm,51.999mm) on Top Layer And Via (145.948mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.088mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.091mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (141.859mm,52.959mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.091mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.087mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (145.771mm,58.039mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.087mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.112mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (145.948mm,52.934mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.112mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.112mm < 0.254mm) Between Pad U1-49(144.018mm,55.499mm) on Top Layer And Via (146.583mm,54mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.112mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-5(147.518mm,54.749mm) on Top Layer And Pad U1-6(147.518mm,55.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-6(147.518mm,55.249mm) on Top Layer And Pad U1-7(147.518mm,55.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-7(147.518mm,55.749mm) on Top Layer And Pad U1-8(147.518mm,56.249mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.017mm < 0.254mm) Between Pad U1-8(147.518mm,56.249mm) on Top Layer And Pad U1-9(147.518mm,56.749mm) on Top Layer [Top Solder] Mask Sliver [0.017mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.143mm < 0.254mm) Between Pad U2-2(171.501mm,54.813mm) on Bottom Layer And Via (171.45mm,52.984mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.143mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.215mm < 0.254mm) Between Pad U4-1(163.417mm,53.726mm) on Bottom Layer And Pad U4-2(164.367mm,53.726mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.215mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.231mm < 0.254mm) Between Pad U4-1(163.417mm,53.726mm) on Bottom Layer And Via (164.367mm,53.726mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.231mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.215mm < 0.254mm) Between Pad U4-2(164.367mm,53.726mm) on Bottom Layer And Pad U4-3(165.317mm,53.726mm) on Bottom Layer [Bottom Solder] Mask Sliver [0.215mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.231mm < 0.254mm) Between Pad U4-3(165.317mm,53.726mm) on Bottom Layer And Via (164.367mm,53.726mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.231mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.195mm < 0.254mm) Between Pad U5-7(143.739mm,60.274mm) on Bottom Layer And Via (142.268mm,59.973mm) from Top Layer to Bottom Layer [Bottom Solder] Mask Sliver [0.195mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.253mm < 0.254mm) Between Pad U6-11(166.624mm,50.292mm) on Top Layer And Via (166.827mm,52.248mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.253mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.177mm < 0.254mm) Between Via (148.107mm,51.486mm) from Top Layer to Bottom Layer And Via (148.742mm,50.876mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.177mm] / [Bottom Solder] Mask Sliver [0.177mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.156mm < 0.254mm) Between Via (148.742mm,50.876mm) from Top Layer to Bottom Layer And Via (149.454mm,50.394mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.156mm] / [Bottom Solder] Mask Sliver [0.156mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.162mm < 0.254mm) Between Via (156.616mm,56.972mm) from Top Layer to Bottom Layer And Via (156.667mm,57.836mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.162mm] / [Bottom Solder] Mask Sliver [0.162mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.217mm < 0.254mm) Between Via (157.353mm,56.007mm) from Top Layer to Bottom Layer And Via (158.064mm,55.423mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.217mm] / [Bottom Solder] Mask Sliver [0.217mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.177mm < 0.254mm) Between Via (158.818mm,52.9mm) from Top Layer to Bottom Layer And Via (159.461mm,52.299mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.177mm] / [Bottom Solder] Mask Sliver [0.177mm]
Violation between Minimum Solder Mask Sliver Constraint: (0.253mm < 0.254mm) Between Via (166.827mm,52.248mm) from Top Layer to Bottom Layer And Via (167.005mm,53.188mm) from Top Layer to Bottom Layer [Top Solder] Mask Sliver [0.253mm] / [Bottom Solder] Mask Sliver [0.253mm]
Rule Violations :106
Processing Rule : Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (143.739mm,51.998mm) on Bottom Overlay And Pad U4-1(143.739mm,52.73mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.09mm < 0.254mm) Between Arc (148.158mm,52.343mm) on Top Overlay And Pad U1-1(147.518mm,52.343mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0.09mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (143.739mm,51.922mm) on Bottom Overlay And Pad U5-1(143.739mm,52.654mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.09mm < 0.254mm) Between Arc (148.158mm,52.749mm) on Top Overlay And Pad U1-1(147.518mm,52.749mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0.09mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Arc (162.699mm,53.878mm) on Bottom Overlay And Pad U4-1(163.417mm,53.726mm) on Bottom Layer [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C12-1(172.237mm,49.773mm) on Bottom Layer And Track (171.637mm,50.673mm)(172.837mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C12-2(172.237mm,51.573mm) on Bottom Layer And Track (171.637mm,50.673mm)(172.837mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C13-1(169.596mm,49.773mm) on Bottom Layer And Track (168.996mm,50.673mm)(170.196mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.164mm < 0.254mm) Between Pad C13-2(169.596mm,51.573mm) on Bottom Layer And Text "U4" (168.605mm,51.867mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.164mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C13-2(169.596mm,51.573mm) on Bottom Layer And Track (168.996mm,50.673mm)(170.196mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C14-1(161.595mm,49.773mm) on Bottom Layer And Track (160.995mm,50.673mm)(162.195mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C14-2(161.595mm,51.573mm) on Bottom Layer And Track (160.995mm,50.673mm)(162.195mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C15-1(163.601mm,49.773mm) on Bottom Layer And Track (163.001mm,50.673mm)(164.201mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C15-2(163.601mm,51.573mm) on Bottom Layer And Track (163.001mm,50.673mm)(164.201mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C16-1(165.608mm,49.773mm) on Bottom Layer And Track (165.008mm,50.673mm)(166.208mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C16-2(165.608mm,51.573mm) on Bottom Layer And Track (165.008mm,50.673mm)(166.208mm,50.673mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.187mm < 0.254mm) Between Pad C17-1(141.3mm,52.524mm) on Bottom Layer And Text "TX" (140.589mm,52.756mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.187mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.186mm < 0.254mm) Between Pad C17-2(141.3mm,53.924mm) on Bottom Layer And Text "TX" (140.589mm,52.756mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.186mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad C6-1(149.174mm,60.943mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C7-1(143.891mm,61.595mm) on Top Layer And Track (144.433mm,60.135mm)(144.433mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.216mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C7-2(143.891mm,60.595mm) on Top Layer And Track (144.433mm,60.135mm)(144.433mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.216mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.22mm < 0.254mm) Between Pad D?-1(157.354mm,50.089mm) on Bottom Layer And Track (154.284mm,49.142mm)(157.284mm,49.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.22mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.206mm < 0.254mm) Between Pad D?-1(157.354mm,50.089mm) on Bottom Layer And Track (154.298mm,51.022mm)(157.298mm,51.022mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.206mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.161mm < 0.254mm) Between Pad D?-1(157.354mm,50.089mm) on Bottom Layer And Track (155.042mm,50.089mm)(156.566mm,50.089mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.161mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.22mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Track (154.284mm,49.142mm)(157.284mm,49.142mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.22mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.206mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Track (154.298mm,51.022mm)(157.298mm,51.022mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.206mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.161mm < 0.254mm) Between Pad D?-2(154.254mm,50.089mm) on Bottom Layer And Track (155.042mm,50.089mm)(156.566mm,50.089mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.161mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-1(175.971mm,54.889mm) on Bottom Layer And Track (176.736mm,53.381mm)(176.736mm,54.308mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-1(175.971mm,54.889mm) on Bottom Layer And Track (176.736mm,55.471mm)(176.736mm,55.558mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-2(175.971mm,56.139mm) on Bottom Layer And Track (176.736mm,55.471mm)(176.736mm,55.558mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-2(175.971mm,56.139mm) on Bottom Layer And Track (176.736mm,56.72mm)(176.736mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.007mm < 0.254mm) Between Pad P1-3(179.06mm,52.047mm) on Bottom Layer And Track (176.736mm,53.381mm)(180.436mm,53.381mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.007mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.018mm < 0.254mm) Between Pad P1-3(179.06mm,52.047mm) on Bottom Layer And Track (180.436mm,53.391mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.018mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.061mm,58.989mm) on Bottom Layer And Track (176.736mm,57.659mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.061mm,58.989mm) on Bottom Layer And Track (180.436mm,53.391mm)(180.436mm,57.659mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-1(140.894mm,56.007mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-2(140.894mm,58.547mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad P2-3(140.894mm,61.087mm) on Bottom Layer And Text "DEBUG" (141.351mm,56.388mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Track (149.332mm,49.396mm)(149.332mm,48.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(149.29mm,50.279mm) on Bottom Layer And Track (149.332mm,51.163mm)(149.332mm,51.856mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(145.22mm,50.279mm) on Bottom Layer And Track (145.179mm,49.396mm)(145.179mm,48.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(145.22mm,50.279mm) on Bottom Layer And Track (145.179mm,51.163mm)(145.179mm,51.856mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(179.108mm,57.546mm) on Top Layer And Track (177.532mm,57.587mm)(178.225mm,57.587mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(179.108mm,57.546mm) on Top Layer And Track (179.991mm,57.587mm)(180.684mm,57.587mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.108mm,53.476mm) on Top Layer And Track (177.532mm,53.434mm)(178.225mm,53.434mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.108mm,53.476mm) on Top Layer And Track (179.991mm,53.434mm)(180.684mm,53.434mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.211mm < 0.254mm) Between Pad U1-1(147.518mm,52.343mm) on Top Layer And Track (147.594mm,51.517mm)(147.594mm,52.012mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.211mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-12(147.518mm,57.843mm) on Top Layer And Track (147.594mm,58.173mm)(147.594mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-13(146.768mm,58.593mm) on Top Layer And Track (147.098mm,58.669mm)(147.594mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.21mm < 0.254mm) Between Pad U1-24(141.268mm,58.593mm) on Top Layer And Track (140.442mm,58.669mm)(140.938mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.21mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-25(140.518mm,57.843mm) on Top Layer And Track (140.442mm,58.173mm)(140.442mm,58.669mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-36(140.518mm,52.343mm) on Top Layer And Track (140.442mm,51.517mm)(140.442mm,52.012mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-37(141.268mm,51.593mm) on Top Layer And Track (140.442mm,51.517mm)(140.938mm,51.517mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-48(146.768mm,51.593mm) on Top Layer And Track (147.098mm,51.517mm)(147.594mm,51.517mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-1(172.988mm,55.093mm) on Bottom Layer And Track (167.287mm,56.554mm)(174.089mm,56.554mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-2(170.688mm,55.093mm) on Bottom Layer And Track (167.287mm,56.554mm)(174.089mm,56.554mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-3(168.388mm,55.093mm) on Bottom Layer And Track (167.287mm,56.554mm)(174.089mm,56.554mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-4(170.688mm,60.808mm) on Bottom Layer And Track (167.287mm,59.346mm)(174.089mm,59.346mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U3-4(163.322mm,60.706mm) on Bottom Layer And Track (159.996mm,59.307mm)(166.648mm,59.307mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-1(143.739mm,52.73mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-10(149.484mm,60.35mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-11(149.484mm,59.08mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-12(149.484mm,57.81mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-13(149.484mm,56.54mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-14(149.484mm,55.27mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-15(149.484mm,54mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-16(149.484mm,52.73mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-2(143.739mm,54mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-3(143.739mm,55.27mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-4(143.739mm,56.54mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-5(143.739mm,57.81mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-6(143.739mm,59.08mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-7(143.739mm,60.35mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U4-8(143.739mm,61.62mm) on Bottom Layer And Track (144.84mm,52.099mm)(144.84mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U4-9(149.484mm,61.62mm) on Bottom Layer And Track (148.383mm,52.099mm)(148.383mm,62.252mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(151.384mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-(151.384mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(151.384mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.244mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-(174.244mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.244mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-(174.244mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-1(169.164mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-1(169.164mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-10(164.084mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-10(164.084mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-11(166.624mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-11(166.624mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-12(169.164mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-12(169.164mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-2(166.624mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-2(166.624mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-3(164.084mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-3(164.084mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-4(161.544mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-4(161.544mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-5(159.004mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-5(159.004mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-6(156.464mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-6(156.464mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-7(156.464mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-7(156.464mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-8(159.004mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-8(159.004mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-9(161.544mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U5-9(161.544mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (144.433mm,60.135mm)(148.49mm,60.135mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (144.433mm,62.293mm)(148.49mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.075mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (148.463mm,50.673mm)(148.463mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.075mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.075mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.075mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-1(147.736mm,61.214mm) on Top Layer And Track (148.49mm,60.135mm)(148.49mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Track (144.433mm,60.135mm)(144.433mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Track (144.433mm,60.135mm)(148.49mm,60.135mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad Y?-2(145.186mm,61.214mm) on Top Layer And Track (144.433mm,62.293mm)(148.49mm,62.293mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.152mm]
Rule Violations :111
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C14-1(166.903mm,56.207mm) on Bottom Layer And Track (166.303mm,55.307mm)(167.503mm,55.307mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C14-2(166.903mm,54.407mm) on Bottom Layer And Track (166.303mm,55.307mm)(167.503mm,55.307mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.2mm < 0.254mm) Between Pad C15-1(166.903mm,58.714mm) on Bottom Layer And Track (166.303mm,59.614mm)(167.503mm,59.614mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.2mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.216mm < 0.254mm) Between Pad C15-2(166.903mm,60.514mm) on Bottom Layer And Track (166.303mm,59.614mm)(167.503mm,59.614mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.216mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.228mm < 0.254mm) Between Pad C18-1(140.64mm,53.391mm) on Bottom Layer And Text "TX" (142.392mm,54.356mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.228mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.249mm < 0.254mm) Between Pad P1-1(176.022mm,52.934mm) on Bottom Layer And Text "+" (175.336mm,51.206mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.249mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-1(176.022mm,52.934mm) on Bottom Layer And Track (176.787mm,51.425mm)(176.787mm,52.352mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-1(176.022mm,52.934mm) on Bottom Layer And Track (176.787mm,53.515mm)(176.787mm,53.602mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.169mm < 0.254mm) Between Pad P1-2(176.022mm,54.183mm) on Bottom Layer And Track (176.787mm,53.515mm)(176.787mm,53.602mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.169mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.104mm < 0.254mm) Between Pad P1-2(176.022mm,54.183mm) on Bottom Layer And Track (176.787mm,54.764mm)(176.787mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.104mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.007mm < 0.254mm) Between Pad P1-3(179.111mm,50.091mm) on Bottom Layer And Track (176.787mm,51.425mm)(180.487mm,51.425mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.007mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.018mm < 0.254mm) Between Pad P1-3(179.111mm,50.091mm) on Bottom Layer And Track (180.487mm,51.436mm)(180.487mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.018mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.112mm,57.033mm) on Bottom Layer And Track (176.787mm,55.703mm)(180.487mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.112mm < 0.254mm) Between Pad P1-4(179.112mm,57.033mm) on Bottom Layer And Track (180.487mm,51.436mm)(180.487mm,55.703mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.112mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Track (148.163mm,49.345mm)(148.163mm,48.652mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-1(148.122mm,50.229mm) on Bottom Layer And Track (148.163mm,51.112mm)(148.163mm,51.805mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(144.052mm,50.229mm) on Bottom Layer And Track (144.011mm,49.345mm)(144.011mm,48.652mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW1-2(144.052mm,50.229mm) on Bottom Layer And Track (144.011mm,51.112mm)(144.011mm,51.805mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(175.728mm,60.261mm) on Bottom Layer And Track (175.687mm,58.685mm)(175.687mm,59.378mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-1(175.728mm,60.261mm) on Bottom Layer And Track (175.687mm,61.838mm)(175.687mm,61.145mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.798mm,60.261mm) on Bottom Layer And Track (179.839mm,58.685mm)(179.839mm,59.378mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.127mm < 0.254mm) Between Pad SW2-2(179.798mm,60.261mm) on Bottom Layer And Track (179.839mm,61.838mm)(179.839mm,61.145mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.127mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-1(164.166mm,60.745mm) on Bottom Layer And Track (162.702mm,55.119mm)(162.702mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-2(164.166mm,58.445mm) on Bottom Layer And Track (162.702mm,55.119mm)(162.702mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-3(164.166mm,56.145mm) on Bottom Layer And Track (162.702mm,55.119mm)(162.702mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.022mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Track (156.54mm,59.106mm)(157.175mm,59.106mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.022mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.022mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Track (157.175mm,51.994mm)(157.175mm,59.106mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.022mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U?-4(158.496mm,58.445mm) on Bottom Layer And Track (159.96mm,55.119mm)(159.96mm,61.772mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.211mm < 0.254mm) Between Pad U1-1(147.518mm,52.749mm) on Top Layer And Track (147.594mm,51.923mm)(147.594mm,52.419mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.211mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-12(147.518mm,58.249mm) on Top Layer And Track (147.594mm,58.58mm)(147.594mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-13(146.768mm,58.999mm) on Top Layer And Track (147.098mm,59.075mm)(147.594mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.215mm < 0.254mm) Between Pad U1-22(142.268mm,58.999mm) on Top Layer And Text "U1" (140.132mm,59.741mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.215mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.215mm < 0.254mm) Between Pad U1-23(141.768mm,58.999mm) on Top Layer And Text "U1" (140.132mm,59.741mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.215mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.21mm < 0.254mm) Between Pad U1-24(141.268mm,58.999mm) on Top Layer And Track (140.442mm,59.075mm)(140.938mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.21mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-25(140.518mm,58.249mm) on Top Layer And Track (140.442mm,58.58mm)(140.442mm,59.075mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-36(140.518mm,52.749mm) on Top Layer And Track (140.442mm,51.923mm)(140.442mm,52.419mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-37(141.268mm,51.999mm) on Top Layer And Track (140.442mm,51.923mm)(140.938mm,51.923mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.114mm < 0.254mm) Between Pad U1-48(146.768mm,51.999mm) on Top Layer And Track (147.098mm,51.923mm)(147.594mm,51.923mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.114mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-1(173.801mm,54.813mm) on Bottom Layer And Track (168.1mm,56.274mm)(174.902mm,56.274mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-2(171.501mm,54.813mm) on Bottom Layer And Track (168.1mm,56.274mm)(174.902mm,56.274mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.076mm < 0.254mm) Between Pad U2-3(169.201mm,54.813mm) on Bottom Layer And Text "U4" (168.605mm,51.867mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.076mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-3(169.201mm,54.813mm) on Bottom Layer And Track (168.1mm,56.274mm)(174.902mm,56.274mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U2-4(171.501mm,60.528mm) on Bottom Layer And Track (168.1mm,59.067mm)(174.902mm,59.067mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.253mm < 0.254mm) Between Pad U4-4(165.317mm,51.431mm) on Bottom Layer And Track (163.911mm,51.677mm)(164.822mm,51.677mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.253mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.152mm < 0.254mm) Between Pad U4-5(163.417mm,51.431mm) on Bottom Layer And Track (163.911mm,51.677mm)(164.822mm,51.677mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.152mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-1(143.739mm,52.654mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-10(149.484mm,60.274mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-11(149.484mm,59.004mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-12(149.484mm,57.734mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-13(149.484mm,56.464mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-14(149.484mm,55.194mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-15(149.484mm,53.924mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-16(149.484mm,52.654mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-2(143.739mm,53.924mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-3(143.739mm,55.194mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-4(143.739mm,56.464mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-4(143.739mm,56.464mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-5(143.739mm,57.734mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-5(143.739mm,57.734mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-6(143.739mm,59.004mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-6(143.739mm,59.004mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U5-7(143.739mm,60.274mm) on Bottom Layer And Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-7(143.739mm,60.274mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.234mm < 0.254mm) Between Pad U5-8(143.739mm,61.544mm) on Bottom Layer And Track (144.84mm,52.023mm)(144.84mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.234mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad U5-9(149.484mm,61.544mm) on Bottom Layer And Track (148.383mm,52.023mm)(148.383mm,62.175mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.247mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,50.292mm) on Top Overlay And Region (0 hole(s)) Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,50.292mm) on Top Overlay And Track (151.486mm,50.597mm)(151.486mm,53.384mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,50.292mm) on Top Overlay And Via (151.486mm,50.597mm) from Top Layer to Bottom Layer [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.196mm < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Region (0 hole(s)) Top Layer [Top Overlay] to [Top Solder] clearance [0.196mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Region (0 hole(s)) Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Track (150.038mm,61.544mm)(150.52mm,61.062mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0.124mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Track (151.13mm,59.995mm)(151.917mm,59.995mm) on Top Layer [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.225mm < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Via (150.038mm,61.544mm) from Top Layer to Bottom Layer [Top Overlay] to [Top Solder] clearance [0.225mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(151.384mm,60.789mm) on Top Overlay And Via (151.13mm,59.995mm) from Top Layer to Bottom Layer [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(174.244mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-(174.244mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(174.244mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-(174.244mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-1(169.164mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-1(169.164mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-10(164.084mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-10(164.084mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-11(166.624mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-11(166.624mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-12(169.164mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-12(169.164mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-2(166.624mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-2(166.624mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-3(164.084mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-3(164.084mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-4(161.544mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-4(161.544mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-5(159.004mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-5(159.004mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-6(156.464mm,60.789mm) on Top Layer And Track (148.463mm,60.706mm)(177.292mm,60.706mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-6(156.464mm,60.789mm) on Top Layer And Track (148.59mm,59.69mm)(177.292mm,59.69mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-7(156.464mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-7(156.464mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-8(159.004mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-8(159.004mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad U6-9(161.544mm,50.292mm) on Top Layer And Track (148.463mm,50.673mm)(177.292mm,50.673mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
Violation between Silk To Solder Mask Clearance Constraint: (0.02mm < 0.254mm) Between Pad U6-9(161.544mm,50.292mm) on Top Layer And Track (148.59mm,51.689mm)(177.292mm,51.689mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.02mm]
Rule Violations :110
Processing Rule : Silk to Silk (Clearance=0.254mm) (All),(All)
Violation between Silk To Silk Clearance Constraint: (0.095mm < 0.254mm) Between Text "TX" (140.589mm,52.756mm) on Bottom Overlay And Track (139.624mm,54.737mm)(139.624mm,62.357mm) on Bottom Overlay Silk Text to Silk Clearance [0.095mm]
Violation between Silk To Silk Clearance Constraint: (0.092mm < 0.254mm) Between Text "TX" (140.589mm,52.756mm) on Bottom Overlay And Track (139.624mm,54.737mm)(142.164mm,54.737mm) on Bottom Overlay Silk Text to Silk Clearance [0.092mm]
Rule Violations :2
Violation between Silk To Silk Clearance Constraint: (0.195mm < 0.254mm) Between Text "+" (175.336mm,51.206mm) on Bottom Overlay And Track (176.787mm,51.425mm)(176.787mm,52.352mm) on Bottom Overlay Silk Text to Silk Clearance [0.195mm]
Violation between Silk To Silk Clearance Constraint: (0.07mm < 0.254mm) Between Text "DEBUG" (143.739mm,60.579mm) on Bottom Overlay And Track (142.494mm,54.737mm)(142.494mm,62.357mm) on Bottom Overlay Silk Text to Silk Clearance [0.07mm]
Violation between Silk To Silk Clearance Constraint: (0.129mm < 0.254mm) Between Text "RESET" (180.645mm,62.103mm) on Bottom Overlay And Track (175.687mm,61.838mm)(179.839mm,61.838mm) on Bottom Overlay Silk Text to Silk Clearance [0.129mm]
Violation between Silk To Silk Clearance Constraint: (0.14mm < 0.254mm) Between Text "RESET" (180.645mm,62.103mm) on Bottom Overlay And Track (179.839mm,61.838mm)(179.839mm,61.145mm) on Bottom Overlay Silk Text to Silk Clearance [0.14mm]
Violation between Silk To Silk Clearance Constraint: (0.206mm < 0.254mm) Between Text "TX" (142.392mm,54.356mm) on Bottom Overlay And Track (139.954mm,54.737mm)(142.494mm,54.737mm) on Bottom Overlay Silk Text to Silk Clearance [0.206mm]
Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "U4" (168.605mm,51.867mm) on Bottom Overlay And Track (165.918mm,51.677mm)(165.918mm,53.479mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
Rule Violations :6
Processing Rule : Net Antennae (Tolerance=0mm) (All)
Rule Violations :0
@ -329,6 +265,6 @@ Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (Al
Rule Violations :0
Violations Detected : 286
Violations Detected : 222
Waived Violations : 0
Time Elapsed : 00:00:02
Time Elapsed : 00:00:01