2022.6.27更新
This commit is contained in:
112
fsa1/sw/Design Rule Check - FSA_SW_PCB 微调_2022-06-23.drc
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112
fsa1/sw/Design Rule Check - FSA_SW_PCB 微调_2022-06-23.drc
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Protel Design System Design Rule Check
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PCB File : C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc
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Date : 2022/6/24
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Time : 10:25:55
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Processing Rule : Clearance Constraint (Gap=0.2mm) (All),(All)
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Rule Violations :0
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Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
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Rule Violations :0
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Processing Rule : Un-Routed Net Constraint ( (All) )
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Rule Violations :0
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Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No)
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Rule Violations :0
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Processing Rule : Width Constraint (Min=0.254mm) (Max=1mm) (Preferred=0.254mm) (All)
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Rule Violations :0
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Processing Rule : Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
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Rule Violations :0
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Processing Rule : Hole Size Constraint (Min=0.025mm) (Max=2.54mm) (All)
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Rule Violations :0
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Processing Rule : Hole To Hole Clearance (Gap=0.254mm) (All),(All)
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Rule Violations :0
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Processing Rule : Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)
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Violation between Minimum Solder Mask Sliver Constraint: (0.047mm < 0.254mm) Between Pad IN-1(42.281mm,40.45mm) on Multi-Layer And Pad IN-2(41.031mm,40.45mm) on Multi-Layer [Top Solder] Mask Sliver [0.146mm] / [Bottom Solder] Mask Sliver [0.047mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.244mm < 0.254mm) Between Pad IN-2(41.031mm,40.45mm) on Multi-Layer And Region (0 hole(s)) Top Solder [Top Solder] Mask Sliver [0.244mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.047mm < 0.254mm) Between Pad OUT-1(63.49mm,40.45mm) on Multi-Layer And Pad OUT-2(62.24mm,40.45mm) on Multi-Layer [Top Solder] Mask Sliver [0.221mm] / [Bottom Solder] Mask Sliver [0.047mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.244mm < 0.254mm) Between Pad OUT-2(62.24mm,40.45mm) on Multi-Layer And Region (0 hole(s)) Top Solder [Top Solder] Mask Sliver [0.244mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad SW1-1(50.117mm,41.179mm) on Multi-Layer And Pad SW1-2(50.117mm,43.179mm) on Multi-Layer [Top Solder] Mask Sliver [0.197mm] / [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad SW1-2(50.117mm,43.179mm) on Multi-Layer And Pad SW1-3(50.117mm,45.179mm) on Multi-Layer [Top Solder] Mask Sliver [0.197mm] / [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad SW1-4(45.617mm,41.179mm) on Multi-Layer And Pad SW1-5(45.617mm,43.179mm) on Multi-Layer [Top Solder] Mask Sliver [0.197mm] / [Bottom Solder] Mask Sliver [0.197mm]
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Violation between Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad SW1-5(45.617mm,43.179mm) on Multi-Layer And Pad SW1-6(45.617mm,45.179mm) on Multi-Layer [Top Solder] Mask Sliver [0.197mm] / [Bottom Solder] Mask Sliver [0.197mm]
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Rule Violations :8
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Processing Rule : Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)
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Violation between Silk To Solder Mask Clearance Constraint: (0.133mm < 0.254mm) Between Arc (57.967mm,43.179mm) on Top Overlay And Pad LED1-1(56.697mm,43.179mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.133mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.221mm < 0.254mm) Between Arc (57.967mm,43.179mm) on Top Overlay And Pad LED1-1(56.697mm,43.179mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.221mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.135mm < 0.254mm) Between Pad IN-1(42.281mm,40.45mm) on Multi-Layer And Track (39.481mm,39.688mm)(43.831mm,39.688mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.135mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.223mm < 0.254mm) Between Pad IN-2(41.031mm,40.45mm) on Multi-Layer And Track (39.481mm,39.688mm)(43.831mm,39.688mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.223mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.253mm < 0.254mm) Between Pad LED1-1(56.697mm,43.179mm) on Multi-Layer And Text "IRIS 20211217" (59.944mm,44.005mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.253mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.251mm < 0.254mm) Between Pad LED1-1(56.697mm,43.179mm) on Multi-Layer And Track (57.367mm,44.179mm)(57.367mm,44.779mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.251mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.083mm < 0.254mm) Between Pad LED1-2(59.237mm,43.179mm) on Multi-Layer And Text "IRIS 20211217" (59.944mm,44.005mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.083mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.233mm < 0.254mm) Between Pad LED1-2(59.237mm,43.179mm) on Multi-Layer And Track (59.467mm,41.857mm)(59.467mm,42.129mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.233mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.233mm < 0.254mm) Between Pad LED1-2(59.237mm,43.179mm) on Multi-Layer And Track (59.467mm,44.23mm)(59.467mm,44.502mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.233mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.135mm < 0.254mm) Between Pad OUT-1(63.49mm,40.45mm) on Multi-Layer And Track (60.69mm,39.688mm)(65.04mm,39.688mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.135mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.223mm < 0.254mm) Between Pad OUT-2(62.24mm,40.45mm) on Multi-Layer And Track (60.69mm,39.688mm)(65.04mm,39.688mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.223mm]
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Violation between Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad R1-1(53.086mm,43.535mm) on Top Layer And Text "R1" (52.324mm,44.069mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.123mm < 0.254mm) Between Pad R1-1(53.086mm,43.535mm) on Top Layer And Track (52.286mm,43.035mm)(52.286mm,44.285mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.123mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.123mm < 0.254mm) Between Pad R1-1(53.086mm,43.535mm) on Top Layer And Track (52.286mm,44.285mm)(53.886mm,44.285mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.123mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.123mm < 0.254mm) Between Pad R1-1(53.086mm,43.535mm) on Top Layer And Track (53.886mm,43.035mm)(53.886mm,44.285mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.123mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.118mm < 0.254mm) Between Pad R1-2(53.086mm,41.936mm) on Top Layer And Track (52.291mm,41.185mm)(52.291mm,42.435mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.118mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.124mm < 0.254mm) Between Pad R1-2(53.086mm,41.936mm) on Top Layer And Track (52.291mm,41.185mm)(53.891mm,41.185mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.128mm < 0.254mm) Between Pad R1-2(53.086mm,41.936mm) on Top Layer And Track (53.891mm,41.185mm)(53.891mm,42.435mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.128mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.174mm < 0.254mm) Between Pad SW1-1(50.117mm,41.179mm) on Multi-Layer And Track (46.118mm,40.28mm)(49.616mm,40.28mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.174mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad SW1-1(50.117mm,41.179mm) on Multi-Layer And Track (50.618mm,40.28mm)(50.767mm,40.28mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.243mm < 0.254mm) Between Pad SW1-1(50.117mm,41.179mm) on Multi-Layer And Track (50.767mm,40.28mm)(50.767mm,40.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.243mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.121mm < 0.254mm) Between Pad SW1-1(50.117mm,41.179mm) on Multi-Layer And Track (50.767mm,41.979mm)(50.767mm,42.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.121mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.243mm < 0.254mm) Between Pad SW1-2(50.117mm,43.179mm) on Multi-Layer And Track (50.767mm,41.979mm)(50.767mm,42.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.243mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.121mm < 0.254mm) Between Pad SW1-2(50.117mm,43.179mm) on Multi-Layer And Track (50.767mm,43.979mm)(50.767mm,44.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.121mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.221mm < 0.254mm) Between Pad SW1-3(50.117mm,45.179mm) on Multi-Layer And Text "IRIS 20211217" (59.944mm,44.005mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.221mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.242mm < 0.254mm) Between Pad SW1-3(50.117mm,45.179mm) on Multi-Layer And Track (46.118mm,46.079mm)(49.616mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.242mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.207mm < 0.254mm) Between Pad SW1-3(50.117mm,45.179mm) on Multi-Layer And Track (50.618mm,46.079mm)(50.767mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.207mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.243mm < 0.254mm) Between Pad SW1-3(50.117mm,45.179mm) on Multi-Layer And Track (50.767mm,43.979mm)(50.767mm,44.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.243mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.121mm < 0.254mm) Between Pad SW1-3(50.117mm,45.179mm) on Multi-Layer And Track (50.767mm,45.979mm)(50.767mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.121mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.106mm < 0.254mm) Between Pad SW1-4(45.617mm,41.179mm) on Multi-Layer And Track (44.967mm,40.28mm)(44.967mm,40.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.106mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.174mm < 0.254mm) Between Pad SW1-4(45.617mm,41.179mm) on Multi-Layer And Track (44.967mm,40.28mm)(45.116mm,40.28mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.174mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.218mm < 0.254mm) Between Pad SW1-4(45.617mm,41.179mm) on Multi-Layer And Track (44.967mm,41.979mm)(44.967mm,42.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.218mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad SW1-4(45.617mm,41.179mm) on Multi-Layer And Track (46.118mm,40.28mm)(49.616mm,40.28mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.106mm < 0.254mm) Between Pad SW1-5(45.617mm,43.179mm) on Multi-Layer And Track (44.967mm,41.979mm)(44.967mm,42.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.106mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.218mm < 0.254mm) Between Pad SW1-5(45.617mm,43.179mm) on Multi-Layer And Track (44.967mm,43.979mm)(44.967mm,44.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.218mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.106mm < 0.254mm) Between Pad SW1-6(45.617mm,45.179mm) on Multi-Layer And Track (44.967mm,43.979mm)(44.967mm,44.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.106mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.218mm < 0.254mm) Between Pad SW1-6(45.617mm,45.179mm) on Multi-Layer And Track (44.967mm,45.979mm)(44.967mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.218mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.242mm < 0.254mm) Between Pad SW1-6(45.617mm,45.179mm) on Multi-Layer And Track (44.967mm,46.079mm)(45.116mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.242mm]
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Violation between Silk To Solder Mask Clearance Constraint: (0.207mm < 0.254mm) Between Pad SW1-6(45.617mm,45.179mm) on Multi-Layer And Track (46.118mm,46.079mm)(49.616mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.207mm]
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Rule Violations :39
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Processing Rule : Silk to Silk (Clearance=0.254mm) (All),(All)
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Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Arc (57.967mm,43.179mm) on Top Overlay And Text "LED1" (56.388mm,44.958mm) on Top Overlay Silk Text to Silk Clearance [0mm]
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Violation between Silk To Silk Clearance Constraint: (0.047mm < 0.254mm) Between Text "G" (39.243mm,39.243mm) on Bottom Overlay And Track (39.481mm,39.688mm)(39.481mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0.047mm]
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Violation between Silk To Silk Clearance Constraint: (0.047mm < 0.254mm) Between Text "G" (39.243mm,39.243mm) on Bottom Overlay And Track (39.481mm,39.688mm)(43.831mm,39.688mm) on Bottom Overlay Silk Text to Silk Clearance [0.047mm]
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Violation between Silk To Silk Clearance Constraint: (0.047mm < 0.254mm) Between Text "G" (60.452mm,39.243mm) on Bottom Overlay And Track (60.69mm,39.688mm)(60.69mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0.047mm]
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Violation between Silk To Silk Clearance Constraint: (0.047mm < 0.254mm) Between Text "G" (60.452mm,39.243mm) on Bottom Overlay And Track (60.69mm,39.688mm)(65.04mm,39.688mm) on Bottom Overlay Silk Text to Silk Clearance [0.047mm]
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Violation between Silk To Silk Clearance Constraint: (0.042mm < 0.254mm) Between Text "IN" (42.989mm,44.895mm) on Bottom Overlay And Track (39.481mm,44.649mm)(43.831mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0.042mm]
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Violation between Silk To Silk Clearance Constraint: (0.185mm < 0.254mm) Between Text "IN" (42.989mm,44.895mm) on Bottom Overlay And Track (43.831mm,39.688mm)(43.831mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0.185mm]
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Violation between Silk To Silk Clearance Constraint: (0.039mm < 0.254mm) Between Text "LED1" (56.388mm,44.958mm) on Top Overlay And Track (57.367mm,44.179mm)(57.367mm,44.779mm) on Top Overlay Silk Text to Silk Clearance [0.039mm]
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Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "OUT" (64.897mm,44.577mm) on Bottom Overlay And Track (60.69mm,44.649mm)(65.04mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
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Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "OUT" (64.897mm,44.577mm) on Bottom Overlay And Track (65.04mm,39.688mm)(65.04mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
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Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "R1" (52.324mm,44.069mm) on Top Overlay And Track (52.286mm,43.035mm)(52.286mm,44.285mm) on Top Overlay Silk Text to Silk Clearance [0mm]
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Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "R1" (52.324mm,44.069mm) on Top Overlay And Track (52.286mm,44.285mm)(53.886mm,44.285mm) on Top Overlay Silk Text to Silk Clearance [0mm]
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Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "R1" (52.324mm,44.069mm) on Top Overlay And Track (53.886mm,43.035mm)(53.886mm,44.285mm) on Top Overlay Silk Text to Silk Clearance [0mm]
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Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "v" (44.927mm,39.415mm) on Bottom Overlay And Track (39.481mm,39.688mm)(43.831mm,39.688mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
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Violation between Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "v" (44.927mm,39.415mm) on Bottom Overlay And Track (43.831mm,39.688mm)(43.831mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]
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Violation between Silk To Silk Clearance Constraint: (0.108mm < 0.254mm) Between Text "v" (65.69mm,39.542mm) on Bottom Overlay And Track (60.69mm,39.688mm)(65.04mm,39.688mm) on Bottom Overlay Silk Text to Silk Clearance [0.108mm]
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Violation between Silk To Silk Clearance Constraint: (0.056mm < 0.254mm) Between Text "v" (65.69mm,39.542mm) on Bottom Overlay And Track (65.04mm,39.688mm)(65.04mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0.056mm]
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Rule Violations :17
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Processing Rule : Net Antennae (Tolerance=0mm) (All)
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Rule Violations :0
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Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
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Rule Violations :0
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Violations Detected : 64
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Waived Violations : 0
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Time Elapsed : 00:00:00
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528
fsa1/sw/Design Rule Check - FSA_SW_PCB 微调_2022-06-23.html
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fsa1/sw/Design Rule Check - FSA_SW_PCB 微调_2022-06-23.html
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<html>
|
||||
<head>
|
||||
<META http-equiv="Content-Type" content="text/html">
|
||||
<style type="text/css">
|
||||
h1, h2, h3, h4, h5, h6 {
|
||||
font-family : segoe ui;
|
||||
color : black;
|
||||
background-color : #EDE7D9;
|
||||
padding: 0.3em;
|
||||
}
|
||||
|
||||
h1 {
|
||||
font-size: 1.2em;
|
||||
}
|
||||
|
||||
h2 {
|
||||
font-size: 1.2em;
|
||||
}
|
||||
|
||||
body {
|
||||
font-family : segoe ui;
|
||||
}
|
||||
|
||||
td, th {
|
||||
padding: 0.5em;
|
||||
text-align : left;
|
||||
width: 10em;
|
||||
}
|
||||
th {
|
||||
background-color : #EEEEEE;
|
||||
|
||||
}
|
||||
th.column1, td.column1 {
|
||||
text-align: left;
|
||||
width : auto;
|
||||
}
|
||||
table {
|
||||
width : 100%;
|
||||
font-size: 0.9em;
|
||||
}
|
||||
|
||||
.DRC_summary_header {
|
||||
padding-bottom : 0.1em;
|
||||
border : 0px solid black;
|
||||
width: 100%;
|
||||
align: left;
|
||||
}
|
||||
|
||||
.DRC_summary_header_col1,
|
||||
.DRC_summary_header_col2,
|
||||
.DRC_summary_header_col3 {
|
||||
color : black;
|
||||
font-size:100%;
|
||||
padding : 0em;
|
||||
padding-top : 0.2em;
|
||||
padding-bottom 0.2em;
|
||||
border : 0px solid black;
|
||||
vertical-align: top;
|
||||
text-align: left;
|
||||
}
|
||||
|
||||
.DRC_summary_header_col1 {
|
||||
font-weight: bold;
|
||||
width: 8em;
|
||||
}
|
||||
|
||||
.DRC_summary_header_col2 {
|
||||
width: 0.1em;
|
||||
|
||||
}
|
||||
|
||||
.DRC_summary_header_col3 {
|
||||
width : auto;
|
||||
}
|
||||
|
||||
.header_holder {
|
||||
Width = 100%;
|
||||
border = 0px solid green;
|
||||
padding = 0;
|
||||
}
|
||||
|
||||
|
||||
.front_matter, .front_matter_column1, .front_matter_column2, .front_matter_column3
|
||||
{
|
||||
left : 0;
|
||||
top : 0;
|
||||
padding: 0em;
|
||||
padding-top : 0.1em;
|
||||
border : 0px solid black;
|
||||
width : 100%;
|
||||
vertical-align: top;
|
||||
text-align: left;
|
||||
}
|
||||
|
||||
.front_matter_column1 {
|
||||
width : 8em;
|
||||
font-weight: bold;
|
||||
}
|
||||
|
||||
.front_matter_column2 {
|
||||
width: 0.1em;
|
||||
}
|
||||
|
||||
.front_matter_column3 {
|
||||
width : auto;
|
||||
}
|
||||
|
||||
.total_column1, .total_column {
|
||||
font-weight : bold;
|
||||
}
|
||||
.total_column1 {
|
||||
text-align : left;
|
||||
}
|
||||
.warning, .error {
|
||||
color : red;
|
||||
font-weight : bold;
|
||||
}
|
||||
tr.onmouseout_odd {
|
||||
background-color : #white;
|
||||
}
|
||||
tr.onmouseout_even {
|
||||
background-color : #FAFAFA;
|
||||
}
|
||||
tr.onmouseover_odd, tr.onmouseover_even {
|
||||
background-color : #EEEEEE;
|
||||
}
|
||||
a:link, a:visited, .q a:link,.q a:active,.q {
|
||||
color: #21489e;
|
||||
}
|
||||
a:link.callback, a:visited.callback {
|
||||
color: #21489e;
|
||||
}
|
||||
a:link.customize, a:visited.customize {
|
||||
color: #C0C0C0;
|
||||
position: absolute;
|
||||
right: 10px;
|
||||
}
|
||||
p.contents_level1 {
|
||||
font-weight : bold;
|
||||
font-size : 110%;
|
||||
margin : 0.5em;
|
||||
}
|
||||
p.contents_level2 {
|
||||
position : relative;
|
||||
left : 20px;
|
||||
margin : 0.5em;
|
||||
}
|
||||
</style><script type="text/javascript">
|
||||
function coordToMils(coord) {
|
||||
var number = coord / 10000;
|
||||
|
||||
if (number != number.toFixed(3))
|
||||
number = number.toFixed(3);
|
||||
|
||||
return number + 'mil'
|
||||
}
|
||||
|
||||
function coordToMM(coord) {
|
||||
var number = 0.0254 * coord / 10000;
|
||||
|
||||
if (number != number.toFixed(4))
|
||||
number = number.toFixed(4);
|
||||
|
||||
return number + 'mm'
|
||||
}
|
||||
|
||||
function convertCoord(coordNode, units) {
|
||||
for (var i = 0; i < coordNode.childNodes.length; i++) {
|
||||
coordNode.removeChild(coordNode.childNodes[i]);
|
||||
}
|
||||
|
||||
var coord = coordNode.getAttribute('value');
|
||||
if (coord != null) {
|
||||
if (units == 'mm') {
|
||||
textNode = document.createTextNode(coordToMM(coord));
|
||||
coordNode.appendChild(textNode);
|
||||
} else if (units == 'mil') {
|
||||
textNode = document.createTextNode(coordToMils(coord));
|
||||
coordNode.appendChild(textNode);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
function convertUnits(unitNode, units) {
|
||||
for (var i = 0; i < unitNode.childNodes.length; i++) {
|
||||
unitNode.removeChild(unitNode.childNodes[i]);
|
||||
}
|
||||
|
||||
textNode = document.createTextNode(units);
|
||||
unitNode.appendChild(textNode);
|
||||
}
|
||||
|
||||
function changeUnits(radio_input, units) {
|
||||
if (radio_input.checked) {
|
||||
|
||||
var elements = document.getElementsByName('coordinate');
|
||||
if (elements) {
|
||||
for (var i = 0; i < elements.length; i++) {
|
||||
convertCoord(elements[i], units);
|
||||
}
|
||||
}
|
||||
|
||||
var elements = document.getElementsByName('units');
|
||||
if (elements) {
|
||||
for (var i = 0; i < elements.length; i++) {
|
||||
convertUnits(elements[i], units);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
</script><title>Design Rule Verification Report</title>
|
||||
</head>
|
||||
<body onload=""><img ALT="Altium" src="
|
||||
file://C:\Users\Public\Documents\Altium\AD18\Templates\AD_logo.png
|
||||
"><h1>Design Rule Verification Report</h1>
|
||||
<table class="header_holder">
|
||||
<td class="column1">
|
||||
<table class="front_matter">
|
||||
<tr class="front_matter">
|
||||
<td class="front_matter_column1">Date:</td>
|
||||
<td class="front_matter_column2"></td>
|
||||
<td class="front_matter_column3">2022/6/24</td>
|
||||
</tr>
|
||||
<tr class="front_matter">
|
||||
<td class="front_matter_column1">Time:</td>
|
||||
<td class="front_matter_column2"></td>
|
||||
<td class="front_matter_column3">10:25:55</td>
|
||||
</tr>
|
||||
<tr class="front_matter">
|
||||
<td class="front_matter_column1">Elapsed Time:</td>
|
||||
<td class="front_matter_column2"></td>
|
||||
<td class="front_matter_column3">00:00:00</td>
|
||||
</tr>
|
||||
<tr class="front_matter">
|
||||
<td class="front_matter_column1">Filename:</td>
|
||||
<td class="front_matter_column2"></td>
|
||||
<td class="front_matter_column3"><a href="file:///C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc" class="file"><acronym title="C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc">C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc</acronym></a></td>
|
||||
</tr>
|
||||
</table>
|
||||
</td>
|
||||
<td class="column2">
|
||||
<table class="DRC_summary_header">
|
||||
<tr>
|
||||
<td class="DRC_summary_header_col1">Warnings:</td>
|
||||
<td class="DRC_summary_header_col2"></td>
|
||||
<td class="DRC_summary_header_col3">0</td></tr>
|
||||
<tr>
|
||||
<td class="DRC_summary_header_col1">Rule Violations:</td>
|
||||
<td class="DRC_summary_header_col2"></td>
|
||||
<td class="DRC_summary_header_col3" style="color : red">64</td></tr>
|
||||
</table>
|
||||
</td>
|
||||
</table><a name="IDOCZUQ51A3IBONYFLVWLEYZRCKDPUVNUKM5034JCZTBLAQRNB3NMK"><h2>Summary</h2></a><table>
|
||||
<tr>
|
||||
<th class="column1">Warnings</th>
|
||||
<th class="column2">Count</th>
|
||||
</tr>
|
||||
<tr>
|
||||
<td style="font-weight : bold; text-align : right" class="column1">Total</td>
|
||||
<td style="font-weight : bold" class="column2">0</td>
|
||||
</tr>
|
||||
</table><br><table>
|
||||
<tr>
|
||||
<th class="column1">Rule Violations</th>
|
||||
<th class="column2">Count</th>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="#IDJRRAUCBTAE25FG4BMVPJ05JI3FYRZR4HYQS3ITNY5QRMORYOQ2SH">Clearance Constraint (Gap=0.2mm) (All),(All)</a></td>
|
||||
<td class="column2">0</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="#IDTZXROXFHIYAQOJPXDC44UY1C0NMFT4TIMH53JYGMHFJDHBCBD4O">Short-Circuit Constraint (Allowed=No) (All),(All)</a></td>
|
||||
<td class="column2">0</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="#ID11S3UCBDI1BTLBM4NAUAZFJGCMNEAI03EYXV0ROKCXUTP1JFMELJ">Un-Routed Net Constraint ( (All) )</a></td>
|
||||
<td class="column2">0</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="#ID1YF0ZAU11NAFLYWIJF4SWS1ASG0RCT4GKNVUYBLFIYHL4LYRYEW">Modified Polygon (Allow modified: No), (Allow shelved: No)</a></td>
|
||||
<td class="column2">0</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="#IDPKHLVMZHIXSWKJPYZLAA5E1GUGBBOWKOJWSI55MUIH3PT5DQ3WYE">Width Constraint (Min=0.254mm) (Max=1mm) (Preferred=0.254mm) (All)</a></td>
|
||||
<td class="column2">0</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="#IDZJ2N5DVIFWU4UF4PJANFPH1MPJV2JYCZJEEY4PL5HTDGH321K3F">Power Plane Connect Rule(Relief Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)</a></td>
|
||||
<td class="column2">0</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="#IDCFTEWZQU1TBEPRG5SYHZADLV0NAIVYKDBRWB3UKWKANIIGDC1ZPD">Hole Size Constraint (Min=0.025mm) (Max=2.54mm) (All)</a></td>
|
||||
<td class="column2">0</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="#IDXCZZL0UZ4U2TE50XDOUZFRO1ROWJT43HMUVRRML05G00VWAA15DJ">Hole To Hole Clearance (Gap=0.254mm) (All),(All)</a></td>
|
||||
<td class="column2">0</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="#IDZPEOTC2IM2WZGBRLNN513IIDMJHWIKDMBV2MWNMDRI02DNUTMPVP">Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)</a></td>
|
||||
<td class="column2">8</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="#IDOZMF2TK1W1O4GPEAV32ITNTHLCUCVEWQVNBPYTHVZX1MU50KWEDD">Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)</a></td>
|
||||
<td class="column2">39</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="#IDAAX5RGYAY53UPTLCHCJ2XAVDPDLJ0XONPI4UYYMHA0JZENICOMAH">Silk to Silk (Clearance=0.254mm) (All),(All)</a></td>
|
||||
<td class="column2">17</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="#ID1PGJL220SMOTOKTFPJHEZASW1GZZ4IYQIBN4HDDX3V3GOVAW42KG">Net Antennae (Tolerance=0mm) (All)</a></td>
|
||||
<td class="column2">0</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="#IDVEZ4O1VKAB3OOWSBFXQGSBUL3EIZPIDN1PC5U4FQKVCQNI5JVXVK">Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)</a></td>
|
||||
<td class="column2">0</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td style="font-weight : bold; text-align : right" class="column1">Total</td>
|
||||
<td style="font-weight : bold" class="column2">64</td>
|
||||
</tr>
|
||||
</table><br><a name="IDZPEOTC2IM2WZGBRLNN513IIDMJHWIKDMBV2MWNMDRI02DNUTMPVP"><table>
|
||||
<tr>
|
||||
<th style="text-align : left" colspan="1" class="rule">Minimum Solder Mask Sliver (Gap=0.254mm) (All),(All)</th>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1634.373mil|Location2.X=1645.623mil|Location1.Y=1586.875mil|Location2.Y=1598.125mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1634.373mil|Location2.X=1645.623mil|Location1.Y=1586.875mil|Location2.Y=1598.125mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.047mm < 0.254mm) Between Pad IN-1(42.281mm,40.45mm) on Multi-Layer And Pad IN-2(41.031mm,40.45mm) on Multi-Layer [Top Solder] Mask Sliver [0.146mm] / [Bottom Solder] Mask Sliver [0.047mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1636.565mil|Location2.X=1647.815mil|Location1.Y=1577.767mil|Location2.Y=1589.017mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1636.565mil|Location2.X=1647.815mil|Location1.Y=1577.767mil|Location2.Y=1589.017mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.244mm < 0.254mm) Between Pad IN-2(41.031mm,40.45mm) on Multi-Layer And Region (0 hole(s)) Top Solder [Top Solder] Mask Sliver [0.244mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2469.374mil|Location2.X=2480.624mil|Location1.Y=1586.875mil|Location2.Y=1598.125mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2469.374mil|Location2.X=2480.624mil|Location1.Y=1586.875mil|Location2.Y=1598.125mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.047mm < 0.254mm) Between Pad OUT-1(63.49mm,40.45mm) on Multi-Layer And Pad OUT-2(62.24mm,40.45mm) on Multi-Layer [Top Solder] Mask Sliver [0.221mm] / [Bottom Solder] Mask Sliver [0.047mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2471.565mil|Location2.X=2482.815mil|Location1.Y=1577.767mil|Location2.Y=1589.017mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2471.565mil|Location2.X=2482.815mil|Location1.Y=1577.767mil|Location2.Y=1589.017mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.244mm < 0.254mm) Between Pad OUT-2(62.24mm,40.45mm) on Multi-Layer And Region (0 hole(s)) Top Solder [Top Solder] Mask Sliver [0.244mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1967.483mil|Location2.X=1978.733mil|Location1.Y=1654.985mil|Location2.Y=1666.235mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1967.483mil|Location2.X=1978.733mil|Location1.Y=1654.985mil|Location2.Y=1666.235mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad SW1-1(50.117mm,41.179mm) on Multi-Layer And Pad SW1-2(50.117mm,43.179mm) on Multi-Layer [Top Solder] Mask Sliver [0.197mm] / [Bottom Solder] Mask Sliver [0.197mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1967.483mil|Location2.X=1978.733mil|Location1.Y=1733.725mil|Location2.Y=1744.975mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1967.483mil|Location2.X=1978.733mil|Location1.Y=1733.725mil|Location2.Y=1744.975mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad SW1-2(50.117mm,43.179mm) on Multi-Layer And Pad SW1-3(50.117mm,45.179mm) on Multi-Layer [Top Solder] Mask Sliver [0.197mm] / [Bottom Solder] Mask Sliver [0.197mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1790.323mil|Location2.X=1801.573mil|Location1.Y=1654.985mil|Location2.Y=1666.235mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1790.323mil|Location2.X=1801.573mil|Location1.Y=1654.985mil|Location2.Y=1666.235mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad SW1-4(45.617mm,41.179mm) on Multi-Layer And Pad SW1-5(45.617mm,43.179mm) on Multi-Layer [Top Solder] Mask Sliver [0.197mm] / [Bottom Solder] Mask Sliver [0.197mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1790.323mil|Location2.X=1801.573mil|Location1.Y=1733.725mil|Location2.Y=1744.975mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1790.323mil|Location2.X=1801.573mil|Location1.Y=1733.725mil|Location2.Y=1744.975mil|Absolute=True">Minimum Solder Mask Sliver Constraint: (0.197mm < 0.254mm) Between Pad SW1-5(45.617mm,43.179mm) on Multi-Layer And Pad SW1-6(45.617mm,45.179mm) on Multi-Layer [Top Solder] Mask Sliver [0.197mm] / [Bottom Solder] Mask Sliver [0.197mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
</table></a><hr color="#EEEEEE"><a href="#top" style="font-size: 0.9em">Back to top</a><br><br><a name="IDOZMF2TK1W1O4GPEAV32ITNTHLCUCVEWQVNBPYTHVZX1MU50KWEDD"><table>
|
||||
<tr>
|
||||
<th style="text-align : left" colspan="1" class="rule">Silk To Solder Mask (Clearance=0.254mm) (IsPad),(All)</th>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2209.144mil|Location2.X=2220.394mil|Location1.Y=1663.979mil|Location2.Y=1675.229mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2209.144mil|Location2.X=2220.394mil|Location1.Y=1663.979mil|Location2.Y=1675.229mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.133mm < 0.254mm) Between Arc (57.967mm,43.179mm) on Top Overlay And Pad LED1-1(56.697mm,43.179mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.133mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2205.769mil|Location2.X=2217.019mil|Location1.Y=1722.967mil|Location2.Y=1734.217mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2205.769mil|Location2.X=2217.019mil|Location1.Y=1722.967mil|Location2.Y=1734.217mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.221mm < 0.254mm) Between Arc (57.967mm,43.179mm) on Top Overlay And Pad LED1-1(56.697mm,43.179mm) on Multi-Layer [Top Overlay] to [Top Solder] clearance [0.221mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1639.295mil|Location2.X=1650.545mil|Location1.Y=1564.533mil|Location2.Y=1575.783mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1639.295mil|Location2.X=1650.545mil|Location1.Y=1564.533mil|Location2.Y=1575.783mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.135mm < 0.254mm) Between Pad IN-1(42.281mm,40.45mm) on Multi-Layer And Track (39.481mm,39.688mm)(43.831mm,39.688mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.135mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1598.58mil|Location2.X=1609.83mil|Location1.Y=1566.271mil|Location2.Y=1577.521mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1598.58mil|Location2.X=1609.83mil|Location1.Y=1566.271mil|Location2.Y=1577.521mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.223mm < 0.254mm) Between Pad IN-2(41.031mm,40.45mm) on Multi-Layer And Track (39.481mm,39.688mm)(43.831mm,39.688mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.223mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2208.501mil|Location2.X=2219.751mil|Location1.Y=1722.215mil|Location2.Y=1733.465mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2208.501mil|Location2.X=2219.751mil|Location1.Y=1722.215mil|Location2.Y=1733.465mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.253mm < 0.254mm) Between Pad LED1-1(56.697mm,43.179mm) on Multi-Layer And Text "IRIS 20211217" (59.944mm,44.005mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.253mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2247.636mil|Location2.X=2260.064mil|Location1.Y=1725.302mil|Location2.Y=1736.552mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2247.636mil|Location2.X=2260.064mil|Location1.Y=1725.302mil|Location2.Y=1736.552mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.251mm < 0.254mm) Between Pad LED1-1(56.697mm,43.179mm) on Multi-Layer And Track (57.367mm,44.179mm)(57.367mm,44.779mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.251mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2345.01mil|Location2.X=2356.26mil|Location1.Y=1722.745mil|Location2.Y=1733.995mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2345.01mil|Location2.X=2356.26mil|Location1.Y=1722.745mil|Location2.Y=1733.995mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.083mm < 0.254mm) Between Pad LED1-2(59.237mm,43.179mm) on Multi-Layer And Text "IRIS 20211217" (59.944mm,44.005mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.083mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2328.142mil|Location2.X=2339.392mil|Location1.Y=1659.017mil|Location2.Y=1670.62mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2328.142mil|Location2.X=2339.392mil|Location1.Y=1659.017mil|Location2.Y=1670.62mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.233mm < 0.254mm) Between Pad LED1-2(59.237mm,43.179mm) on Multi-Layer And Track (59.467mm,41.857mm)(59.467mm,42.129mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.233mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2328.142mil|Location2.X=2339.392mil|Location1.Y=1729.402mil|Location2.Y=1740.943mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2328.142mil|Location2.X=2339.392mil|Location1.Y=1729.402mil|Location2.Y=1740.943mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.233mm < 0.254mm) Between Pad LED1-2(59.237mm,43.179mm) on Multi-Layer And Track (59.467mm,44.23mm)(59.467mm,44.502mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.233mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2474.295mil|Location2.X=2485.545mil|Location1.Y=1564.533mil|Location2.Y=1575.783mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2474.295mil|Location2.X=2485.545mil|Location1.Y=1564.533mil|Location2.Y=1575.783mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.135mm < 0.254mm) Between Pad OUT-1(63.49mm,40.45mm) on Multi-Layer And Track (60.69mm,39.688mm)(65.04mm,39.688mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.135mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2433.579mil|Location2.X=2444.829mil|Location1.Y=1566.271mil|Location2.Y=1577.521mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2433.579mil|Location2.X=2444.829mil|Location1.Y=1566.271mil|Location2.Y=1577.521mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.223mm < 0.254mm) Between Pad OUT-2(62.24mm,40.45mm) on Multi-Layer And Track (60.69mm,39.688mm)(65.04mm,39.688mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.223mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2086.157mil|Location2.X=2093.824mil|Location1.Y=1729.845mil|Location2.Y=1737.511mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2086.157mil|Location2.X=2093.824mil|Location1.Y=1729.845mil|Location2.Y=1737.511mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (Collision < 0.254mm) Between Pad R1-1(53.086mm,43.535mm) on Top Layer And Text "R1" (52.324mm,44.069mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2060.3mil|Location2.X=2071.55mil|Location1.Y=1728.053mil|Location2.Y=1739.303mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2060.3mil|Location2.X=2071.55mil|Location1.Y=1728.053mil|Location2.Y=1739.303mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.123mm < 0.254mm) Between Pad R1-1(53.086mm,43.535mm) on Top Layer And Track (52.286mm,43.035mm)(52.286mm,44.285mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.123mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2062.722mil|Location2.X=2073.972mil|Location1.Y=1730.475mil|Location2.Y=1741.725mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2062.722mil|Location2.X=2073.972mil|Location1.Y=1730.475mil|Location2.Y=1741.725mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.123mm < 0.254mm) Between Pad R1-1(53.086mm,43.535mm) on Top Layer And Track (52.286mm,44.285mm)(53.886mm,44.285mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.123mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2108.45mil|Location2.X=2119.7mil|Location1.Y=1688.683mil|Location2.Y=1699.933mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2108.45mil|Location2.X=2119.7mil|Location1.Y=1688.683mil|Location2.Y=1699.933mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.123mm < 0.254mm) Between Pad R1-1(53.086mm,43.535mm) on Top Layer And Track (53.886mm,43.035mm)(53.886mm,44.285mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.123mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2060.4mil|Location2.X=2071.65mil|Location1.Y=1665.059mil|Location2.Y=1676.309mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2060.4mil|Location2.X=2071.65mil|Location1.Y=1665.059mil|Location2.Y=1676.309mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.118mm < 0.254mm) Between Pad R1-2(53.086mm,41.936mm) on Top Layer And Track (52.291mm,41.185mm)(52.291mm,42.435mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.118mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2106.028mil|Location2.X=2117.278mil|Location1.Y=1623.261mil|Location2.Y=1634.511mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2106.028mil|Location2.X=2117.278mil|Location1.Y=1623.261mil|Location2.Y=1634.511mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.124mm < 0.254mm) Between Pad R1-2(53.086mm,41.936mm) on Top Layer And Track (52.291mm,41.185mm)(53.891mm,41.185mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.124mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2108.551mil|Location2.X=2119.801mil|Location1.Y=1625.695mil|Location2.Y=1636.945mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2108.551mil|Location2.X=2119.801mil|Location1.Y=1625.695mil|Location2.Y=1636.945mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.128mm < 0.254mm) Between Pad R1-2(53.086mm,41.936mm) on Top Layer And Track (53.891mm,41.185mm)(53.891mm,42.435mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.128mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1946.588mil|Location2.X=1957.838mil|Location1.Y=1588.606mil|Location2.Y=1599.856mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1946.588mil|Location2.X=1957.838mil|Location1.Y=1588.606mil|Location2.Y=1599.856mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.174mm < 0.254mm) Between Pad SW1-1(50.117mm,41.179mm) on Multi-Layer And Track (46.118mm,40.28mm)(49.616mm,40.28mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.174mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1977.793mil|Location2.X=1989.043mil|Location1.Y=1583.156mil|Location2.Y=1596.758mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1977.793mil|Location2.X=1989.043mil|Location1.Y=1583.156mil|Location2.Y=1596.758mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad SW1-1(50.117mm,41.179mm) on Multi-Layer And Track (50.618mm,40.28mm)(50.767mm,40.28mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1983.389mil|Location2.X=1994.639mil|Location1.Y=1585.489mil|Location2.Y=1596.739mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1983.389mil|Location2.X=1994.639mil|Location1.Y=1585.489mil|Location2.Y=1596.739mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.243mm < 0.254mm) Between Pad SW1-1(50.117mm,41.179mm) on Multi-Layer And Track (50.767mm,40.28mm)(50.767mm,40.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.243mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1990.573mil|Location2.X=2004.048mil|Location1.Y=1640.145mil|Location2.Y=1651.395mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1990.573mil|Location2.X=2004.048mil|Location1.Y=1640.145mil|Location2.Y=1651.395mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.121mm < 0.254mm) Between Pad SW1-1(50.117mm,41.179mm) on Multi-Layer And Track (50.767mm,41.979mm)(50.767mm,42.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.121mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1983.389mil|Location2.X=1994.639mil|Location1.Y=1664.229mil|Location2.Y=1675.479mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1983.389mil|Location2.X=1994.639mil|Location1.Y=1664.229mil|Location2.Y=1675.479mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.243mm < 0.254mm) Between Pad SW1-2(50.117mm,43.179mm) on Multi-Layer And Track (50.767mm,41.979mm)(50.767mm,42.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.243mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1990.573mil|Location2.X=2004.048mil|Location1.Y=1718.885mil|Location2.Y=1730.135mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1990.573mil|Location2.X=2004.048mil|Location1.Y=1718.885mil|Location2.Y=1730.135mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.121mm < 0.254mm) Between Pad SW1-2(50.117mm,43.179mm) on Multi-Layer And Track (50.767mm,43.979mm)(50.767mm,44.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.121mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1992.649mil|Location2.X=2003.899mil|Location1.Y=1751.613mil|Location2.Y=1762.863mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1992.649mil|Location2.X=2003.899mil|Location1.Y=1751.613mil|Location2.Y=1762.863mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.221mm < 0.254mm) Between Pad SW1-3(50.117mm,45.179mm) on Multi-Layer And Text "IRIS 20211217" (59.944mm,44.005mm) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [0.221mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1943.897mil|Location2.X=1955.147mil|Location1.Y=1798.759mil|Location2.Y=1810.009mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1943.897mil|Location2.X=1955.147mil|Location1.Y=1798.759mil|Location2.Y=1810.009mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.242mm < 0.254mm) Between Pad SW1-3(50.117mm,45.179mm) on Multi-Layer And Track (46.118mm,46.079mm)(49.616mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.242mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1989.764mil|Location2.X=2001.014mil|Location1.Y=1799.452mil|Location2.Y=1810.702mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1989.764mil|Location2.X=2001.014mil|Location1.Y=1799.452mil|Location2.Y=1810.702mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.207mm < 0.254mm) Between Pad SW1-3(50.117mm,45.179mm) on Multi-Layer And Track (50.618mm,46.079mm)(50.767mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.207mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1983.389mil|Location2.X=1994.639mil|Location1.Y=1742.969mil|Location2.Y=1754.219mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1983.389mil|Location2.X=1994.639mil|Location1.Y=1742.969mil|Location2.Y=1754.219mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.243mm < 0.254mm) Between Pad SW1-3(50.117mm,45.179mm) on Multi-Layer And Track (50.767mm,43.979mm)(50.767mm,44.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.243mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1990.573mil|Location2.X=2004.048mil|Location1.Y=1797.625mil|Location2.Y=1808.875mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1990.573mil|Location2.X=2004.048mil|Location1.Y=1797.625mil|Location2.Y=1808.875mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.121mm < 0.254mm) Between Pad SW1-3(50.117mm,45.179mm) on Multi-Layer And Track (50.767mm,45.979mm)(50.767mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.121mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1768.357mil|Location2.X=1780.926mil|Location1.Y=1590.229mil|Location2.Y=1601.479mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1768.357mil|Location2.X=1780.926mil|Location1.Y=1590.229mil|Location2.Y=1601.479mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.106mm < 0.254mm) Between Pad SW1-4(45.617mm,41.179mm) on Multi-Layer And Track (44.967mm,40.28mm)(44.967mm,40.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.106mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1769.428mil|Location2.X=1780.678mil|Location1.Y=1588.606mil|Location2.Y=1599.856mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1769.428mil|Location2.X=1780.678mil|Location1.Y=1588.606mil|Location2.Y=1599.856mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.174mm < 0.254mm) Between Pad SW1-4(45.617mm,41.179mm) on Multi-Layer And Track (44.967mm,40.28mm)(45.116mm,40.28mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.174mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1764.498mil|Location2.X=1775.748mil|Location1.Y=1637.808mil|Location2.Y=1649.058mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1764.498mil|Location2.X=1775.748mil|Location1.Y=1637.808mil|Location2.Y=1649.058mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.218mm < 0.254mm) Between Pad SW1-4(45.617mm,41.179mm) on Multi-Layer And Track (44.967mm,41.979mm)(44.967mm,42.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.218mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1800.633mil|Location2.X=1811.883mil|Location1.Y=1583.156mil|Location2.Y=1596.758mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1800.633mil|Location2.X=1811.883mil|Location1.Y=1583.156mil|Location2.Y=1596.758mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.247mm < 0.254mm) Between Pad SW1-4(45.617mm,41.179mm) on Multi-Layer And Track (46.118mm,40.28mm)(49.616mm,40.28mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.247mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1768.357mil|Location2.X=1780.926mil|Location1.Y=1668.969mil|Location2.Y=1680.219mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1768.357mil|Location2.X=1780.926mil|Location1.Y=1668.969mil|Location2.Y=1680.219mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.106mm < 0.254mm) Between Pad SW1-5(45.617mm,43.179mm) on Multi-Layer And Track (44.967mm,41.979mm)(44.967mm,42.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.106mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1764.498mil|Location2.X=1775.748mil|Location1.Y=1716.548mil|Location2.Y=1727.798mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1764.498mil|Location2.X=1775.748mil|Location1.Y=1716.548mil|Location2.Y=1727.798mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.218mm < 0.254mm) Between Pad SW1-5(45.617mm,43.179mm) on Multi-Layer And Track (44.967mm,43.979mm)(44.967mm,44.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.218mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1768.357mil|Location2.X=1780.926mil|Location1.Y=1747.709mil|Location2.Y=1758.959mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1768.357mil|Location2.X=1780.926mil|Location1.Y=1747.709mil|Location2.Y=1758.959mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.106mm < 0.254mm) Between Pad SW1-6(45.617mm,45.179mm) on Multi-Layer And Track (44.967mm,43.979mm)(44.967mm,44.38mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.106mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1764.498mil|Location2.X=1775.748mil|Location1.Y=1795.288mil|Location2.Y=1806.538mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1764.498mil|Location2.X=1775.748mil|Location1.Y=1795.288mil|Location2.Y=1806.538mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.218mm < 0.254mm) Between Pad SW1-6(45.617mm,45.179mm) on Multi-Layer And Track (44.967mm,45.979mm)(44.967mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.218mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1766.737mil|Location2.X=1777.987mil|Location1.Y=1798.759mil|Location2.Y=1810.009mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1766.737mil|Location2.X=1777.987mil|Location1.Y=1798.759mil|Location2.Y=1810.009mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.242mm < 0.254mm) Between Pad SW1-6(45.617mm,45.179mm) on Multi-Layer And Track (44.967mm,46.079mm)(45.116mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.242mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1812.604mil|Location2.X=1823.854mil|Location1.Y=1799.452mil|Location2.Y=1810.702mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1812.604mil|Location2.X=1823.854mil|Location1.Y=1799.452mil|Location2.Y=1810.702mil|Absolute=True">Silk To Solder Mask Clearance Constraint: (0.207mm < 0.254mm) Between Pad SW1-6(45.617mm,45.179mm) on Multi-Layer And Track (46.118mm,46.079mm)(49.616mm,46.079mm) on Top Overlay [Top Overlay] to [Top Solder] clearance [0.207mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
</table></a><hr color="#EEEEEE"><a href="#top" style="font-size: 0.9em">Back to top</a><br><br><a name="IDAAX5RGYAY53UPTLCHCJ2XAVDPDLJ0XONPI4UYYMHA0JZENICOMAH"><table>
|
||||
<tr>
|
||||
<th style="text-align : left" colspan="1" class="rule">Silk to Silk (Clearance=0.254mm) (All),(All)</th>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2242.316mil|Location2.X=2249.982mil|Location1.Y=1766.167mil|Location2.Y=1773.833mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2242.316mil|Location2.X=2249.982mil|Location1.Y=1766.167mil|Location2.Y=1773.833mil|Absolute=True">Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Arc (57.967mm,43.179mm) on Top Overlay And Text "LED1" (56.388mm,44.958mm) on Top Overlay Silk Text to Silk Clearance [0mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1542.81mil|Location2.X=1554.06mil|Location1.Y=1576.863mil|Location2.Y=1588.113mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1542.81mil|Location2.X=1554.06mil|Location1.Y=1576.863mil|Location2.Y=1588.113mil|Absolute=True">Silk To Silk Clearance Constraint: (0.047mm < 0.254mm) Between Text "G" (39.243mm,39.243mm) on Bottom Overlay And Track (39.481mm,39.688mm)(39.481mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0.047mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1542.81mil|Location2.X=1554.06mil|Location1.Y=1556.875mil|Location2.Y=1568.125mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1542.81mil|Location2.X=1554.06mil|Location1.Y=1556.875mil|Location2.Y=1568.125mil|Absolute=True">Silk To Silk Clearance Constraint: (0.047mm < 0.254mm) Between Text "G" (39.243mm,39.243mm) on Bottom Overlay And Track (39.481mm,39.688mm)(43.831mm,39.688mm) on Bottom Overlay Silk Text to Silk Clearance [0.047mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2377.81mil|Location2.X=2389.06mil|Location1.Y=1576.863mil|Location2.Y=1588.113mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2377.81mil|Location2.X=2389.06mil|Location1.Y=1576.863mil|Location2.Y=1588.113mil|Absolute=True">Silk To Silk Clearance Constraint: (0.047mm < 0.254mm) Between Text "G" (60.452mm,39.243mm) on Bottom Overlay And Track (60.69mm,39.688mm)(60.69mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0.047mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2377.81mil|Location2.X=2389.06mil|Location1.Y=1556.875mil|Location2.Y=1568.125mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2377.81mil|Location2.X=2389.06mil|Location1.Y=1556.875mil|Location2.Y=1568.125mil|Absolute=True">Silk To Silk Clearance Constraint: (0.047mm < 0.254mm) Between Text "G" (60.452mm,39.243mm) on Bottom Overlay And Track (60.69mm,39.688mm)(65.04mm,39.688mm) on Bottom Overlay Silk Text to Silk Clearance [0.047mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1686.875mil|Location2.X=1698.125mil|Location1.Y=1758.052mil|Location2.Y=1769.302mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1686.875mil|Location2.X=1698.125mil|Location1.Y=1758.052mil|Location2.Y=1769.302mil|Absolute=True">Silk To Silk Clearance Constraint: (0.042mm < 0.254mm) Between Text "IN" (42.989mm,44.895mm) on Bottom Overlay And Track (39.481mm,44.649mm)(43.831mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0.042mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1726.707mil|Location2.X=1737.957mil|Location1.Y=1757.416mil|Location2.Y=1768.933mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1726.707mil|Location2.X=1737.957mil|Location1.Y=1757.416mil|Location2.Y=1768.933mil|Absolute=True">Silk To Silk Clearance Constraint: (0.185mm < 0.254mm) Between Text "IN" (42.989mm,44.895mm) on Bottom Overlay And Track (43.831mm,39.688mm)(43.831mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0.185mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2256.815mil|Location2.X=2268.065mil|Location1.Y=1761.598mil|Location2.Y=1772.848mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2256.815mil|Location2.X=2268.065mil|Location1.Y=1761.598mil|Location2.Y=1772.848mil|Absolute=True">Silk To Silk Clearance Constraint: (0.039mm < 0.254mm) Between Text "LED1" (56.388mm,44.958mm) on Top Overlay And Track (57.367mm,44.179mm)(57.367mm,44.779mm) on Top Overlay Silk Text to Silk Clearance [0.039mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2551.167mil|Location2.X=2558.833mil|Location1.Y=1757.342mil|Location2.Y=1765.009mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2551.167mil|Location2.X=2558.833mil|Location1.Y=1757.342mil|Location2.Y=1765.009mil|Absolute=True">Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "OUT" (64.897mm,44.577mm) on Bottom Overlay And Track (60.69mm,44.649mm)(65.04mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2553.209mil|Location2.X=2560.876mil|Location1.Y=1756.979mil|Location2.Y=1764.646mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2553.209mil|Location2.X=2560.876mil|Location1.Y=1756.979mil|Location2.Y=1764.646mil|Absolute=True">Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "OUT" (64.897mm,44.577mm) on Bottom Overlay And Track (65.04mm,39.688mm)(65.04mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2056.418mil|Location2.X=2064.085mil|Location1.Y=1731.167mil|Location2.Y=1738.833mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2056.418mil|Location2.X=2064.085mil|Location1.Y=1731.167mil|Location2.Y=1738.833mil|Absolute=True">Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "R1" (52.324mm,44.069mm) on Top Overlay And Track (52.286mm,43.035mm)(52.286mm,44.285mm) on Top Overlay Silk Text to Silk Clearance [0mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2056.167mil|Location2.X=2063.833mil|Location1.Y=1739.689mil|Location2.Y=1747.355mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2056.167mil|Location2.X=2063.833mil|Location1.Y=1739.689mil|Location2.Y=1747.355mil|Absolute=True">Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "R1" (52.324mm,44.069mm) on Top Overlay And Track (52.286mm,44.285mm)(53.886mm,44.285mm) on Top Overlay Silk Text to Silk Clearance [0mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2115.905mil|Location2.X=2123.572mil|Location1.Y=1731.167mil|Location2.Y=1738.833mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2115.905mil|Location2.X=2123.572mil|Location1.Y=1731.167mil|Location2.Y=1738.833mil|Absolute=True">Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "R1" (52.324mm,44.069mm) on Top Overlay And Track (53.886mm,43.035mm)(53.886mm,44.285mm) on Top Overlay Silk Text to Silk Clearance [0mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1724.691mil|Location2.X=1732.357mil|Location1.Y=1562.065mil|Location2.Y=1569.732mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1724.691mil|Location2.X=1732.357mil|Location1.Y=1562.065mil|Location2.Y=1569.732mil|Absolute=True">Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "v" (44.927mm,39.415mm) on Bottom Overlay And Track (39.481mm,39.688mm)(43.831mm,39.688mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1724.964mil|Location2.X=1732.631mil|Location1.Y=1563.843mil|Location2.Y=1571.51mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=1724.964mil|Location2.X=1732.631mil|Location1.Y=1563.843mil|Location2.Y=1571.51mil|Absolute=True">Silk To Silk Clearance Constraint: (Collision < 0.254mm) Between Text "v" (44.927mm,39.415mm) on Bottom Overlay And Track (43.831mm,39.688mm)(43.831mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2562.121mil|Location2.X=2573.371mil|Location1.Y=1557.318mil|Location2.Y=1568.568mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2562.121mil|Location2.X=2573.371mil|Location1.Y=1557.318mil|Location2.Y=1568.568mil|Absolute=True">Silk To Silk Clearance Constraint: (0.108mm < 0.254mm) Between Text "v" (65.69mm,39.542mm) on Bottom Overlay And Track (60.69mm,39.688mm)(65.04mm,39.688mm) on Bottom Overlay Silk Text to Silk Clearance [0.108mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
<tr class="onmouseout_odd" onmouseover="className = 'onmouseover_odd'" onmouseout="className = 'onmouseout_odd'">
|
||||
<td class="column1"><a href="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB %E5%BE%AE%E8%B0%83_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2561.099mil|Location2.X=2572.349mil|Location1.Y=1590.488mil|Location2.Y=1601.738mil|Absolute=True" class="callback"><acronym title="dxpprocess://PCB:Zoom?document=C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc;viewname=PCBEditor;Action=AREA_DYNAMICZOOM|Location1.X=2561.099mil|Location2.X=2572.349mil|Location1.Y=1590.488mil|Location2.Y=1601.738mil|Absolute=True">Silk To Silk Clearance Constraint: (0.056mm < 0.254mm) Between Text "v" (65.69mm,39.542mm) on Bottom Overlay And Track (65.04mm,39.688mm)(65.04mm,44.649mm) on Bottom Overlay Silk Text to Silk Clearance [0.056mm]</acronym></a><br></td>
|
||||
</tr>
|
||||
</table></a><hr color="#EEEEEE"><a href="#top" style="font-size: 0.9em">Back to top</a><br><br></body>
|
||||
</html>
|
||||
BIN
fsa1/sw/FSA_SW_PCB 微调_2022-06-23.pcbdoc
Normal file
BIN
fsa1/sw/FSA_SW_PCB 微调_2022-06-23.pcbdoc
Normal file
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175
fsa1/sw/FSA_SW_PCB 微调_2022-06-23.pcbdoc.htm
Normal file
175
fsa1/sw/FSA_SW_PCB 微调_2022-06-23.pcbdoc.htm
Normal file
@ -0,0 +1,175 @@
|
||||
<html>
|
||||
<head>
|
||||
<META http-equiv="Content-Type" content="text/html">
|
||||
<style type="text/css">
|
||||
h1, h2, h3, h4, h5, h6 {
|
||||
font-family : 'segoe-ui',arial,sans-serif;
|
||||
font-size:15pt;
|
||||
font-weight:normal;
|
||||
line-height:40px;
|
||||
color : #000;
|
||||
background-color : #dedede;
|
||||
padding: 0.3em;
|
||||
}
|
||||
body {
|
||||
font-family : verdana;
|
||||
background: #f1f1f1;
|
||||
font-size:13px;
|
||||
}
|
||||
td, th {
|
||||
padding: 0.5em;
|
||||
text-align : left;
|
||||
width: auto;
|
||||
border:1px solid #DEDEDE;
|
||||
}
|
||||
th {
|
||||
background-color : #DEDEDE;
|
||||
|
||||
}
|
||||
th.column1, td.column1 {
|
||||
text-align: left;
|
||||
width : 18%;
|
||||
}
|
||||
table {
|
||||
width : 100%;
|
||||
border-collapse: collapse;
|
||||
font-size:13px;
|
||||
}
|
||||
.front_matter, .front_matter_column1, .front_matter_column2, .front_matter_column3 {
|
||||
padding-top : 0.1em;
|
||||
padding-bottom : 0.1em;
|
||||
border : 0px solid black;
|
||||
width : auto;
|
||||
vertical-align: top
|
||||
}
|
||||
.front_matter_column1 {
|
||||
text-align : right;
|
||||
}
|
||||
.total_column1, .total_column {
|
||||
font-weight : bold;
|
||||
}
|
||||
.total_column1 {
|
||||
text-align : right;
|
||||
}
|
||||
.front_matter_column2 {
|
||||
text-align : center;
|
||||
}
|
||||
.front_matter_column3 {
|
||||
text-align : left;
|
||||
}
|
||||
.warning, .error {
|
||||
color : red;
|
||||
font-weight : bold;
|
||||
}
|
||||
tr.onmouseout_odd {
|
||||
/*background-color : #EEEEE0 */
|
||||
}
|
||||
tr.onmouseout_even {
|
||||
/*background-color : #F3F3E3 */
|
||||
}
|
||||
tr.onmouseover_odd, tr.onmouseover_even {
|
||||
background-color : #FFF;
|
||||
}
|
||||
a:link, a:visited, .q a:link,.q a:active,.q {
|
||||
color: #21489e;
|
||||
}
|
||||
a:link.callback, a:visited.callback {
|
||||
color: #008000
|
||||
}
|
||||
a:link.customize, a:visited.customize {
|
||||
position: absolute;
|
||||
right: 16px; top: 30px;
|
||||
font-family:'segoe ui',arial,tahoma,sans-serif;
|
||||
text-decoration:underline;
|
||||
font-size:11px;
|
||||
color:#0066cc;
|
||||
}
|
||||
p.contents_level1 {
|
||||
font-weight : bold;
|
||||
font-size : 110%;
|
||||
margin : 0.5em;
|
||||
}
|
||||
p.contents_level2 {
|
||||
position : relative;
|
||||
left : 20px;
|
||||
margin : 0.5em;
|
||||
}
|
||||
|
||||
HR{
|
||||
border-collapse:collapse;
|
||||
border:none;
|
||||
border-top:1px solid #dedede;
|
||||
}
|
||||
</style>
|
||||
|
||||
<style type="text/css" media="print">
|
||||
body{
|
||||
background:#fff;
|
||||
}
|
||||
|
||||
a:link.customize{
|
||||
display:none;
|
||||
}
|
||||
|
||||
table,th,td,hr{
|
||||
border-color:#999;
|
||||
background:#fff;
|
||||
}
|
||||
</style>
|
||||
</head>
|
||||
|
||||
<body>
|
||||
<a href="dxpprocess://Client:SetupPreferences?Server=PCB|PageName=General" class="customize"><acronym title="dxpprocess://Client:SetupPreferences?Server=PCB|PageName=General">Reporting Options</acronym></a>
|
||||
<h1>File in Previous Format</h1>
|
||||
|
||||
<table class="front_matter">
|
||||
<tr class="front_matter">
|
||||
<td class="front_matter_column1">Date</td>
|
||||
<td class="front_matter_column2">:</td>
|
||||
<td class="front_matter_column3">2022/6/24</td>
|
||||
</tr>
|
||||
<tr class="front_matter">
|
||||
<td class="front_matter_column1">Time</td>
|
||||
<td class="front_matter_column2">:</td>
|
||||
<td class="front_matter_column3">10:32:06</td>
|
||||
</tr>
|
||||
<tr class="front_matter">
|
||||
<td class="front_matter_column1">Filename</td>
|
||||
<td class="front_matter_column2">:</td>
|
||||
<td class="front_matter_column3"><a href="file://C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc" class="file"><acronym title="C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc">C:\Users\hu123456\Desktop\fsa1\sw\FSA_SW_PCB <><CEA2>_2022-06-23.pcbdoc</acronym></a></td>
|
||||
</tr>
|
||||
</table>
|
||||
|
||||
<br>
|
||||
|
||||
<table>
|
||||
<tr>
|
||||
<th style="text-align : left" colspan="1" class="">Version</th>
|
||||
<th style="text-align : left" colspan="1" class="">Warning</th>
|
||||
</tr>
|
||||
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1">6.3</td>
|
||||
<td class="column2"><b>CAUTION</b> - Via connections to both hatched and solid signal layer polygons are now controlled by the polygon connect style rule. Re-pouring polygons may result in physical copper differences.</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1">Summer 09</td>
|
||||
<td class="column2"><b>CAUTION</b> - File contains old violation objects. These violations are no longer supported & will not be loaded. Please run DRC after opening this file in order to refresh the violations.</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1">Summer 09</td>
|
||||
<td class="column2"><b>CAUTION</b> - Existing testpoint rules and settings are used as fabrication testpoint information.</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1">Release 12</td>
|
||||
<td class="column2"><b>CAUTION</b> - Air Gap Width previously controlled by Clearance rule is now controlled by Polygon Connect Style rule's newly introduced Air Gap Width (set to default value). Suggest reviewing each Polygon Connect Style rule's Air Gap Width attribute for correctness.</td>
|
||||
</tr>
|
||||
<tr class="onmouseout_even" onmouseover="className = 'onmouseover_even'" onmouseout="className = 'onmouseout_even'">
|
||||
<td class="column1">Release 13</td>
|
||||
<td class="column2"><b>CAUTION</b> - Silkscreen Over Component Pads Rules are converted to Silk To Solder Mask Clearance Rules. Suggest examining rule scopes for accuracy.</td>
|
||||
</tr>
|
||||
</table>
|
||||
<br><hr>
|
||||
<p>This file was generated by <b>an earlier</b> version of the software</p>
|
||||
</body>
|
||||
</html>
|
||||
BIN
fsa1/sw/FSA_SW_PCB 微调_2022-06-23.rar
Normal file
BIN
fsa1/sw/FSA_SW_PCB 微调_2022-06-23.rar
Normal file
Binary file not shown.
0
fsa1/sw/debug.log
Normal file
0
fsa1/sw/debug.log
Normal file
Reference in New Issue
Block a user